JP3349356B2 - Thin film transistor and method of manufacturing the same - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active element such as a thin film transistor used for an active matrix type liquid crystal display device and the like, and more particularly to a structure and a manufacturing method of electrodes or wirings of these active elements.

[0002]

2. Description of the Related Art In recent years, an active matrix type liquid crystal display device has attracted attention as a display having advantages of being thin, lightweight and low power consumption. Among them, a thin film transistor (hereinafter, referred to as a TFT) using a polycrystalline silicon thin film as a liquid crystal driving element is formed on an inexpensive low melting point glass substrate due to a demand for a large area, high resolution, low cost, and the like. There is great hope for technology. As a technique for forming a polycrystalline silicon thin film as a crystalline semiconductor thin film to be an active layer of a TFT on a low melting glass substrate at a low temperature of about 600 ° C., a method of depositing an amorphous silicon thin film on a low melting glass substrate A solid phase growth method in which heat treatment is performed at a temperature of about 600 ° C. for several hours to several tens of hours for crystallization, or a pulse laser beam such as an excimer laser is irradiated to instantly melt and recrystallize the amorphous silicon thin film in that part. Methods such as a laser crystallization method have been proposed.
FIG. 13 shows the structure of a conventional TFT. The numbers used in the drawings are common to those in other drawings.

A conventional TFT is generally manufactured through the following steps. A silicon thin film polycrystallized by a solid phase growth method, a laser crystallization method, or the like is patterned in an island shape at a position where an active layer of a TFT is to be formed, and subjected to a surface treatment.
Thereafter, a gate insulating film 4 is formed on the polycrystalline silicon thin film. As a method of forming a gate insulating film at low temperature,
There are plasma chemical vapor deposition (PCVD), low pressure chemical vapor deposition (LPCVD), photochemical vapor deposition, and a method of forming a thermal oxide film on the surface of a semiconductor thin film at a low temperature. A gate electrode 5 made of an Al alloy or the like is formed on the gate insulating film. Impurities are added to the source region and the drain region 7, and then the resistance is reduced by irradiating a laser beam or the like and heating. Next, an interlayer insulating film 8 is formed so as to cover the entire surface.
Is formed. A source electrode and a drain electrode 10 are connected to the source region and the drain region 7 via a contact hole 9 opened in the interlayer insulating film 8 and the gate insulating film 4.

When the TFT manufactured in this way is used for a liquid crystal display device, a transparent conductive thin film such as ITO serving as a pixel electrode 14 is provided through a contact hole opened in an interlayer insulating film and a gate insulating film. Is electrically connected to the drain region. However, since electrodes and wiring for supplying signals and the like to the TFT need to have low resistance, for example, as shown in JP-A-58-178562, A
a source electrode and a drain electrode 10 made of an alloy or the like are formed so as to be in contact with the source region and the drain region 7;
A transparent conductive thin film such as ITO, which becomes the pixel electrode 14, is electrically connected to the drain electrode. Further, when the drain region, which is a silicon layer, is directly connected to the ITO film, oxygen contained in the ITO film diffuses into the silicon layer due to a heat treatment in a later step, thereby deteriorating the contact characteristics. As disclosed in JP-A-5-243579, it has been proposed to obtain a good contact between the silicon layer and the ITO by interposing a layer made of a Ti compound between the silicon layer and the ITO.

Incidentally, in the conventional TFT shown in FIG.
An example is shown in which a flattening film 12 made of a polyimide resin or an acrylic resin is applied and formed on the FT, and the pixel electrode 14 is connected to the drain electrode via a contact hole opened in the flattening film 12. Thereby, the aperture ratio of the pixel electrode can be improved.

[0006]

As described above, it is not appropriate to use a transparent conductive thin film such as ITO for the wiring of the TFT. The first reason is that the electrical resistivity of a transparent conductive thin film such as ITO is much higher than that of metal. If the electrical resistance of the wiring is high, it causes signal delay,
When such a TFT is used in an active matrix type liquid crystal display device, display quality is significantly impaired.

The second reason is that stable connection cannot be obtained when a transparent conductive thin film such as ITO is directly connected to the drain region of a TFT made of a silicon layer. This is because a good ohmic contact is not formed between the silicon layer which is the drain region of the TFT and a transparent conductive thin film such as ITO. The inability to obtain a stable connection with the silicon layer is due to the IT
It is considered that the fact that the electric resistivity of the transparent conductive thin film such as O is extremely large as compared with that of metal is also affecting. If the connection with the TFT is not securely maintained, the TFT does not operate normally. When such a TFT is used in an active matrix type liquid crystal display device, the display quality is significantly impaired as in the former case.

Therefore, as shown in the above conventional example,
A source electrode and a drain electrode 10 made of a metal such as an Al alloy or Ti are connected to a source region and a drain region 7 of the TFT, and a transparent conductive thin film such as ITO is connected to a drain electrode made of a metal. I have to. Since the metal has a lower electrical resistivity by two to three orders of magnitude than a transparent conductive thin film such as ITO, it can be used at all for TFT wiring. Further, since a good ohmic contact is generally formed with the silicon layer, the connection with the silicon layer hardly becomes unstable.

The most important point in manufacturing an active matrix type liquid crystal display device using such a TFT is how to increase the aperture ratio of a pixel. TF
When T is used in an active matrix type liquid crystal display device, the area of the TFT and the area of the electrodes and wiring in one pixel greatly affect the aperture ratio. That is, the TFT, the electrode, and the wiring portion do not contribute to image display. To improve the aperture ratio, make the TFT as small as possible,
It is necessary to increase the effective area of the pixel by reducing the line width of the electrodes and wiring as much as possible. As the element and the wiring are miniaturized in this way, it becomes necessary to use an electrode material having a lower electric resistance. In such a case, not only a transparent conductive thin film such as ITO but also a material having a high electric resistance even if it is a metal is disadvantageous. Therefore, it is advantageous to use Al or Mo, which has a lower electrical resistivity than Ta or Ti, which has a relatively high electrical resistivity, for the electrodes and wirings of the TFT, in consideration of workability and compatibility with other processes. It is particularly preferable to use an Al alloy such as Al-Ti or Al-Si. A transparent conductive thin film such as ITO which is not suitable as a wiring also has a feature of transmitting light, and is used as a pixel electrode connected to a drain electrode of a TFT.

However, when a transparent conductive thin film made of ITO or the like is deposited on a drain electrode of a TFT made of an Al alloy, there is a problem that connection failure between the electrodes is likely to occur. In general, a metal often forms a natural oxide film on its surface in the air. In this case, when depositing a transparent conductive thin film by a sputtering method, the metal is formed of an Al alloy in a chamber of a sputtering apparatus in an oxidizing atmosphere. By holding the substrate on which the electrodes are formed, A
This is because the formation of an insulating oxide film on the surface of the electrode made of the 1 alloy is further promoted. During the step of depositing a transparent conductive thin film by sputtering, A
If the oxidation of the surface of the drain electrode of the TFT made of the l-alloy is promoted, the Al
It is impossible to remove the oxide film on the surface of the drain electrode of the TFT made of an alloy. Further, as shown in FIG. 13, after forming a source electrode and a drain electrode 10 of a TFT, a flattening film 12 made of a polyimide resin or an acrylic resin is formed on the entire surface, and a pixel electrode 14 is formed thereon. In the case of a structure in which the aperture ratio of the pixel is improved, it is necessary to open a contact hole reaching the drain electrode in the flattening film in order to connect the pixel electrode to the drain electrode.
The size of the contact hole is about several μm to several tens of μm, and the contact area is further reduced as compared with the case where the pixel electrode is directly connected to the drain electrode.

The present invention solves the above-mentioned problem,
An object of the present invention is to provide a TFT having an electrode structure capable of realizing good contact between a drain electrode of an FT and a pixel electrode made of a transparent conductive thin film such as ITO and a method for manufacturing the same.

[0012]

Means for Solving the Problems] thin film transistor of the present invention to solve the aforementioned problem consists of the semiconductor layer mainly composed of silicon, a metal mainly composed of Al which is connected to the semiconductor layer A second electrode made of a metal material that forms an oxide film that is a good conductor or a semiconductor on the surface on the surface of the first electrode, and is electrically connected to the first electrode. An electrode made of a transparent conductive thin film is electrically connected to the second electrode, thereby achieving the above object.

The thin film transistor of the present invention comprises a semiconductor layer containing silicon as a main component, and the thin film transistor has a first electrode connected to the semiconductor layer and made of a metal containing Al as a main component. A second electrode made of a metal material that covers the surface of the first electrode and forms an oxide film that is a good conductor or a semiconductor on the surface in terms of resistivity is provided so as to be electrically connected to the second electrode. Characterized in that the electrode made of a conductive thin film is electrically connected,
Thereby, the above object is achieved.

The thin film transistor of the present invention comprises a semiconductor layer containing silicon as a main component. The thin film transistor has a first electrode connected to the semiconductor layer and made of a metal containing Al as a main component. An insulating film is formed over the thin film transistor including the electrode, and a contact hole is opened on the first electrode of the insulating film, and the first electrode is a good conductor or a semiconductor in terms of resistivity through the contact hole. A second electrode made of a metal material forming an oxide film on the surface is provided so as to be electrically connected;
An electrode made of a transparent conductive thin film is electrically connected to the second electrode, thereby achieving the above object.

The method of manufacturing a thin film transistor according to the present invention comprises the steps of: depositing a first metal layer mainly composed of Al and connected to a semiconductor layer mainly composed of silicon, which is an active layer of the thin film transistor; Depositing a second metal layer on the surface of which an oxide film which is a good conductor or a semiconductor in resistivity is formed on the first metal layer, and using a photoresist provided on the second metal layer as a mask Forming a source electrode and a drain electrode of a thin film transistor including the first metal layer and the second metal layer by successively etching the first metal layer and the second metal layer; After the removal, a transparent conductive thin film is deposited, and the second conductive or drain electrode is deposited.
And a step of electrically connecting to the metal layer portion, whereby the above object is achieved.

Further, the method of manufacturing a thin film transistor according to the present invention comprises a step of depositing a first metal layer mainly composed of Al and connected to a semiconductor layer mainly composed of silicon which is an active layer of the thin film transistor; Using the photoresist provided on the first metal layer as a mask, the first
Forming a source electrode and a drain electrode of the thin film transistor by etching the metal layer of the thin film transistor, and after removing the photoresist, applying a negative type photoresist and exposing with a photomask for forming the source electrode and the drain electrode. A step of forming a mask of negative photoresist in a region other than the source electrode and the drain electrode, and a step of depositing a second metal layer on the surface of which an oxide film which is a good conductor or a semiconductor in resistivity is formed on the mask Removing the negative photoresist and simultaneously removing the second metal layer deposited on the negative photoresist, leaving the second metal layer on the first metal layer, and removing the first metal layer and Forming a source electrode and a drain electrode of the thin film transistor including the second metal layer; Depositing a transparent conductive thin film on the in-electrode, characterized by having a step of electrically connecting the second metal layer of the source electrode or the drain electrode, the object is achieved.

The method for manufacturing a thin film transistor according to the present invention comprises:
In a method of manufacturing a thin film transistor formed over a substrate having an insulating surface, at least a first metal layer mainly composed of Al is connected to a semiconductor layer mainly composed of silicon which is an active layer of the thin film transistor. Forming a source electrode and a drain electrode of the thin film transistor by etching the first metal layer using a photoresist provided on the first metal layer as a mask; After removing, applying a negative photoresist, forming a mask of a negative photoresist in a region other than the source electrode and the drain electrode by exposing with a photomask for forming the source electrode and the drain electrode, An oxide film having a resistivity lower than that of Al ₂ O _{3 having} a resistivity of 1 × 10 ²² Ωcm is formed on the mask. Mo, which is a metal material formed on the surface,
Depositing a second metal layer made of at least one selected from Ti, W, Nb, and Ni; removing the negative photoresist and simultaneously depositing the second metal layer deposited on the negative photoresist; Removing the metal layer, leaving the second metal layer on the first metal layer so that the source electrode and the drain electrode of the thin film transistor including the first metal layer and the second metal layer Forming a source electrode and a drain electrode
There is formed a planarization film on the entire surface of the substrate formed, a contact hole is formed in the planarizing film on the de <br/> drain electrode,
Depositing a transparent conductive thin film on the flattening film and in the contact hole, characterized in that it comprises a step of electrically connecting the second metal layer portion of the drain electrode, the objective accomplished by the Is done.

The method for manufacturing a thin film transistor according to the present invention comprises:
In a method of manufacturing a thin film transistor formed over a substrate having an insulating surface, at least a first metal layer mainly composed of Al is connected to a semiconductor layer mainly composed of silicon which is an active layer of the thin film transistor. Using the photoresist of the shape of the source electrode and the drain electrode of the predetermined thin film transistor provided on the first metal layer as a mask, so that the end face of the first metal layer is an end face of the mask made of the photoresist. forming so as inwardly than, after removing the photoresist, on the first metal layer, Al ₂ O ₃ of resistivity 1 × 1
Depositing a second metal layer made of at least one selected from the group consisting of Mo, Ti, W, Nb, and Ni, which is a metal material having an oxide film having a resistivity lower than 0 ²² Ωcm formed on the surface thereof; An end face of the second metal layer is made closer to an end face of the first metal layer by using a photoresist having a shape of a source electrode and a drain electrode of the predetermined thin film transistor provided on the second metal layer as a mask. be etched so that the outside, forming a source electrode and a drain electrode of the thin film transistor composed of the first metal layer and said second metal layer, after removing the photoresist, the Source and drain electrodes
Forming a planarization film on the whole surface of the formed substrate, a contact hole is formed in the planarizing film on the drain <br/> in electrodes, a transparent conductive thin film on the flattening film and in the contact holes depositing said to the step of electrically connecting the second metal layer portion of the drain electrode, wherein the wrapping, the objects can be achieved.

[0019]

According to the thin film transistor of the present invention, Al
By depositing a second metal for forming an oxide film which is a good conductor or a semiconductor on the surface on the source electrode or the drain electrode made of the alloy and forming a cap electrode, the surface of the drain electrode of the TFT made of the Al alloy is formed. Is not exposed to an oxidizing atmosphere during the deposition of the transparent conductive thin film made of ITO or the like, and an insulating oxide film is not formed on the surface of the drain electrode. Even if the metal material forming the cap electrode is exposed to an oxidizing atmosphere during the deposition of the transparent conductive thin film made of ITO or the like and an oxide film is formed on the surface, the oxide film is not insulating, so the transparent conductive film made of ITO or the like is used. Good contact with the conductive thin film can be easily obtained. Further, since a cap electrode made of a metal having a melting point higher than that of the Al alloy is formed on the source electrode and the drain electrode of the TFT made of the Al alloy, the heat resistance of the source electrode and the drain electrode made of the Al alloy is improved, and hillocks and migration are prevented. Is effectively suppressed.

Further, according to the present invention, since the surface of the first electrode is covered with the second electrode, the wiring of the first electrode depends on the difference in etching rate between the first electrode and the second electrode. The width does not become smaller than the predetermined width, and the contact area with the transparent conductive thin film does not decrease.

Further, according to the present invention, since the first electrode and the second electrode are connected via the contact hole, there is no possibility that the first electrode is exposed due to a difference in etching rate. Sufficient contact can be obtained even if displacement occurs.

According to the method of manufacturing a thin film transistor of the present invention, when forming the cap electrode made of the second metal, the same mask is used for the source electrode and the drain electrode of the thin film transistor and the cap electrode made of the second metal. Since it is used for continuous etching, processes such as application, exposure, and development of a photoresist can be performed only once, and manufacturing can be performed without increasing the number of processes.

According to another manufacturing method, after forming a source electrode and a drain electrode of a thin film transistor, a pattern made of a negative resist is formed, a second metal is deposited thereon, and the negative resist is removed. Since the second metal deposited on the upper surface is removed, processes such as application, exposure, and development of a photoresist are increased, but an etching process for forming a cap electrode made of the second metal is unnecessary. . Thereby, a dimensional shift due to a difference in etching rate can be prevented.

As described above, according to the present invention, a stable connection between a transparent conductive thin film such as ITO and a source electrode or a drain electrode of a TFT can be easily obtained. And a semiconductor device or a semiconductor circuit composed of these TFTs can be manufactured efficiently.

[0026]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The details of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a TFT of the present invention. A base film 2 made of a SiO ₂ film or the like is deposited on the entire surface of an insulating substrate 1. A semiconductor layer made of a polycrystalline silicon film is formed thereon in an island shape. Next, a gate insulating film 4 made of a SiO ₂ film or the like is deposited on the entire surface of the insulating substrate 1 including the semiconductor layer. Next, a gate electrode 5 made of an Al alloy or the like is formed in a predetermined shape on the semiconductor layer via the gate insulating film 4. The region of the semiconductor layer below the gate electrode 5 becomes the channel region 6, and the other regions are doped with impurities to become the source region and the drain region 7. Next, an interlayer insulating film 8 is deposited on the entire surface including on the gate electrode 5. Thereafter, contact holes 9 are opened in the interlayer insulating film 8 and the gate insulating film 4 on the source region and the drain region 7. Source electrode and drain electrode 1 made of Al alloy
0 is formed in a predetermined shape, and is connected to the source region and the drain region 7 through the contact hole 9. On the source electrode and the drain electrode 10, a cap electrode 11 made of a metal such as Mo, Ti, or W is formed. A flattening film 1 made of polyimide resin or acrylic resin is formed on the entire surface.
2 is deposited, and a contact hole 13 is opened on the cap electrode 11. A transparent conductive thin film made of ITO or the like is formed in a predetermined shape, becomes a pixel electrode 14, and is connected to the cap electrode 11 via the contact hole 13.

In the above structure, when the TFT is used as a switching element of a picture element electrode of a liquid crystal display device, the gate electrode and the source electrode are connected to a gate wiring and a source wiring which are arranged at right angles to each other. TFT
Is formed. In this way, the TFT substrate on which the gate wiring and the source wiring and the TFT are formed is sealed with the opposing substrate on which the opposing electrode is formed and the electrode on the inner side, sealing the peripheral portion of the TFT substrate and the opposing substrate, and facing the TFT substrate. A liquid crystal is sealed between the substrates to form a liquid crystal display device.

As a result of an experiment conducted by the inventors, a case where a transparent conductive thin film made of ITO or the like is deposited on an electrode made of an Al alloy and a case where an electrode formed of a transparent conductive thin film made of an ITO or the like are formed on the contrary. It has been found that when an Al alloy is deposited thereon, connection failure between the electrodes is more likely to occur when a transparent conductive thin film made of ITO or the like is deposited on an electrode made of an Al alloy.

In general, a metal often forms an extremely thin natural oxide film on its surface in the air. In particular, Al easily forms a natural oxide film, and the resistivity of Al ₂ O ₃ , which is an Al oxide film, is 1 × 10 ²² Ωcm. That is, Al ₂ O _3, which is an oxide film of Al, does not necessarily have high insulating properties. These suggest that the oxide film of Al may cause a connection failure between the electrodes, and it is presumed that the oxide film is formed by some influence on the surface of the electrode made of the Al alloy. Based on the above results, the inventors have further studied diligently, and have set IT on the electrode made of Al alloy.
When a transparent conductive thin film made of O or the like is deposited, connection failure between the electrodes is likely to occur, when a transparent conductive thin film made of ITO or the like is deposited by sputtering on an electrode made of an Al alloy. This is because, by holding the substrate on which the electrode made of the Al alloy is formed in the chamber of the sputtering apparatus in an oxidizing atmosphere, the formation of an insulating oxide film on the surface of the electrode made of the Al alloy is further promoted. And came to the conclusion. The oxide film formed on the surface of the electrode is extremely thin, but if the oxidation of the surface of the electrode is promoted during the step of depositing a transparent conductive thin film made of ITO or the like by a sputtering method, After depositing the transparent conductive thin film made of ITO or the like, it is impossible to remove only the oxide film formed near the joint surface between the transparent conductive thin film and the electrode.

Then, the present inventors made TFTs made of Al alloy.
It was studied to provide a cap electrode made of a material different from the Al alloy on the drain electrode. As the cap electrode, a metal material which forms a good contact with the Al alloy and satisfies conditions such as low electric resistance is effective. FIG.
4 shows the resistivity of a metal such as Al. According to this, the resistivity of Al shows the lowest value.
o, W, Ni, etc. also have sufficiently low resistivity. Ti has a higher resistivity than these, but in the present invention, since the cap electrode is merely an auxiliary electrode, the value of the resistivity is within an allowable range. Rather, considering the stability of Ti as a metal material, the present invention is effective as a metal material used for a cap electrode in the present invention.

FIG. 15 shows the resistivity of a typical oxide film of a metal other than Al shown in FIG. W, N
The resistivity of WO ₂ , NiO, Ti ₂ O _3, etc., which is an oxide film of i and Ti, is much lower than that of Al ₂ O ₃ . Especially Nb and M
NbO and MoO _2, which are oxide films of o, have good conductivity. By providing a cap electrode made of a metal such as Mo, Ti, W or the like having a sufficiently low resistivity of the metal material itself and a low resistivity of the oxide film on the drain electrode of the TFT made of the Al alloy, the ITO is formed. It has been found that a stable connection with a transparent conductive thin film made of ITO or the like can be obtained even if the surface of the electrode is exposed to an oxidizing atmosphere when depositing a transparent conductive thin film made of such as.

(Embodiment 1) Next, the manufacturing method of the present invention will be described in detail. 2 (a) to 2 (d) are cross-sectional views of each step in the manufacturing method of the present invention, and FIGS. 3 (a) to 3 (d).
FIG. 3 is a plan view corresponding to each step of FIGS.

In the embodiments of the present invention, a glass substrate will be described as an example of an insulating substrate. If the process temperature is a quartz substrate, it can withstand a high temperature process of 1200 ° C., but if a glass substrate is used, the process is limited to a low temperature of about 600 ° C. due to a low strain point. A glass substrate is more advantageous when an inexpensive substrate having a larger area is to be used. As shown in FIGS. 2 (a) and 3 (a), first, a reduced pressure C is applied on an insulating substrate 1 such as a glass substrate.
An SiO ₂ film having a thickness of 300 n is formed as an insulating film serving as the base film 2 by a VD method, a plasma CVD method, a sputtering method, or the like.
about m. Next, low pressure CVD or plasma CV
The amorphous silicon thin film is formed to a thickness of 10 to 100 nm by the D method or the like.
For example, it is deposited to a thickness of about 50 nm. In the above-described process, there is no problem even if a process such as heat treatment is added between the process of depositing the base film 2 and the process of depositing the amorphous silicon thin film. For example, after a first insulating film serving as a base film is formed on an insulating substrate, a heat treatment or the like is performed to densify the insulating film and improve the film quality, and then an amorphous silicon thin film is deposited. The effect of the invention is not impaired. In the embodiment of the present invention, a polycrystalline silicon thin film is formed by irradiating a pulse laser such as an excimer laser to the amorphous silicon thin film and melting and recrystallizing the amorphous silicon thin film. .

Next, as shown in FIGS. 2B and 3B, a gate insulating film 4 made of a SiO ₂ film or the like is deposited on the active layer 3 to a thickness of about 100 to 150 nm. Next, the gate electrode 5 is formed. It is preferable to use an Al-based metal which is a low-resistance wiring material for the gate electrode. It is preferable to use an Al alloy such as Al-Ti in consideration of heat resistance and the like. In the embodiment of the present invention, 300 nm to 500 n
m. Next, a gate electrode 5 is formed on the active layer 3.
Implantation as a mask, laser doping,
Alternatively, impurity ions such as phosphorus and boron are implanted by using a plasma doping method or the like. After that, activation of impurity ions is performed using a method such as laser annealing to form a source region and a drain region 7. The region below the gate electrode 5 into which the impurity ions are not implanted becomes the channel region 6.

Next, as shown in FIGS. 2C and 3C, an interlayer insulating film 8 is deposited on the entire surface. Plasma C made of organic silane with good step coverage
Several hundred nm to several μm of an SiO ₂ film is deposited by a VD method or the like. Alternatively, a silicon nitride film can be used. Next, a contact hole 9 is opened in the interlayer insulating film 8 and the gate insulating film 4, and a source electrode and a drain electrode 10 are formed. The source electrode and the drain electrode 10 are formed of an Al-based metal similarly to the gate electrode 5. Next, a cap electrode 11 made of a metal such as Mo, Ti, or W is formed on the source electrode and the drain electrode 10. The main effect of the present invention can be obtained if the cap electrode 11 is provided at least on the drain electrode connected to the transparent conductive thin film made of ITO or the like. In the embodiment of the present invention, the source electrode is formed by sputtering or the like. And an Al alloy serving as the drain electrode 10 is deposited to a thickness of about 300 nm to 500 nm, and then Mo, which serves as the cap electrode 11 continuously,
A metal such as Ti or W was deposited to a thickness of about 100 nm to 200 nm, and these two layers were formed by performing continuous etching so as to have a shape of a source electrode and a drain electrode. At the time of etching, different etching solutions may be used for the cap electrode 11 and the source electrode and the drain electrode 10.
When Mo is used, the cap electrode 11 made of Mo and the Al are mixed by using an etching solution in which phosphoric acid, nitric acid, acetic acid, and water are mixed at a ratio of 32: 1: 3: 4, respectively.
It is possible to continuously etch the source electrode and the drain electrode 10 made of an alloy with the same etching solution. Further, the etching may be performed by dry etching.

With this structure, in addition to requiring only one photomask for patterning and etching, a metal having a melting point higher than that of Al is laminated on the upper layer, so that the lower layer Al alloy can be removed. The heat resistance of the source electrode and the drain electrode 10 is increased, hillocks and migration are suppressed, and the reliability of the wiring is dramatically improved.

Next, as shown in FIGS. 2D and 3D, a flattening film 12 made of a polyimide resin or an acrylic resin is formed on the entire surface. The planarization film 12 can be formed by applying a polyimide resin or an acrylic resin dropwise onto the surface of the substrate and rotating the substrate at high speed, that is, spin coating to form a uniform film thickness. In the embodiment of the present invention, 2 μm to
It was formed to a thickness of 3 μm. Next, a contact hole 13 is opened in the planarizing film 12 on the drain electrode provided with the cap electrode 11. The size of the contact hole 13 is 5
It is about μm to 15 μm. Subsequently, a transparent conductive thin film made of ITO or the like is deposited by a sputtering method or the like.
In the embodiment of the present invention, the ITO film is made of, for example, Ar100s.
Deposition was performed at about 100 nm under the conditions of ccm, 4 sccm of O ₂ , 0.22 Pa, and 200 ° C. The deposited ITO film is patterned into a predetermined shape of the pixel electrode 14, and is electrically connected to the cap electrode 11 via the contact hole 13. In the embodiment of the present invention, ITO is used for the pixel electrode.
Although a film was used, a similar effect can be obtained by using a SnO ₂ film.

As described above, in the embodiment of the present invention, the example of the coplanar TFT using the polycrystalline silicon film for the active layer of the TFT has been described, but the present invention is not limited to this. For example, an amorphous silicon film or a microcrystalline silicon film may be used for the active layer of the TFT without any problem. Further, even when the present invention is applied to an inverted stagger type TFT, exactly the same effects can be obtained.

(Embodiment 2) Next, details of another manufacturing method of the present invention will be described. FIGS. 4A to 4E are cross-sectional views of each step of the manufacturing method of the present invention. Note that the plan view is not shown because it is almost the same as that of the first embodiment.

In the embodiments of the present invention, a glass substrate will be described as an example of an insulating substrate. If the process temperature is a quartz substrate, it can withstand a high-temperature process of 1200 ° C., but if a glass substrate is used, the strain point is low and is limited to a low temperature of about 600 ° C. A glass substrate is more advantageous when an inexpensive substrate having a larger area is to be used. As shown in FIG. 4A, first, a low pressure CVD method and a plasma CVD method are applied on an insulating substrate 1 such as a glass substrate.
An SiO ₂ film having a thickness of about 300 nm is deposited as an insulating film to be the base film 2 by a VD method, a sputtering method, or the like. Next, an amorphous silicon thin film is deposited to a thickness of 10 to 100 nm, for example, about 50 nm by a low pressure CVD method or a plasma CVD method. In the above-described process, there is no problem even if a process such as heat treatment is added between the process of depositing the base film 2 and the process of depositing the amorphous silicon thin film. For example, after a first insulating film serving as a base film is formed on an insulating substrate, a heat treatment or the like is performed to densify the insulating film and improve the film quality, and then an amorphous silicon thin film is deposited. The effect of the invention is not impaired. In the embodiment of the present invention, a polycrystalline silicon thin film is formed by irradiating a pulse laser such as an excimer laser to the amorphous silicon thin film and melting and recrystallizing the amorphous silicon thin film. .

Next, as shown in FIG. 4B, a gate insulating film 4 made of a SiO ₂ film or the like is
Deposit about 150 nm. Next, the gate electrode 5 is formed. It is preferable to use an Al-based metal which is a low-resistance wiring material for the gate electrode. Considering heat resistance etc.
It is preferable to use an Al alloy such as Ti. In the embodiment of the present invention, the film is formed to have a thickness of about 300 nm to 500 nm. Next, impurity ions such as phosphorus and boron are implanted into the active layer 3 using the gate electrode 5 as a mask by ion implantation, laser doping, plasma doping, or the like. After that, activation of impurity ions is performed using a method such as laser annealing to form a source region and a drain region 7. The region below the gate electrode 5 into which the impurity ions are not implanted becomes the channel region 6.

Next, as shown in FIG. 4C, an interlayer insulating film 8 is deposited on the entire surface. The interlayer insulating film is made of S by a plasma CVD method using an organic silane material having good step coverage.
An iO ₂ film is deposited for several hundred nm to several μm. Alternatively, a silicon nitride film can be used. Next, a contact hole 9 is opened in the interlayer insulating film 8 and the gate insulating film 4,
The source electrode and the drain electrode 10 are formed by patterning. The source electrode and the drain electrode 10 are formed of an Al-based metal similarly to the gate electrode 5. In the embodiment of the present invention, an Al alloy serving as the source electrode and the drain electrode 10 is deposited to a thickness of about 300 nm to 500 nm by a sputtering method or the like, and then formed by etching.
Subsequently, a negative photoresist 15 is applied and exposed using a mask used for patterning the source and drain electrodes 10 to form a resist pattern in a region other than the source and drain electrodes 10. Next, a metal such as Mo, Ti, or W serving as a cap electrode is deposited to a thickness of about 100 nm to 200 nm by a sputtering method or the like.

Next, as shown in FIG. 4D, the metal film deposited on the photoresist is simultaneously removed by peeling the photoresist 15, and the metal film is formed only on the source electrode and the drain electrode 10 by so-called lift-off. Are left to form the cap electrode 11.

With such a structure, in addition to requiring only one photomask for patterning and etching, a metal having a melting point higher than that of Al is laminated on the upper layer, so that the lower layer Al alloy is removed. The heat resistance of the source electrode and the drain electrode 10 is increased, hillocks and migration are suppressed, and the reliability of the wiring is dramatically improved.

Next, as shown in FIG. 4E, a flattening film 12 made of a polyimide resin or an acrylic resin is formed on the entire surface. The planarization film 12 can be formed by applying a polyimide resin or an acrylic resin dropwise onto the surface of the substrate and rotating the substrate at high speed, that is, spin coating to form a uniform film thickness. In the embodiment of the present invention, the film is formed to have a thickness of 2 μm to 3 μm. Next, a contact hole 13 is opened in the planarizing film 12 on the drain electrode provided with the cap electrode 11. The size of the contact hole 13 is 5 μm to 15 μm
It is about. Subsequently, a transparent conductive thin film made of ITO or the like is deposited by a sputtering method or the like. In the embodiment of the present invention, the ITO film is formed, for example, of Ar 100 sccm, O ₂ 4
about 100 n under the conditions of sccm, 0.22 Pa and 200 ° C.
m. The deposited ITO film is patterned into a predetermined shape of the pixel electrode 14, and the contact hole 1 is formed.
3 and is electrically connected to the cap electrode 11. In the embodiment of the present invention, the ITO film is used for the pixel electrode.
The same effect can be obtained by using the SnO ₂ film.

In the first embodiment, the cap electrode is formed in the same shape as the source electrode and the drain electrode. However, as shown in FIG. Due to this difference, the wiring width may be narrower than a predetermined width during etching. In such a state, since the insulating oxide film 16 is formed on the surface of the drain electrode made of the Al alloy, the effective area in contact with the transparent conductive thin film made of ITO or the like is reduced. Further, as shown in FIG. 9B, if the position of the contact hole opened in the flattening film is shifted due to an alignment error or the like, the effective area is further reduced, and a sufficient contact is obtained. Will not be. In the embodiment of the present invention, since the cap electrode is formed by lift-off, a dimensional shift of the cap electrode due to etching does not occur. Therefore, FIG.
As shown by 0, even if the position of the contact hole opened in the flattening film is shifted, it is possible to secure a sufficient contact with the drain electrode.

As described above, in the embodiment of the present invention, an example of a coplanar TFT using a polycrystalline silicon film as an active layer of the TFT has been described, but the present invention is not limited to this. For example, an amorphous silicon film or a microcrystalline silicon film may be used for the active layer of the TFT without any problem. Further, even when the present invention is applied to an inverted stagger type TFT, exactly the same effects can be obtained.

(Embodiment 3) Next, details of another manufacturing method of the present invention will be described. FIGS. 5A to 5E are cross-sectional views of each step in the manufacturing method of the present invention, and FIGS.
(E) is a plan view corresponding to each step of FIGS. 5 (a) to (e).

In the embodiments of the present invention, a glass substrate will be described as an example of an insulating substrate. If the process temperature is a quartz substrate, it can withstand a high-temperature process of 1200 ° C., but if a glass substrate is used, the strain point is low and is limited to a low temperature of about 600 ° C. A glass substrate is more advantageous when an inexpensive substrate having a larger area is to be used. As shown in FIGS. 5 (a) and 6 (a), first, a reduced pressure C is applied on an insulating substrate 1 such as a glass substrate.
An SiO ₂ film having a thickness of 300 n is formed as an insulating film serving as the base film 2 by a VD method, a plasma CVD method, a sputtering method, or the like.
about m. Next, low pressure CVD or plasma CV
The amorphous silicon thin film is formed to a thickness of 10 to 100 nm by the D method or the like.
For example, it is deposited to a thickness of about 50 nm. In the above-described process, there is no problem even if a process such as heat treatment is added between the process of depositing the base film 2 and the process of depositing the amorphous silicon thin film. For example, after a first insulating film serving as a base film is formed on an insulating substrate, a heat treatment or the like is performed to densify the insulating film and improve the film quality, and then an amorphous silicon thin film is deposited. The effect of the invention is not impaired. In the embodiment of the present invention, a polycrystalline silicon thin film is formed by irradiating a pulse laser such as an excimer laser to the amorphous silicon thin film and melting and recrystallizing the amorphous silicon thin film. .

Next, as shown in FIGS. 5B and 6B, a gate insulating film 4 made of a SiO ₂ film or the like is deposited on the active layer 3 to a thickness of about 100 to 150 nm. Next, the gate electrode 5 is formed. It is preferable to use an Al-based metal which is a low-resistance wiring material for the gate electrode. It is preferable to use an Al alloy such as Al-Ti in consideration of heat resistance and the like. In the embodiment of the present invention, 300 nm to 500 n
m. Next, a gate electrode 5 is formed on the active layer 3.
Implantation as a mask, laser doping,
Alternatively, impurity ions such as phosphorus and boron are implanted by using a plasma doping method or the like. After that, activation of impurity ions is performed using a method such as laser annealing to form a source region and a drain region 7. The region below the gate electrode 5 into which the impurity ions are not implanted becomes the channel region 6.

Next, as shown in FIGS. 5C and 6C, an interlayer insulating film 8 is deposited on the entire surface. Plasma C made of organic silane with good step coverage
Several hundred nm to several μm of an SiO ₂ film is deposited by a VD method or the like. Alternatively, a silicon nitride film can be used. Next, a contact hole 9 is opened in the interlayer insulating film 8 and the gate insulating film 4, and a source electrode and a drain electrode 10 are formed. The source electrode and the drain electrode 10 are formed using an Al-based metal similarly to the gate electrode 5. In the embodiment of the present invention, the Al alloy which becomes the source electrode and the drain electrode 10 by sputtering or the like is 300 nm to 50 nm.
It is deposited to a thickness of about 0 nm, and the side surface of the Al alloy is etched when patterning using the photoresist 15 as a mask, that is, so-called side etching is performed so as to be thinner than the regular wiring width of the source and drain electrodes 10. did.

Another method is to use a photoresist 1
5 is formed to be smaller than the normal wiring width of the source electrode and the drain electrode 10. By controlling the exposure time, the resist curing condition, the developing condition, and the like, the width of the photoresist 15 can be formed smaller than normal. For example, the width of the photoresist 15 can be reduced by lengthening the exposure time as compared with the case of forming a regular resist pattern, that is, by exposing excessively.
According to the side etching described above, it is necessary to perform extra etching for the time required for etching the side surface as compared with the regular etching time, and in some cases, a lower layer film or the like may be adversely affected. If the width of the photoresist 15 is formed to be narrow in advance, it is not necessary to perform excessive etching, and there is no adverse effect on the underlying film and the like.

Next, as shown in FIGS. 5D and 6D, Mo, T
A cap electrode 11 made of a metal such as i or W is formed.
If the cap electrode 11 is provided at least on the drain electrode connected to the transparent conductive thin film made of ITO or the like, the main effects of the present invention can be obtained. In the embodiment of the present invention, the cap electrode is provided on the drain electrode. M to be 11
Metals such as o, Ti, and W are deposited to a thickness of about 100 nm to 200 nm, and are formed by performing etching so that the wiring widths and shapes of regular source and drain electrodes are obtained. The source electrode and the drain electrode formed as described above can be coated on the side surfaces.
With such a structure, in addition to requiring only one photomask for patterning and etching, a metal having a melting point higher than that of Al is laminated on the upper layer, so that the source electrode made of the lower Al alloy is formed. In addition, the heat resistance of the drain electrode 10 is increased, the occurrence of hillocks and migration is suppressed, and the reliability of the wiring is dramatically improved.

Next, as shown in FIGS. 5E and 6E, a flattening film 12 made of a polyimide resin or an acrylic resin is formed on the entire surface. The planarization film 12 can be formed by applying a polyimide resin or an acrylic resin dropwise onto the surface of the substrate and rotating the substrate at high speed, that is, spin coating to form a uniform film thickness. In the embodiment of the present invention, 2 μm to
It was formed to a thickness of 3 μm. Next, a contact hole 13 is opened in the planarizing film 12 on the drain electrode provided with the cap electrode 11. The size of the contact hole 13 is 5
It is about μm to 15 μm. Subsequently, a transparent conductive thin film made of ITO or the like is deposited by a sputtering method or the like.
In the embodiment of the present invention, the ITO film is made of, for example, Ar100s.
Deposition was performed at about 100 nm under the conditions of ccm, 4 sccm of O ₂ , 0.22 Pa, and 200 ° C. The deposited ITO film is patterned into a predetermined shape of the pixel electrode 14, and is electrically connected to the cap electrode 11 via the contact hole 13. In the embodiment of the present invention, ITO is used for the pixel electrode.
Although a film was used, a similar effect can be obtained by using a SnO ₂ film.

In the first embodiment, the cap electrode is formed in the same shape as the source electrode and the drain electrode. However, as shown in FIG. 9A, depending on the metal used for the cap electrode, etching with an Al alloy is performed. It is also conceivable that the wiring width becomes narrower than a predetermined width during etching due to the difference in the rate. In such a state, since the insulating oxide film 16 is formed on the surface of the drain electrode made of the Al alloy, the effective area in contact with the transparent conductive thin film made of ITO or the like is reduced. However, in the embodiment of the present invention, since the cap electrode covers the drain electrode, the wiring width does not decrease due to the difference in the etching rate. Further, as shown in FIG. 9B, if the position of the contact hole opened in the flattening film is shifted due to an alignment error or the like in such a state, the effective area is further reduced, and sufficient Contact cannot be obtained. In the embodiment of the present invention, as shown in FIG. 11, since the surface of the drain electrode is formed to be covered with the cap electrode 11, even if the position of the contact hole 13 opened in the planarization film 12 is shifted, It is possible to secure sufficient contact with the electrode.

As described above, in the embodiment of the present invention, an example of a coplanar TFT using a polycrystalline silicon film as an active layer of the TFT has been described. However, the present invention is not limited to this. For example, an amorphous silicon film or a microcrystalline silicon film may be used for the active layer of the TFT without any problem. Further, even when the present invention is applied to an inverted stagger type TFT, exactly the same effects can be obtained.

(Embodiment 4) Next, details of another manufacturing method of the present invention will be described. FIGS. 7A to 7D are cross-sectional views of each step in the manufacturing method of the present invention, and FIGS.
(D) is a plan view corresponding to FIGS. 7 (a) to (d).

In the embodiments of the present invention, a glass substrate will be described as an example of an insulating substrate. If the process temperature is a quartz substrate, it can withstand a high temperature process of 1200 ° C., but if a glass substrate is used, the process is limited to a low temperature of about 600 ° C. due to a low strain point. A glass substrate is more advantageous when an inexpensive substrate having a larger area is to be used. As shown in FIGS. 7 (a) and 8 (a), first, a reduced pressure C is applied on an insulating substrate 1 such as a glass substrate.
An SiO ₂ film having a thickness of 300 n is formed as an insulating film serving as the base film 2 by a VD method, a plasma CVD method, a sputtering method, or the like.
about m. Next, low pressure CVD or plasma CV
The amorphous silicon thin film is formed to a thickness of 10 to 100 nm by the D method or the like.
For example, it is deposited to a thickness of about 50 nm. In the above-described process, there is no problem even if a process such as heat treatment is added between the process of depositing the base film 2 and the process of depositing the amorphous silicon thin film. For example, after a first insulating film serving as a base film is formed on an insulating substrate, a heat treatment or the like is performed to densify the insulating film and improve the film quality, and then an amorphous silicon thin film is deposited. The effect of the invention is not impaired. In the embodiment of the present invention, a polycrystalline silicon thin film is formed by irradiating a pulse laser such as an excimer laser to the amorphous silicon thin film and melting and recrystallizing the amorphous silicon thin film. .

Next, as shown in FIGS. 7B and 8B, a gate insulating film 4 made of a SiO ₂ film or the like is deposited on the active layer 3 to a thickness of about 100 to 150 nm. Next, the gate electrode 5 is formed. It is preferable to use an Al-based metal which is a low-resistance wiring material for the gate electrode. It is preferable to use an Al alloy such as Al-Ti in consideration of heat resistance and the like. In the embodiment of the present invention, 300 nm to 500 n
m. Next, a gate electrode 5 is formed on the active layer 3.
Implantation as a mask, laser doping,
Alternatively, impurity ions such as phosphorus and boron are implanted by using a plasma doping method or the like. After that, activation of impurity ions is performed using a method such as laser annealing to form a source region and a drain region 7. The region below the gate electrode 5 into which the impurity ions are not implanted becomes the channel region 6.

Next, as shown in FIGS. 7C and 8C, an interlayer insulating film 8 is deposited on the entire surface. Plasma C made of organic silane with good step coverage
Several hundred nm to several μm of an SiO ₂ film is deposited by a VD method or the like. Alternatively, a silicon nitride film can be used. Next, a contact hole 9 is opened in the interlayer insulating film 8 and the gate insulating film 4, and a source electrode and a drain electrode 10 are formed. The source electrode and the drain electrode 10 are formed of an Al-based metal similarly to the gate electrode 5. Next, a flattening film 12 made of polyimide resin or acrylic resin is formed on the entire surface. The planarization film 12 can be formed by applying a polyimide resin or an acrylic resin dropwise onto the surface of the substrate and rotating the substrate at high speed, that is, spin coating to form a uniform film thickness. In the embodiment of the present invention, the film is formed to have a thickness of 2 μm to 3 μm. Next, a contact hole 13 is opened in the planarization film 12 on the drain electrode. The size of the contact hole 13 is about 5 μm to 15 μm. Then Mo on the whole surface,
A cap electrode 11 is formed by depositing Ti, W, or the like to a thickness of about 100 nm to 200 nm and then patterning. The cap electrode 11 is electrically connected to the drain electrode via the contact hole 13.

Next, as shown in FIGS. 7D and 8D, a transparent conductive thin film made of ITO or the like is deposited by a sputtering method or the like. In the embodiment of the present invention, IT
The O film is made of, for example, Ar 100 sccm, O ₂ 4 sccm,
About 100 nm was deposited under the conditions of 0.22 Pa and 200 ° C. The deposited ITO film is patterned into a predetermined shape of the pixel electrode 14 and is electrically connected to the cap electrode 11. Although the ITO film is used for the pixel electrode in the embodiment of the present invention, the same effect can be obtained by using the SnO ₂ film.

In the first embodiment, the cap electrode is formed in the same shape as the source electrode and the drain electrode. However, as shown in FIG. 9A, depending on the metal used for the cap electrode, etching with an Al alloy is performed. It is also conceivable that the wiring width becomes narrower than a predetermined width during etching due to the difference in the rate. In such a state, since the insulating oxide film 16 is formed on the surface of the drain electrode made of the Al alloy, the effective area in contact with the transparent conductive thin film made of ITO or the like is reduced. Further, as shown in FIG. 9B, if the position of the contact hole opened in the flattening film is shifted due to an alignment error or the like in such a state, the effective area is further reduced, and sufficient Contact cannot be obtained. In the embodiment of the present invention, as shown in FIG. 12, the cap electrode is formed after opening the contact hole 13 in the planarizing film 12 on the drain electrode, so that the cap electrode 11 is not thinned by etching. . Further, even if the position of the contact hole opened in the flattening film is shifted, a sufficient contact with the drain electrode can be ensured.

As described above, in the embodiment of the present invention, the example of the coplanar type TFT using the polycrystalline silicon film for the active layer of the TFT has been described, but the present invention is not limited to this. For example, an amorphous silicon film or a microcrystalline silicon film may be used for the active layer of the TFT without any problem. Further, even when the present invention is applied to an inverted stagger type TFT, exactly the same effects can be obtained.

[0064]

As described above, according to the TFT and the method of manufacturing the same of the present invention as described above, at least one of the source electrode and the drain electrode of the TFT on the electrode side connected to the transparent conductive thin film made of ITO or the like. That is, a cap electrode made of a metal such as Mo, Ti, or W is provided on the exposed portion, and a transparent conductive thin film made of ITO or the like is electrically connected to the cap electrode. Thereby, Al
The surface of the drain electrode of the TFT made of an alloy is not exposed to an oxidizing atmosphere when depositing a transparent conductive thin film made of ITO or the like, and an insulating oxide film is not formed on the surface. Even if a metal made of Mo, Ti, W, or the like is exposed to an oxidizing atmosphere during the deposition of a transparent conductive thin film made of ITO or the like to form an oxide film on the surface, the oxide film is not insulative and is a good conductor or semiconductor. Therefore, good contact with a transparent conductive thin film made of ITO or the like can be easily obtained.

Further, since the cap electrode made of a metal having a higher melting point than the Al alloy is formed on the source electrode and the drain electrode of the TFT made of the Al alloy, the heat resistance of the source electrode and the drain electrode made of the Al alloy is improved. Hillock and migration are effectively suppressed. As described above, according to the present invention, good contact between the drain electrode of a TFT and a transparent conductive thin film made of ITO or the like can be easily obtained, and a semiconductor device, a semiconductor circuit, or an active matrix type comprising such a TFT can be obtained. This is an industrially useful invention capable of efficiently manufacturing a liquid crystal display device and the like.

[Brief description of the drawings]

FIG. 1 is a cross-sectional view showing a TFT of the present invention.

FIG. 2 is a cross-sectional view illustrating a manufacturing process of the TFT according to the first embodiment.

FIG. 3 is a plan view illustrating a manufacturing process of the TFT according to the first embodiment.

FIG. 4 is a cross-sectional view illustrating a manufacturing process of the TFT according to the second embodiment.

FIG. 5 is a sectional view showing a manufacturing process of the TFT according to the third embodiment.

FIG. 6 is a plan view showing a manufacturing process of the TFT according to the third embodiment.

FIG. 7 is a cross-sectional view illustrating a manufacturing process of the TFT according to the fourth embodiment.

FIG. 8 is a plan view illustrating a manufacturing process of the TFT according to the fourth embodiment.

FIG. 9 is a partial cross-sectional view illustrating a case where a manufacturing error occurs in the first embodiment.

FIG. 10 is a partial cross-sectional view illustrating a case where a manufacturing error occurs in the second embodiment.

FIG. 11 is a partial sectional view showing a case where a manufacturing error occurs in the third embodiment.

FIG. 12 is a partial cross-sectional view illustrating a case where a manufacturing error occurs in Embodiment 4.

FIG. 13 is a sectional view showing a conventional TFT.

FIG. 14 is a diagram showing the resistivity of a metal material.

FIG. 15 is a diagram showing the resistivity of an oxide film of a metal material.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Insulating substrate 2 Underlayer 3 Active layer 4 Gate insulating film 5 Gate electrode 6 Channel region 7 Source region and drain region 8 Interlayer insulating film 9, 13 Contact hole 10 Source electrode and drain electrode 11 Cap electrode 12 Flattening film 14 Pixel Electrode 15 Photoresist 16 Oxide film

──────────────────────────────────────────────────続 き Continued on the front page (58) Field surveyed (Int.Cl. ⁷ , DB name) H01L 29/786 H01L 21/336 H01L 21/28 H01L 21/3205 H01L 21/768 H01L 29/40 H01L 29 / 46 G02F 1/1368

Claims (2)

(57) [Claims] 1. A method for manufacturing a thin film transistor formed over a substrate having an insulating surface, comprising: a first layer mainly containing Al connected to a semiconductor layer mainly containing silicon which is an active layer of the thin film transistor; Depositing a metal layer of; and etching the first metal layer using a photoresist provided on the first metal layer as a mask to form a source electrode and a drain electrode of the thin film transistor. After the removal of the photoresist, a negative photoresist is applied, and exposed by a photomask for forming the source electrode and the drain electrode, and a mask of the negative photoresist is formed in a region other than the source electrode and the drain electrode. Forming, and forming a resist of 1 × 10 ²² Ωcm on Al ₂ O ₃ on the mask.
Depositing a second metal layer made of at least one selected from the group consisting of Mo, Ti, W, Nb, and Ni, which is a metal material having an oxide film having a lower resistivity than the surface of the negative type. By removing the photoresist and simultaneously removing the second metal layer deposited on the negative photoresist, the second metal layer is left on the first metal layer to leave the first metal layer. Forming a source electrode and a drain electrode of the thin film transistor including the second metal layer, and forming the entirety of the substrate on which the source electrode and the drain electrode are formed.
Forming a planarization film on the surface, the contact holes are formed in the planarizing film on the drain electrode, depositing a transparent conductive thin film on the planarizing film on and in the contact hole, the drain <br/> Inn Electrically connecting the electrode to the second metal layer portion of the electrode. 2. A method for manufacturing a thin film transistor formed over a substrate having an insulating surface, wherein at least a first layer mainly composed of Al connected to a semiconductor layer mainly composed of silicon which is an active layer of the thin film transistor. Depositing a metal layer of the first metal layer, and using a photoresist having a shape of a source electrode and a drain electrode of the predetermined thin film transistor provided on the first metal layer as a mask, an end face of the first metal layer is formed by photolithography. Forming a resist inside the end face of the mask; and removing the photoresist and then forming a resist on the first metal layer, which is lower than the resistivity of Al ₂ O ₃ of 1 × 10 ²² Ωcm. Mo, which is a metal material having an oxide film having a resistivity formed on its surface,
Depositing a second metal layer made of at least one selected from Ti, W, Nb, and Ni; and a source electrode and a drain electrode of the predetermined thin film transistor provided on the second metal layer. Using a photoresist having a shape as a mask, etching is performed so that the end face of the second metal layer is outside the end face of the first metal layer, and the first metal layer and the second metal layer are etched. forming a source electrode and a drain electrode of constructed the thin film transistor, after removing the photoresist, the source electrode and
Forming a planarization film on the whole surface of the substrate where the drain electrode is formed, the contact holes are formed in the planarizing film on the drain electrode, depositing a transparent conductive thin film on the flattening film and in the contact holes the method of manufacturing a thin film transistor which is characterized by wrapping the steps of electrically connecting the second metal layer portion of the drain electrode.