JP2024029687A - Power conversion device - Google Patents

Abstract

To provide a power conversion device capable of reducing the current unbalance of a plurality of semiconductor modules connected in parallel.SOLUTION: A power conversion device of an embodiment includes a positive electrode conductor, a second electrode conductor, a first half bridge circuit including a plurality of first semiconductor modules connected in parallel between the positive electrode conductor and the negative electrode, a second half bridge circuit including a plurality of second semiconductor modules connected in parallel between the positive electrode conductor and the negative electrode conductor, and a plurality of DC capacitors connected in parallel between the positive electrode conductor and the negative electrode conductor. The positive electrode conductor has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules. The negative electrode conductor also has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules.SELECTED DRAWING: Figure 1

Description

Embodiments of the present invention relate to a power conversion device.

High-frequency insulation technology is beginning to be applied to auxiliary power supplies for railway vehicles in order to miniaturize isolation transformers. By generating AC power with a frequency higher than the commercial frequency (50 Hz or 60 Hz) using an inverter circuit, the size of the transformer can be significantly reduced, and the weight of the transformer can be significantly reduced. Such technology is used not only in auxiliary power supply devices for railway vehicles but also in power supply devices that require insulation of the power source, such as charging/discharging converters for storage batteries.

For example, a technique such as Patent Document 1 has been proposed. Patent Document 1 describes a method of converting DC power from an overhead wire into high-frequency AC power using an inverter circuit, insulating the power using a high-frequency transformer, and then supplying power to a load via a rectifier.

On the other hand, as the power supply device becomes higher in output, it becomes necessary to increase the number of switching elements used, such as semiconductor elements such as IGBTs and SiC-MOSFETs, in parallel.

At this time, it is desirable to flow current as evenly as possible to the plurality of semiconductor elements connected in parallel. However, there is a problem in that it is difficult to equalize the current balance to the plurality of semiconductor elements connected in parallel due to the influence of the inductance of the conductors that constitute the power converter.

Patent No. 6257925

The problem to be solved by the present invention is to provide a power conversion device that can reduce current imbalance of a plurality of semiconductor modules connected in parallel.

The power converter device according to the embodiment includes a positive conductor, a negative conductor, and a plurality of first semiconductor modules connected in parallel between the positive conductor and the negative conductor, wherein Each of the first half-bridge circuits includes a first switching element and a second switching element connected in series, and a plurality of second semiconductor modules connected in parallel between the positive conductor and the negative conductor. each of the plurality of second semiconductor modules includes a second half-bridge circuit configured by connecting a third switching element and a fourth switching element in series; and a second half-bridge circuit including the positive conductor and the negative conductor. and a plurality of DC capacitors connected in parallel between them. The plurality of first semiconductor modules are arranged in a line in a first direction. The plurality of second semiconductor modules are arranged in line in the first direction, and are arranged adjacent to the plurality of first semiconductor modules in a second direction orthogonal to the first direction. The positive electrode conductor has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules. The negative electrode conductor has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules.

FIG. 1 is a plan view of a power conversion device according to an embodiment. FIG. 2 is a cross-sectional view of the power converter taken along line AA' shown in FIG. FIG. 3 is a cross-sectional view of the power converter taken along line BB' shown in FIG. FIG. 4 is a cross-sectional view of the power converter taken along line CC' shown in FIG. FIG. 5 is an equivalent circuit diagram of the power conversion device shown in FIG. 1. FIG. 6 is a current waveform of the power conversion device according to the embodiment. FIG. 7 is a current waveform of a power conversion device according to a comparative example.

Hereinafter, embodiments will be described with reference to the drawings. Several embodiments shown below illustrate devices and methods for embodying the technical idea of the present invention, and the technical idea of the present invention is specified by the shape, structure, arrangement, etc. of the component parts. It is not something that will be done. In the following description, elements having the same functions and configurations are denoted by the same reference numerals, and redundant description will be omitted.

[1] Configuration of power converter 1 FIG. 1 is a plan view of power converter 1 according to an embodiment. The X direction in FIG. 1 is a direction along one side of the power conversion device 1, and the Y direction is a direction perpendicular to the X direction. FIG. 2 is a cross-sectional view of the power converter 1 taken along line AA' shown in FIG. FIG. 3 is a cross-sectional view of the power converter 1 taken along line BB′ shown in FIG. FIG. 4 is a cross-sectional view of the power converter 1 taken along line CC′ shown in FIG. FIG. 5 is an equivalent circuit diagram of the power conversion device 1 shown in FIG. 1.

The power conversion device 1 includes a first half-bridge circuit 10, a second half-bridge circuit 20, a plurality of DC capacitors 30, a positive conductor (also referred to as P conductor) 40, a negative conductor (also referred to as N conductor) 41, and a U-phase AC conductor. (also referred to as an AC_U conductor) 42, a V-phase AC conductor (also referred to as an AC_V conductor) 43, terminals T1 to T4, and a control circuit 2.

The first half-bridge circuit 10 includes a plurality of semiconductor modules 11 connected in parallel between a P conductor 40 and an N conductor 41. Each of the plurality of semiconductor modules 11 is configured by a first switching element 12 and a second switching element 13 connected in series. The switching elements 12 and 13 are composed of semiconductor elements. A semiconductor module 11 including switching elements 12 and 13 is packaged. The plurality of semiconductor modules 11 are arranged side by side in the X direction. In FIGS. 3 and 4, the semiconductor module is expressed as SW.

The switching elements 12 and 13 are composed of, for example, insulated gate bipolar transistors (IGBTs). The switching elements 12 and 13 may be SiC-MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) using SiC (Silicon Carbide) having a wide bandgap. By using a SiC-MOSFET as a switching element, switching speed can be increased and switching loss can be reduced.

In this embodiment, a case is illustrated in which the first half-bridge circuit 10 includes four semiconductor modules 11. The number of semiconductor modules 11 is appropriately set according to the output power required of the power conversion device 1.

The second half-bridge circuit 20 includes a plurality of semiconductor modules 21 connected in parallel between a P conductor 40 and an N conductor 41. Each of the plurality of semiconductor modules 21 is configured by a third switching element 22 and a fourth switching element 23 connected in series. The switching elements 22 and 23 are composed of the same type of switching elements as the first half-bridge circuit 10. A semiconductor module 21 including switching elements 22 and 23 is packaged. The number of semiconductor modules 21 included in the second half-bridge circuit 20 is, for example, the same as the number of semiconductor modules 11 included in the first half-bridge circuit 10. The plurality of semiconductor modules 21 are arranged side by side in the X direction.

The collector of the first switching element 12 is connected to the P conductor 40 using a positive terminal (also referred to as a P terminal) 14 . The emitter of the first switching element 12 is connected to the AC_U conductor 42 using an alternating current terminal (also referred to as AC terminal) 16 . The collector of the second switching element 13 is connected to the AC_U conductor 42 using the AC terminal 16 . The emitter of the second switching element 13 is connected to the N conductor 41 using a negative terminal (also referred to as an N terminal) 15 . The P terminal 14, the N terminal 15, and the AC terminal 16 each include a horizontally protruding terminal portion and a connecting portion extending from the terminal portion in the normal direction. The AC terminal 16 corresponds to a connection node between the first switching element 12 and the second switching element 13.

The collector of the third switching element 22 is connected to the P conductor 40 using the P terminal 24 . The emitter of the third switching element 22 is connected to the AC_V conductor 43 using the AC terminal 26 . The collector of the fourth switching element 23 is connected to the AC_V conductor 43 using the AC terminal 26 . The emitter of the fourth switching element 23 is connected to the N conductor 41 using the N terminal 25. The P terminal 24, the N terminal 25, and the AC terminal 26 each include a horizontally protruding terminal portion and a connecting portion extending from the terminal portion in the normal direction. The AC terminal 26 corresponds to a connection node between the third switching element 22 and the fourth switching element 23.

A free wheel diode is connected to each of the switching elements 12, 13, 22, and 23 in antiparallel fashion (that is, with the cathode facing the high potential side).

The gates of the switching elements 12 and 13 included in the first half-bridge circuit 10 are connected to the control circuit 2. Further, the gates of switching elements 22 and 23 included in the second half-bridge circuit 20 are connected to the control circuit 2.

The first half-bridge circuit 10 and the second half-bridge circuit 20 are arranged side by side in the Y direction. The first half-bridge circuit 10 and the second half-bridge circuit 20 constitute a full-bridge circuit. A full bridge circuit functions as an inverter circuit that converts DC power to AC power.

A plurality of DC capacitors 30 are connected between the P conductor 40 and the N conductor 41. The DC capacitor 30 functions as a smoothing capacitor that smoothes voltage. The plurality of DC capacitors 30 have a positive electrode and a negative electrode. The positive electrode of the DC capacitor 30 is connected to the P conductor 40 using the P terminal 31. The negative electrode of the DC capacitor 30 is connected to the N conductor 41 using the N terminal 32 . The number of DC capacitors 30 is appropriately set according to the output power and capacity required of the power converter 1. In FIGS. 3 and 4, the DC capacitor is indicated as C. The arrangement of the plurality of DC capacitors 30 will be described later.

A terminal T1 is connected to the P conductor 40, and a terminal T2 is connected to the N conductor 41. A DC power supply 3 is connected between terminal T1 and terminal T2. The DC power source 3 may be configured with a storage battery that can be charged and discharged.

A terminal T3 is connected to the AC_U conductor 42, and a terminal T4 is connected to the AC_V conductor 43. Any element or circuit (including a transformer) such as a load is connected to the terminals T3 and T4.

The control circuit 2 is an arithmetic circuit including, for example, at least one processor such as a CPU (central processing unit) or an MPU (micro processing unit), and a memory capable of recording a program executed by the processor. The control circuit 2 controls the on and off timings of the switching elements 12, 13, 22, and 23 so as to generate desired AC power. Specifically, the control circuit 2 alternately turns on the switching elements 12 and 13, and turns on the switching elements 22 and 23 alternately. Further, the control circuit 2 turns on the switching elements 12 and 23 simultaneously. Thereby, the control circuit 2 generates AC power from DC power.

[1-1] Specific configurations of the P conductor 40 and the N conductor 41 The P conductor 40 has a square shape so as to surround the first half bridge circuit 10 and the second half bridge circuit 20. The P conductor 40 includes a first conductor portion 40-1 and a second conductor portion 40-2, each extending in the It includes three conductor portions 40-3 and a fourth conductor portion 40-4 extending from the other end of the first conductor portion 40-1 to the other end of the second conductor portion 40-2.

The plurality of DC capacitors 30 are divided into a first group 33 arranged on the first half-bridge circuit 10 side and a second group 34 arranged on the second half-bridge circuit 20 side. The first group 33 of DC capacitors 30 is arranged adjacent to the first half-bridge circuit 10 in the Y direction. The second group 34 of DC capacitors 30 is arranged adjacent to the second half-bridge circuit 20 in the Y direction. In FIG. 1, an example is shown in which each of the first group 33 and the second group 34 includes four DC capacitors 30.

Note that the first group 33 of the DC capacitors 30 may be collectively configured as one DC capacitor 30. Similarly, the second group 34 of DC capacitors 30 may be collectively configured as one DC capacitor 30. In the case of this embodiment, from the viewpoint of equalizing the inductance from the DC capacitor to the semiconductor module, it is desirable that a plurality of P terminals and N terminals of the DC capacitor exist along the X direction.

The first conductor portion 40-1 is connected to the P terminal 14 of the first half bridge circuit 10. Further, the first conductor portion 40-1 is connected to the P terminal 31 of the first group 33 of the DC capacitor 30.

The second conductor portion 40-2 is connected to the P terminal 24 of the second half-bridge circuit 20. Further, the second conductor portion 40-2 is connected to the P terminal 31 of the second group 34 of the DC capacitor 30.

One end of the first conductor portion 40-1 and one end of the second conductor portion 40-2 are connected by a third conductor portion 40-3. The other end of the first conductor portion 40-1 and the other end of the second conductor portion 40-2 are connected by a fourth conductor portion 40-4.

N conductor 41 is arranged below P conductor 40 . The N conductor 41 surrounds the first half bridge circuit 10 and the second half bridge circuit 20, has a square shape, and is configured to overlap the P conductor 40 in plan view. That is, the planar shape of the N conductor 41 is the same as the planar shape of the P conductor 40. The P conductor 40 and the N conductor 41 are made into parallel flat plates. The N conductor 41 has an opening through which the P terminal 14 of the first half bridge circuit 10, the P terminal 24 of the second half bridge circuit 20, and the P terminal 31 of the DC capacitor are passed. Note that the vertical positional relationship between the P conductor 40 and the N conductor 41 may be reversed.

The N conductor 41 includes a first conductor portion 41-1 and a second conductor portion 40-2, each extending in the It includes three conductor portions 41-3, and a fourth conductor portion 41-4 extending from the other end of the first conductor portion 41-1 to the other end of the second conductor portion 41-2.

The first conductor portion 41-1 is connected to the N terminal 15 of the first half-bridge circuit 10. Further, the first conductor portion 41-1 is connected to the N terminal 32 of the first group 33 of the DC capacitors 30.

The second conductor portion 41-2 is connected to the N terminal 25 of the second half bridge circuit 20. Further, the second conductor portion 41-2 is connected to the N terminal 32 of the second group 34 of the DC capacitors 30.

One end of the first conductor portion 41-1 and one end of the second conductor portion 41-2 are connected by a third conductor portion 41-3. The other end of the first conductor portion 41-1 and the other end of the second conductor portion 41-2 are connected by a fourth conductor portion 41-4.

The P conductor 40 and the N conductor 41 are composed of laminated busbars. The P conductor 40 and the N conductor 41 have a laminate structure in which an insulating layer, a conductor (N conductor 41), an insulating layer, a conductor (P conductor 40), and an insulating layer are laminated in this order. In other words, the P conductor 40 and the N conductor 41 are laminated with an insulating layer in between, and the P conductor 40 and the N conductor 41 are sandwiched between two insulating layers from above and below.

As the P conductor 40 and the N conductor 41, for example, copper (Cu), silver (Ag), gold (Au), aluminum (Al), or an alloy thereof can be used.

[1-2] Specific configuration of AC_U conductor 42 and AC_V conductor 43 The AC_U conductor 42 and AC_V conductor 43 are arranged between the first half-bridge circuit 10 and the second half-bridge circuit 20. AC_U conductor 42 and AC_V conductor 43 each extend in the X direction.

AC_V conductor 43 is arranged above AC_U conductor 42. The AC_U conductor 42 and the AC_V conductor 43 are configured to overlap in plan view. That is, the AC_U conductor 42 and the AC_V conductor 43 are made into parallel flat plates. By making the AC_U conductor 42 and the AC_V conductor 43 parallel and flat, the inductance of the AC_U conductor 42 and the AC_V conductor 43 is reduced. FIG. 4 equivalently shows a capacitor 44 made up of an AC_U conductor 42 and an AC_V conductor 43. Note that the vertical positional relationship between the AC_U conductor 42 and the AC_V conductor 43 may be reversed.

The AC_U conductor 42 and the AC_V conductor 43 are composed of laminated busbars. The AC_U conductor 42 and the AC_V conductor 43 have a laminate structure in which an insulating layer, a conductor (AC_U conductor 42), an insulating layer, a conductor (AC_V conductor 43), and an insulating layer are laminated in this order.

As the AC_U conductor 42 and the AC_V conductor 43, for example, copper (Cu), silver (Ag), gold (Au), aluminum (Al), or an alloy thereof can be used.

[2] Operation The control circuit 2 controls the operations of the switching elements 12 and 13 of the semiconductor module 11 and the switching elements 22 and 23 of the semiconductor module 21. The control circuit 2 controls the gate voltage so that the switching elements 12 and 23 and the switching elements 13 and 22 are turned on alternately.

A full-bridge circuit including the first half-bridge circuit 10 and the second half-bridge circuit 20 generates single-phase AC power from DC power. The generated single-phase AC power is output from terminals T3 and T4.

Further, the control circuit 2 sets the frequency of the generated alternating current higher than the commercial frequency. The frequency of the AC power corresponds to the switching frequency of the switching element. The commercial frequency is the frequency of a commercial power source, and is 50 Hz or 60 Hz.

In this embodiment, a square-shaped P conductor 40 and a square-shaped N conductor 41 surround a plurality of semiconductor modules 11 lined up in the X direction and a plurality of semiconductor modules 21 lined up in the X direction. provided. Current is supplied to the plurality of semiconductor modules 11 and the plurality of semiconductor modules 20 from the left side using the third conductor portion 40-3 of the P conductor 40, and the fourth conductor portion 40-4 of the P conductor 40 is supplied with current. Current is supplied from the right side. Similarly, current is supplied to the plurality of semiconductor modules 11 and the plurality of semiconductor modules 20 from the left side using the third conductor portion 41-3 of the N conductor 41, and the fourth conductor portion 41 of the N conductor 41 -4 is used to supply current from the right side.

Thereby, the difference in inductance between the plurality of semiconductor modules 11 and the plurality of DC capacitors 30 can be reduced. Therefore, the imbalance of currents flowing from the plurality of DC capacitors 30 to the plurality of semiconductor modules 11 can be reduced. Similarly, the imbalance of currents flowing from the multiple DC capacitors 30 to the multiple semiconductor modules 21 can be reduced.

Further, by making the AC_U conductor 42 and the AC_V conductor 43 parallel and flat, the inductance of the AC_U conductor 42 and the AC_V conductor 43 is reduced. By reducing the inductance on the AC side, the influence of the inductance on the DC side on the current balance becomes dominant. This makes it possible to further contribute to equalizing the current balance of the semiconductor module due to equalizing the inductance on the DC side.

FIG. 6 is a current waveform of the power conversion device 1 according to the embodiment. FIG. 6 shows current waveforms at the P terminals 14 of the four semiconductor modules 11 included in the first half-bridge circuit 10. In FIG. 6, the four semiconductor modules 11 are expressed as IGBT1 to IGBT4. IGBT1 to IGBT4 each correspond to the four semiconductor modules 11 arranged in order from the left in FIG. Time and current in the waveform are in arbitrary units.

FIG. 7 is a current waveform of a power conversion device according to a comparative example. In the comparative example, the conductor for the first half-bridge circuit 10 and the conductor for the second half-bridge circuit 20 are separated. That is, the conductor for the first half-bridge circuit 10 and the conductor for the second half-bridge circuit 20 are each configured in a straight line.

In FIG. 7, the current imbalance of IGBT1 to IGBT4 is large. The present embodiment shown in FIG. 6 can reduce the current imbalance between the plurality of semiconductor modules compared to the comparative example.

[3] Effects of the Embodiment As detailed above, in the embodiment, the P conductor 40 and the N conductor are configured in a square shape so as to surround the first half-bridge circuit 10 and the second half-bridge circuit 20, respectively. I have to. The current path is configured so that current flows evenly through the plurality of semiconductor modules included in the first half-bridge circuit 10 and the second half-bridge circuit 20. Thereby, it is possible to realize a power conversion device that can reduce current imbalance of a plurality of semiconductor modules connected in parallel.

Further, the AC_U conductor 42 and AC_V conductor 43 on the side that outputs AC power (AC side) are made into parallel flat plates. This reduces the inductance between the AC_U conductor 42 and the AC_V conductor 43. By reducing the inductance on the AC side, the influence on the current balance by the inductance on the side to which DC power is supplied (DC side) becomes dominant. Thereby, current imbalance in the semiconductor module can be further reduced.

Further, the power conversion device 1 is configured to generate AC power at a frequency higher than the commercial frequency using a full bridge circuit. Thereby, the transformer connected to the power converter 1 can be significantly downsized, and the weight of the transformer can be significantly reduced.

Although several embodiments of the invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and changes can be made without departing from the gist of the invention. These embodiments and their modifications are included within the scope and gist of the invention, as well as within the scope of the invention described in the claims and its equivalents.

DESCRIPTION OF SYMBOLS 1... Power conversion device, 2... Control circuit, 3... DC power supply, 10... First half bridge circuit, 11... Semiconductor module, 12... First switching element, 13... Second switching element, 14... P terminal, 15... N terminal, 16... AC terminal, 20... Second half bridge circuit, 21... Semiconductor module, 22... Third switching element, 23... Fourth switching element, 24... P terminal, 25... N terminal, 26... AC terminal, 30...DC capacitor, 31...P terminal, 32...N terminal, 40...P conductor, 41...N conductor, 42...AC_U conductor, 43...AC_V conductor, 44...capacitor, T1 to T4...terminal.

Claims (10)

a positive electrode conductor;
a negative electrode conductor;
A plurality of first semiconductor modules are connected in parallel between the positive electrode conductor and the negative electrode conductor, and each of the plurality of first semiconductor modules has a first switching element and a second switching element connected in series. a first half-bridge circuit configured with;
A plurality of second semiconductor modules are connected in parallel between the positive electrode conductor and the negative electrode conductor, and each of the plurality of second semiconductor modules has a third switching element and a fourth switching element connected in series. a second half-bridge circuit configured with;
a plurality of DC capacitors connected in parallel between the positive conductor and the negative conductor;
Equipped with
The plurality of first semiconductor modules are arranged in a line in a first direction,
The plurality of second semiconductor modules are arranged in line in the first direction and are arranged adjacent to the plurality of first semiconductor modules in a second direction orthogonal to the first direction,
The positive electrode conductor has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules,
The negative electrode conductor has a square shape surrounding the plurality of first semiconductor modules and the plurality of second semiconductor modules. The power conversion device. The positive electrode conductor includes a first conductor portion connected to the positive electrode terminals of the plurality of first semiconductor modules, a second conductor portion connected to the positive electrode terminals of the plurality of second semiconductor modules, and the first conductor portion. a third conductor portion that connects one end of the second conductor portion to one end of the second conductor portion; and a fourth conductor portion that connects the other end of the first conductor portion and the other end of the second conductor portion;
The negative electrode conductor includes a fifth conductor portion connected to the negative electrode terminals of the plurality of first semiconductor modules, a sixth conductor portion connected to the negative electrode terminals of the plurality of second semiconductor modules, and the fifth conductor portion. and an eighth conductor part that connects the other end of the fifth conductor part and the other end of the sixth conductor part. 1. The power conversion device according to 1. The plurality of DC capacitors are arranged in a first group and a second group,
the first group of positive electrode terminals are connected to the first conductor portion;
the second group of positive terminals is connected to the second conductor portion;
the first group of negative terminals are connected to the fifth conductor portion,
The power conversion device according to claim 2, wherein the second group of negative terminals is connected to the sixth conductor portion. a U-phase conductor connected to a connection node between the first switching element and the second switching element;
further comprising a V-phase conductor connected to a connection node between the third switching element and the fourth switching element,
The power conversion device according to claim 1, wherein the U-phase conductor and the V-phase conductor are parallel and flat. The power conversion device according to claim 4, wherein the U-phase conductor and the V-phase conductor are laminated with an insulating layer interposed therebetween. The power conversion device according to claim 1, wherein the positive electrode conductor and the negative electrode conductor are formed into parallel flat plates. The power conversion device according to claim 6, wherein the positive electrode conductor and the negative electrode conductor are laminated with an insulating layer interposed therebetween. The first half-bridge circuit and the second half-bridge circuit constitute a full-bridge circuit,
The power conversion device according to claim 1, wherein the frequency of the alternating current outputted by the full bridge circuit is higher than a commercial frequency. The power conversion device according to claim 1, further comprising a storage battery connected to the positive electrode conductor and the negative electrode conductor. The power conversion device according to claim 1, wherein each of the first to fourth switching elements is configured with an IGBT or a Sic-MOSFET.