JP2014222735A - Semiconductor device and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide an SiC semiconductor device capable of increasing the channel mobility without introducing excessive fixed charges into the interface between an SiC layer and a gate insulating film.SOLUTION: The semiconductor device includes: an SiC semiconductor layer 111 formed on a substrate 101; and a gate electrode 115 formed on the SiC semiconductor layer 111 being interposed by a gate insulating film 117. The gate insulating film 117 includes a first film 151 containing nitrogen in contact with the SiC semiconductor layer 111 and a second film 152 formed between the first film 151 and the gate electrode 115. The nitrogen concentration peak of the gate insulating film 117 is located within 5 nm from the interface with the SiC semiconductor layer 111 in the first film 151 being interposed by a gap. The concentration of carbon contained in the first film 151 and the second film 152 is 1 atom% or less.

Description

  The present invention relates to a semiconductor device and a manufacturing method thereof, and more particularly to a semiconductor device using silicon carbide and a manufacturing method thereof.

  Silicon carbide (silicon carbide: SiC) is a high-hardness semiconductor material having a larger band gap than silicon (Si). Since SiC has a particularly high dielectric breakdown electric field, it is expected as an optimum semiconductor for the next generation low-loss power device.

  A typical semiconductor device among power devices using SiC is a MISFET (Metal Insulator Semiconductor Field-Effect Transistor). In order to reduce the loss of the SiC-MISFET, it is important to improve the channel mobility, which is the carrier mobility in the channel. In addition, in SiC-MISFETs, it has been studied to suppress crystal deterioration by using a channel region as a free-wheeling diode instead of a body diode (see, for example, Patent Document 1). In such an element, it is particularly important to improve channel mobility.

  As a method for improving channel mobility, it is conceivable to reduce defects in the gate insulating film and at the interface between the SiC layer and the gate insulating film. In a standard process for forming a gate insulating film, a thermal oxide film is formed at a high temperature of 1100 ° C. or higher in a dry or wet atmosphere. However, it is reported that when a gate insulating film is formed by a standard thermal oxidation process, a large amount of interface states are generated at the interface between the SiC layer and the gate insulating film, and the practical channel mobility of the SIC-MISFET deteriorates. (For example, see Non-Patent Document 1).

  As a method for reducing the interface state at the interface between the SiC layer and the gate insulating film, after forming an oxide layer on the surface of the SiC layer, the oxide layer is nitrogenated in a temperature range higher than 1100 ° C. and lower than 1250 ° C. A method of exposing to an atmosphere containing a group V element-containing gas such as the above has been studied (for example, see Patent Document 2). By this method, the group V element can be efficiently diffused in the oxide layer while preventing the deterioration of the characteristics of the oxide layer, and the group V element-containing oxide layer can be obtained. By making the gate insulating film a group V element-containing oxide layer, the interface state at the interface between the SiC layer and the gate insulating film is reduced.

JP 2012-104856 A JP 2005-136386 A

Edited by Kazuo Arai and Sadayoshi Yoshida, Basics and Applications of SiC Devices, Ohmsha, p. 82-83, 2003

  In the conventional semiconductor device, it is desired to improve the channel mobility by further optimizing the interface between the SiC layer and the gate insulating film and the state in the vicinity thereof.

  An object of the present disclosure is to realize a SiC semiconductor device with improved channel mobility by controlling the concentration and distribution of nitrogen and carbon in the vicinity of the interface between the SiC layer and the gate insulating film.

  One embodiment of a semiconductor device according to the present disclosure is provided on a first surface of a substrate and is separated from a first region by a first conductivity type first region, a second conductivity type second region, and a second region. SiC semiconductor layer having a third region of the first conductivity type formed, a first ohmic electrode provided in contact with the third region, and a second surface opposite to the first surface of the substrate. A second ohmic electrode, a gate insulating film provided on the SiC semiconductor layer, and a gate electrode provided on the gate insulating film, the gate insulating film being in contact with the SiC semiconductor layer and containing nitrogen A first film, and a second film provided between the first film and the gate electrode and having a lower nitrogen concentration than the first film, and the peak of the nitrogen concentration in the gate insulating film is 1 is spaced from the interface with the SiC semiconductor layer and is located within 5 nm. The concentration of carbon contained in the first film and the second film is not more than 1 atomic%.

  According to the semiconductor device and the manufacturing method thereof according to the present disclosure, an SiC semiconductor device with improved channel mobility can be realized.

It is a figure which shows the relationship between interface nitrogen concentration and channel mobility. It is sectional drawing which shows the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows 1 process of the manufacturing method of the semiconductor device which concerns on one Embodiment. It is a figure which shows the nitrogen concentration profile in the interface vicinity of a gate insulating film and a SiC semiconductor layer. It is sectional drawing which shows the modification of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows the modification of the semiconductor device which concerns on one Embodiment. It is sectional drawing which shows the modification of the semiconductor device which concerns on one Embodiment.

(Background to the present invention)
The present inventors have conducted intensive studies with the aim of further improving the channel mobility. As a result, it has been found that when the concentration of nitrogen contained in the gate insulating film exceeds a certain threshold, the channel mobility, which is the carrier mobility in the channel, is greatly reduced. As shown in FIG. 1, the threshold value of the nitrogen concentration at which the channel mobility decreases is in the range of 0.5 atomic% (atom%) to 2.5 atomic%. When the nitrogen concentration at the interface between the gate insulating film and the SiC layer exceeds this range, the channel mobility is greatly reduced.

  When the concentration of nitrogen contained in the gate insulating film exceeds a certain threshold, the channel mobility is decreased because nitrogen introduced into the gate insulating film becomes a fixed charge. After forming a gate insulating film that is an oxide film on the SiC layer, if nitrogen is introduced into the gate insulating film by heat treatment, the nitrogen is not uniformly distributed in the gate insulating film, and the interface between the gate insulating film and the SiC layer A transition layer having a high nitrogen concentration is formed in the vicinity. The transition layer is formed in a range of about 5 nm or less from the interface between the gate insulating film and the SiC layer to the gate insulating film side. In the range of about 1 nm or less in the vicinity of the interface layer of the transition layer, the concentration of nitrogen is particularly high, which becomes a fixed charge, negating the effect of reducing the interface state at the interface and reducing the channel mobility.

  In addition, when a gate insulating film, which is a thermal oxide film, is formed on the SiC layer, about 10 atomic% (atom%) of carbon is introduced into the interface of the gate insulating film with the SiC layer, and the fixed charge due to the carbon moves through the channel. The present inventors have found that there is a problem of reducing the degree.

  Based on the above findings, the present inventors have proposed a semiconductor device that optimizes the nitrogen concentration and distribution in the vicinity of the interface between the SiC layer and the gate insulating film, and the carbon concentration in the gate insulating film, in order to improve channel mobility. The manufacturing method was examined and the present invention was conceived. In addition, the above description helps to understand the embodiment of the present invention described below, and does not limit the present invention.

(Outline of the embodiment)
An example of a semiconductor device is provided on a first surface of a substrate, and includes a first conductivity type first region, a second conductivity type second region, and a first conductivity separated from the first region by the second region. SiC semiconductor layer having a third region of a mold, a first ohmic electrode provided in contact with the third region, and a second ohmic electrode provided on a second surface opposite to the first surface of the substrate A gate insulating film provided on the SiC semiconductor layer, and a gate electrode provided on the gate insulating film, the gate insulating film being in contact with the SiC semiconductor layer and including a first film containing nitrogen And a second film having a nitrogen concentration lower than that of the first film, the peak of the nitrogen concentration in the gate insulating film being SiC in the first film. Spaced from the interface with the semiconductor layer and located within 5 nm, the first film and The concentration of carbon contained in the second film is not more than 1 atomic%.

  In an example of the semiconductor device, the nitrogen concentration at the interface between the first film and the SiC semiconductor layer may be 2 atomic% or less.

  In an example of the semiconductor device, the nitrogen concentration in the second film may be 1 atomic% or less.

  In one example of the semiconductor device, the peak of the nitrogen concentration may exist at a position separated by 0.5 nm or more from the interface between the first film and the SiC semiconductor layer.

  In an example of the semiconductor device, the maximum value of the nitrogen concentration in the second film may be equal to or less than the minimum value of the nitrogen concentration in the first film.

  In an example of the semiconductor device, the nitrogen concentration may decrease stepwise across the interface between the first film and the second film.

  In an example of the semiconductor device, the thickness of the first film may be 1 nm to 5 nm, and the thickness of the second film may be 5 nm to 200 nm.

  In an example of the semiconductor device, the SiC semiconductor layer has a trench that penetrates the third region and the second region and reaches the first region, and the gate insulating film is provided so as to cover a side surface and a bottom surface of the trench. Also good.

  In one example of the semiconductor device, the SiC semiconductor layer includes a first SiC layer and a second SiC layer provided between the first SiC layer and the gate insulating film, and includes a first region, a second region, and a second region. The region and the third region may be provided in the first SiC layer, and the second SiC layer may be in contact with the second region and the third region.

  An example of a method for manufacturing a semiconductor device includes a first conductivity type first region, a second conductivity type second region, and a first conductivity type separated from the first region by a second region on a substrate. A step of forming a SiC semiconductor layer having a third region and a step of forming a gate insulating film on the SiC semiconductor layer, wherein the step of forming the gate insulating film comprises forming an oxide film on the SiC semiconductor layer. A gate insulating film comprising: a step of depositing a first film comprising: a step of plasma nitriding the first film; and a step of depositing a second film comprising an oxide film on the first film. The peak of the nitrogen concentration in is spaced from the interface with the SiC semiconductor layer in the first film and provided at a position within 5 nm.

  In an example of the manufacturing method, the first film may be formed by depositing an oxide film on the SiC semiconductor layer.

  In an example of the manufacturing method, the step of forming the gate insulating film may include a step of performing a heat treatment at a temperature of 1000 ° C. or higher in a non-oxidizing atmosphere after the step of plasma nitriding the first film.

  In an example of the manufacturing method, the thickness of the first film may be 1 nm to 5 nm, and the thickness of the second film may be 5 nm to 200 nm.

  In one example of the manufacturing method, the step of forming the SiC semiconductor layer includes a step of forming a trench that penetrates the third region and the second region and reaches the first region, and in the step of forming the gate insulating film, A gate insulating film may be formed so as to cover the side surface and the bottom surface.

  As an example of the manufacturing method, in the step of forming the SiC semiconductor layer, the first SiC layer and the second SiC layer may be sequentially formed, and the gate insulating film may be formed on the second SiC layer. Good.

In the present disclosure, the first conductivity type is described as n-type, and the second conductivity type is described as p-type. However, the first conductivity type may be p-type and the second conductivity type may be n-type. When the relative concentration of the dopant is indicated, the superscript “+” or “−” is added to the sign of n or p indicating the conductivity type. For example, “n ⁺ ” represents a higher dopant concentration than “n ⁻ ”.

  In the present disclosure, the expression that A is provided or formed “above” B is the case where A and B are in contact with each other and when A and B are in contact with each other. Including both. The same applies to the expression that A is provided or formed “on” B.

When a silicon carbide film (SiC film) and an oxide film (SiO ₂ film) are stacked, the composition changes over a certain range. For this reason, in the present disclosure, the position of [C] / [Si] = 1/2 ([O] / [Si]) is defined as the interface between the SiC film and the SiO ₂ film. Here, [Si], [C], and [O] represent atomic composition percentages (atom%) of silicon, carbon, and oxygen, respectively. [C] / [Si] and [O] / [Si] are obtained by secondary ion mass spectrometry (SIMS), X-ray photoelectron spectroscopy (XPS), Auger electron spectroscopy (AES), or the like. be able to. In this disclosure, it was determined by SIMS.

(One embodiment)
Hereinafter, a specific example of the embodiment will be described with reference to the drawings.

  Numerical values, shapes, materials, components, arrangement positions and connection forms of components, steps, order of steps, and the like shown in the following embodiments are merely examples, and do not limit the present invention. In addition, among the constituent elements in the following embodiments, constituent elements that are not described in the independent claims indicating the highest concept of the present invention are described as optional constituent elements. In the drawings, description of components having the same reference numerals may be omitted. In addition, the drawings schematically show each component for easy understanding, and there are cases where the shape, dimensional ratio, and the like are not accurately displayed. Moreover, in a manufacturing method, the order of each process etc. can be changed as needed, and another well-known process can be added.

FIG. 2 shows a semiconductor device 100 according to an embodiment. As shown in FIG. 1, the semiconductor device 100 of this embodiment is a SiC power semiconductor device having a vertical DMIS (Double-Diffused MIS) structure. The semiconductor device 100 includes a SiC semiconductor layer 111 provided on the first surface (front surface) of the first conductivity type substrate 101. In the present embodiment, the substrate 101 is an n ⁺ SiC substrate. The SiC semiconductor layer 111 includes a first SiC layer 121 and a second SiC layer 122 that are sequentially provided from the substrate 101 side.

The first SiC layer 121 includes a first conductivity type first region 131, a second conductivity type second region 132, and a first conductivity type third region separated from the first region 131 by the second region 132. Region 133. Second region 132 is disposed in the surface layer portion of first SiC layer 121, and third region 133 is disposed in second region 132. In the present embodiment, the first region 131 is an n ⁻ type drift layer, the second region 132 is a p type body region (well region), and the third region 133 is an n ⁺ type source region. .

A first ohmic electrode 113 as a source electrode is provided on the third region 133. The first ohmic electrode 113 is in contact with both the fourth region 134 of the second conductivity type provided so as to penetrate the third region 133 and the third region 133. In the present embodiment, the fourth region 134 is a p ⁺ -type contact region. In addition, although the example in which the first ohmic electrode 113 is formed across the third region 133 and the fourth region 134 is shown, the first ohmic electrode 113 may not be in contact with the fourth region 134. In this case, a contact electrode may be formed on the fourth region 134, and the first ohmic electrode 113 and the contact electrode may be connected by wiring or the like. The fourth area 134 may be provided in the second area 132 and may not be in contact with the third area 133. A second ohmic electrode 114 that is a drain electrode is provided on the surface (back surface) opposite to the first surface of the substrate 101.

  In the present embodiment, the second SiC layer 122 is a first conductivity type layer, and is formed on the first SiC 121 by, for example, epitaxial growth. Second SiC layer 122 is in contact with both second region 132 and third region 133. Since the second SiC layer 122 has a channel region 123 that is a path of current flowing between the first ohmic electrode 113 and the second ohmic electrode 114 at a position above the second region 132, the channel Sometimes called a layer.

A gate insulating film 117 is provided on the second SiC layer 122. The gate insulating film 117 is an oxide film (SiO ₂ film) formed by deposition. A gate electrode 115 is provided on the gate insulating film 117. An interlayer insulating film 119 is provided between the gate electrode 115 and the first ohmic electrode 113.

In the present embodiment, the gate insulating film 117 is an oxide film (SiO ₂ film) containing nitrogen formed on the second SiC layer 122 by deposition. The gate insulating film 117 is provided in contact with the second SiC layer 122, is provided on the first film 151 containing nitrogen, and the first film 151. The gate insulating film 117 has a lower nitrogen concentration than the first film 151. 2 film 152. The first film 151 can have a thickness of 1 nm to 5 nm, and the second film 152 can have a thickness of 5 nm to 200 nm. Between the first film 151 and the second film 152, a boundary layer of 5 nm or less in which the nitrogen concentration rapidly changes may exist. The peak concentration of nitrogen in each layer may be two or more times higher in the first film 151 than in the second film 152.

  The peak of the nitrogen concentration in the gate insulating film 117 exists in the first film 151 at a position spaced from the interface between the first film 151 and the second SiC layer 122. The peak position may be set at a position 1 nm or more away from the interface with the second SiC layer 122 in consideration of process controllability. Further, the position of the peak is not particularly limited as long as it is in the first film 151, but can be a position within 5 nm from the interface with the second SiC layer 122. By setting the peak of the nitrogen concentration to a position within 5 nm from the boundary between the first film 151 and the second SiC layer 122, it is possible to avoid introducing a large amount of nitrogen at a position close to the interface of the SiC layer. it can. Therefore, it is possible to reduce the influence of the introduced nitrogen on the interface quality as a fixed charge.

  The nitrogen concentration at the interface between the first film 151 and the second SiC layer 122 may be 2 atomic% or less, and may be 1 atomic% or less. The nitrogen concentration at the peak may be 8 atomic% or higher, 9 atomic% or higher, or 10 atomic% or higher.

  In the present embodiment, the gate insulating film 117 is not a thermal oxide film but an oxide film formed by deposition. Therefore, the gate insulating film 117 theoretically does not contain carbon. Actually, since carbon is included to some extent because it is affected by impurity contamination and diffusion during film formation, the carbon concentration in the gate insulating film 117 is 5 nm from the interface between the SiC layer 122 and the gate insulating film 117. Excluding the transition layer, it is 1 atomic% or less in the gate oxide region. When the gate insulating film is formed by thermal oxidation, the carbon concentration in the gate insulating film is about 10 atomic%. Therefore, in this embodiment, the amount of carbon introduced can be greatly reduced. The concentration of carbon in the gate insulating film 117 may be, for example, 5 atomic% or less, may be 3 atomic% or less, and may be 1 atomic% or less.

In the semiconductor device of this embodiment, the gate insulating film 117 contains nitrogen, and an amount of nitrogen necessary to reduce the interface state at the interface between the gate insulating film 117 and the second SiC layer 122, for example, 2 × 10 ¹⁹ cm ⁻³ or more is introduced. On the other hand, the peak of the nitrogen concentration in the gate insulating film 117 is spaced from the interface with the second SiC layer 122. Therefore, in the vicinity of the interface between the gate insulating film 117 and the second SiC layer 122, particularly in the vicinity of the interface pole from the interface with the second SiC layer 122 in the first film 151 to a position of about 1 nm, Excess nitrogen is not introduced in excess of the amount necessary to reduce. Further, the gate insulating film 117 hardly contains carbon that becomes a fixed charge. Accordingly, since the introduction of fixed charges is suppressed while the interface state is reduced, the channel mobility can be greatly improved.

The semiconductor device having the above configuration can be formed as follows. First, as shown in FIG. 3, a substrate 101 made of n ⁺ -type SiC having a first SiC layer 121, which is a SiC semiconductor, formed on the surface is prepared. The substrate 101 can be, for example, a low resistance (resistivity 0.01 to 0.03 Ωcm) n-type 4H—SiC offcut substrate.

  Next, as shown in FIG. 4, the second region 132, the third region 133, and the fourth region 134 are formed at predetermined positions of the first SiC layer 121. The second region 132 may be formed by selectively doping p-type impurity ions such as aluminum (Al). The third region 133 may be formed by selectively doping n-type impurity ions such as nitrogen (N). The fourth region 134 may be formed by selectively doping p-type impurity ions such as aluminum. The portion that is not ion-implanted becomes the first region 131.

The impurity concentration in the first region 131 can be, for example, about 1 × 10 ¹⁴ cm ⁻³ to 1 × 10 ¹⁶ cm ^−3, and the impurity concentration in the second region 132 is, for example, 1 × 10 ¹⁶ cm ⁻³ to It can be about 1 × 10 ¹⁹ cm ⁻³ . The impurity concentration in the third region 133 can be set to, for example, about 1 × 10 ¹⁹ cm ⁻³ to 1 × 10 ²¹ cm ⁻³ . The impurity concentration in the fourth region 134 can be, for example, about 1 × 10 ¹⁶ cm ⁻³ to 1 × 10 ¹⁹ cm ⁻³ .

  After the ion implantation, annealing is performed at a high temperature to activate the implanted impurities. Annealing may be performed after every implantation, after several implantations, or after all implantations are completed. The ion implantation may be performed using a mask having an opening at a predetermined position. The mask may be formed by patterning an oxide film or a polysilicon film, respectively.

Next, as shown in FIG. 5, second SiC layer 122 is formed on first SiC layer 121. Second SiC layer 122 is formed by epitaxial growth. The second layer 122 is formed by supplying a silicon-based gas, a carbon-based gas, and a dopant gas while heating the substrate to about 1450 ° C. to 1650 ° C. using a chemical vapor deposition (CVD) apparatus, for example. That's fine. The thickness of the second SiC layer 122 may be about 50 nm to 200 nm. The nitrogen dopant concentration of the second SiC layer 122 may be, for example, 5 × 10 ¹⁷ cm ^{−3 to} 5 × 10 ¹⁹ cm ⁻³ .

Next, as shown in FIG. 6, a first film 151 of the gate insulating film 117 is formed on the second SiC layer 122. The first film 151 is formed by deposition using a CVD method or the like instead of thermal oxidation. For example, the film formation can be performed under the conditions that the flow rate of SiH ₄ is 25 sccm (0 ° C., ml / min at 1 atmosphere), the flow rate of N ₂ O is 1250 sccm, the pressure is 0.6 hPa, and the temperature is 800 ° C. In this case, the deposition rate is about 0.89 nm / min. The thickness of the first film 151 may be 1 nm or more, may be 2 nm or more, may be 10 nm or less, may be 8 nm or less, and may be 5 nm or less.

  Next, plasma nitriding treatment is performed on the first film 151. The peak position of the nitrogen concentration by the plasma nitriding treatment can be controlled by the plasma power. For example, the plasma nitriding treatment may be performed for 40 seconds under conditions of 2000 W (DutyCycle 5%, effective power 1000 W) at a flow rate of nitrogen of 500 sccm, a pressure of 20 mTorr (about 2.7 Pa). After the plasma nitriding treatment, annealing may be performed in a non-oxidizing atmosphere. Annealing can be performed at 1000 ° C. or higher. For example, the pressure can be set to 1 Torr and the temperature can be 1050 ° C. for 45 seconds.

  Next, as shown in FIG. 7, a second film 152 is formed on the first film 151 subjected to the plasma nitriding treatment. The second film 152 can be formed under deposition conditions similar to those of the first film 151. The thickness of the second film 152 may be 5 nm or more, may be 10 nm or more, may be 200 nm or less, and may be 100 nm or less. After the second film 152 is formed, annealing may be performed in a non-oxidizing atmosphere. Annealing can be performed at 1000 ° C. or higher, and for example, can be performed at 1200 ° C. for 1 hour in a nitrogen atmosphere. By performing annealing after the plasma nitriding treatment of the first film 151 and after the second film 152 is formed, the film density of the gate insulating film 117 can be improved and the fixed charge can be further reduced. However, the first film 151 and the second film 152 may not be annealed, and only one of the films may be annealed.

  Next, as illustrated in FIG. 8, the gate electrode 115 is formed on the gate insulating film 117. For example, after forming an impurity-doped polysilicon film on the gate insulating film 117, unnecessary portions of the gate electrode 115, the gate insulating film 117, and the second SiC layer 122 may be removed by resist patterning and etching. .

  Next, as shown in FIG. 9, an interlayer insulating film 119 is formed to cover the gate electrode 115, the gate insulating film 117, and the second SiC layer 122 and expose the third region 133 and the fourth region 134. Then, the first ohmic electrode 113 is formed by resist patterning and etching. The first ohmic electrode 113 is formed, for example, by forming a nickel film on the entire surface of the substrate 101 on which the interlayer insulating film 119 is formed, heat-treating at 950 ° C. for 5 minutes in an inert gas atmosphere, silicidizing, and then unnecessary nickel. The film may be formed by removing the film. A second ohmic electrode 114 is formed on the back surface of the substrate 101. Similarly to the first ohmic electrode 113, the second ohmic electrode 114 may be formed by silicidizing the back surface of the substrate 101.

  In the present embodiment, the first film 151 is subjected to plasma nitriding treatment, and the first film 151 contains nitrogen. In the first film 151, the nitrogen concentration is not uniform and has a peak at a position away from the interface with the second SiC layer 122 and the interface with the second film 152. On the other hand, the nitrogen concentration at the interface between first film 151 and second SiC layer 122 is 2 atomic% or less. In addition, the second film 152 is not plasma-nitrided. For this reason, the average nitrogen concentration of the second film 152 is lower than the average nitrogen concentration of the first film 151, for example, 1 atom% or less on average. The nitrogen concentration changes abruptly across the interface between the first film 151 and the second film 152 and decreases stepwise. Although depending on the heat treatment conditions, for example, the thickness of the boundary layer where the nitrogen concentration changes abruptly is 5 nm or less. The peak concentration of nitrogen in each layer is twice or more higher in the first film 151 than in the second SiC layer 122.

  FIG. 10 shows an example of a nitrogen profile in a state where the first film 151 is formed on the second SiC layer 122. The nitrogen profile in FIG. 10 was analyzed by SIMS (Secondary Ion Mass Spectroscopy). The concentration gradually increases as the distance from the interface between the first film 151 and the second SiC layer 122 increases, and approximately 1.8 nm (the first film 151 from the interface between the first film 151 and the second SiC layer 122). The concentration becomes the highest at a position of about 0.5 nm from the surface of the substrate. The nitrogen concentration at the interface between the first film 151 and the second SiC layer 122 is about 1 atomic%, and the peak concentration is about 10 atomic%.

  Thus, the maximum value of the nitrogen concentration in the first film 151 is high, and when the first film 151 is averaged, it is strongly nitrided. However, the nitrogen concentration at the interface with the second SiC layer 122 is suppressed to 2 atomic% or less, and the nitrogen concentration in the region of about 1 nm from the interface between the first film 151 and the second SiC layer 122 is The channel mobility is suppressed to such an extent that it does not deteriorate. For this reason, while the interface state can be reduced at the interface between the first film 151 and the second SiC layer 122, the introduction of excessive nitrogen that degrades the channel mobility can be avoided.

  The nitrogen concentration and profile near the interface between the first film 151 and the second SiC layer 122 can be controlled by the film thickness of the first film 151. In order to set the peak of the nitrogen concentration at a position spaced from the interface between the first film 151 and the second SiC layer 122, the thickness of the first film 151 may be 1 nm or more. Also good. In order to introduce an amount of nitrogen necessary for reducing the interface state into the interface between the first film 151 and the second SiC layer 122, the film thickness of the first film 151 may be 10 nm or less. It may be 8 nm or less, or 5 nm or less.

  By introducing nitrogen into the gate insulating film 117, the relative dielectric constant of the gate insulating film 117 can be increased. As a result, the physical insulating film can be made thick without effectively changing the thickness of the electrical insulating film, and the breakdown voltage of the gate insulating film 117 can be improved.

  In this embodiment, since the gate insulating film 117 is formed by deposition, the concentration of carbon contained in the gate insulating film 117 can be reduced. Since carbon contained in the gate insulating film 117 becomes a fixed charge, it causes a decrease in mobility. When the gate insulating film is formed by thermally oxidizing the SiC film, the gate insulating film always contains carbon. However, when the gate insulating film is a deposited film, the concentration of carbon contained in the gate insulating film can be 1 atomic% or less. However, the concentration of carbon contained in the gate insulating film may be 3 atomic% or less, or 5 atomic% or less.

  In this embodiment, nitrogen is not actively introduced into the second film 152, but the second film 152 may be a film in which nitrogen is actively introduced.

  In the present embodiment, the SiC semiconductor layer 111 is configured such that the second SiC layer 122 is grown on the first SiC layer 121. However, as shown in FIG. 11, the second SiC layer 122 is provided. Alternatively, the semiconductor device 100 </ b> A may be configured in which the SiC semiconductor layer 111 is one layer of the first SiC layer 121 and the gate insulating film 117 is provided on the surface of the first SiC layer 121. In this case, a channel region is formed on the surface of first SiC layer 121 (the surface of second region 132).

  Although the planar type MISFET has been described in the present embodiment, a trench type MISFET may be used as shown in FIG. In the trench type MISFET, since the channel layer can be formed in the vertical direction, miniaturization of the unit cell is effective, the degree of integration can be increased, and the on-resistance of the element can be reduced.

The trench type semiconductor device 100B includes an SiC semiconductor layer 111 provided on the surface of the first conductive type substrate 101 as shown in FIG. The SiC semiconductor layer 111 has a first SiC layer 121 provided on the substrate 101. The first SiC layer 121 includes an n ⁻ -type first region 131, a p-type second region 132, and an n ⁺ -type third region 133 that are sequentially provided from the substrate 101 side. The first SiC layer 121 has a trench that passes through the third region 133 and the second region 132 and reaches the first region 131. A second SiC layer 122 is provided so as to cover the side and bottom surfaces of the trench. A gate electrode 115 is provided on the second SiC layer 122 via a gate insulating film 117. A portion in contact with second region 132 on the side surface of the trench in second SiC layer 122 becomes a channel region. First SiC layer 121 has p ⁺ -type fourth region 134 provided on the opposite side of the trench with third region 133 interposed therebetween. A first ohmic electrode 113 is provided on the third region 133 and the fourth region 134. An interlayer insulating film 119 is provided between the first ohmic electrode 113 and the gate electrode 115. A second ohmic electrode 114 is provided on the back surface of the substrate 101.

The gate insulating film 117 can be formed in the same manner as the planar type semiconductor device 100. Specifically, it is an oxide film (SiO ₂ film) containing nitrogen formed on the second SiC layer 122 by deposition. The gate insulating film 117 is provided in contact with the second SiC layer 122, is provided on the first film 151 containing nitrogen, and the first film 151, and has a lower nitrogen concentration than the first film 151. A second film 152. The first film 151 can have a thickness of 1 nm to 5 nm, and the second film 152 can have a thickness of 5 nm to 200 nm. The peak of the nitrogen concentration in the gate insulating film 117 exists at a position away from the interface between the first film 151 and the second SiC layer 122 in the first film 151. For example, it suffices to exist at a position separated by 0.5 nm or more from the interface with the second SiC layer 122 and may exist at a position separated by 1 nm or more. Moreover, the peak of the nitrogen concentration may exist at a position within 5 nm from the interface between the first film 151 and the second SiC layer 122. The nitrogen concentration at the interface between the first film 151 and the second SiC layer 122 may be 2 atomic% or less.

  The gate insulating film 117 is not a thermal oxide film but an oxide film formed by deposition. Therefore, the carbon concentration in the gate insulating film 117 is 1 atomic% or less.

  Also in the trench type semiconductor device 100 </ b> B, the channel mobility can be improved as in the planar type semiconductor device 100. In addition, when the gate insulating film is formed by thermal oxidation, the gate insulating film may become thin at the bottom of the trench due to the influence of the crystal plane orientation of the SiC layer. However, since the gate insulating film is formed by deposition, there is also an advantage that a gate insulating film as thick as the side surface of the trench can be formed on the bottom surface of the trench.

  Also in the case of the trench type MISFET, as shown in FIG. 13, the semiconductor device 100 </ b> C in which the gate insulating film 117 is provided on the surface of the first SiC layer 121 without forming the second SiC layer 122 may be used.

  As described above, the present disclosure has been described according to the embodiment. However, the present disclosure is not limited to the above embodiment, and various modifications can be made. For example, although an example in which 4H—SiC is used as the semiconductor substrate has been shown, another polytype substrate such as 6H, 3C, or 15R may be used. The SiC semiconductor layer can be formed on the (0001) Si surface of the semiconductor substrate, but the SiC semiconductor layer may be formed on the (000-1) C surface. The plane orientation of the main surface of the semiconductor substrate may be another crystal plane. The main surface may have an offcut angle of 0.5 ° to 10 °, but may not have an offcut angle. Moreover, although the example using the semiconductor substrate which consists of silicon carbide was shown, another board | substrate can also be used.

  Although the semiconductor device having the MISFET structure has been described, a semiconductor device having an insulated gate bipolar transistor (IGBT) structure may be used. The semiconductor device having the IGBT structure can be manufactured by making the semiconductor substrate and the semiconductor layer formed immediately above have different conductivity types. In this case, the second region is an emitter region or a collector region, the first ohmic electrode is an emitter electrode or a collector electrode, and the second ohmic electrode is a collector electrode or an emitter electrode.

  Further, it is possible to provide a MIS capacitor without providing a source and a drain.

  The semiconductor device and the manufacturing method thereof of the present disclosure can realize a SiC semiconductor device with improved channel mobility without introducing an extra fixed charge at the interface between the SiC layer and the gate insulating film, particularly in the field of power devices and the like. Useful in.

100 Semiconductor Device 100A Semiconductor Device 100B Semiconductor Device 100C Semiconductor Device 101 Substrate 111 SiC Semiconductor Layer 113 First Ohmic Electrode 114 Second Ohmic Electrode 115 Gate Electrode 117 Gate Insulating Film 119 Interlayer Insulating Film 121 First SiC Layer 122 Second SiC Layer 123 channel region 131 first region 132 second region 133 third region 134 fourth region 151 first film 152 second film

Claims (14)

A first conductive type first region, a second conductive type second region, and a first conductive type third region separated from the first region by the second region, provided on the first surface of the substrate; A SiC semiconductor layer having a region;
A first ohmic electrode provided in contact with the third region;
A second ohmic electrode provided on a second surface opposite to the first surface of the substrate;
A gate insulating film provided on the SiC semiconductor layer;
A gate electrode provided on the gate insulating film,
The gate insulating film is in contact with the SiC semiconductor layer, is provided between the first film containing nitrogen, the first film, and the gate electrode, and has a lower nitrogen concentration than the first film. Two films,
The peak of the nitrogen concentration in the gate insulating film is spaced from the interface with the SiC semiconductor layer in the first film and exists at a position within 5 nm,
The semiconductor device, wherein the concentration of carbon contained in the first film and the second film is 1 atomic% or less.   The semiconductor device according to claim 1, wherein a nitrogen concentration at an interface between the first film and the SiC semiconductor layer is 2 atomic% or less.   The semiconductor device according to claim 1, wherein a nitrogen concentration in the second film is 1 atomic% or less.   The semiconductor device according to claim 1, wherein the peak of the nitrogen concentration exists at a position separated by 0.5 nm or more from an interface between the first film and the SiC semiconductor layer.   5. The semiconductor device according to claim 1, wherein a maximum value of a nitrogen concentration in the second film is equal to or less than a minimum value of a nitrogen concentration in the first film.   6. The semiconductor device according to claim 1, wherein the nitrogen concentration decreases stepwise across the interface between the first film and the second film. The film thickness of the first film is 1 nm or more and 5 nm or less,
The semiconductor device according to claim 1, wherein a thickness of the second film is 5 nm or more and 200 nm or less. The SiC semiconductor layer has a trench that penetrates the third region and the second region and reaches the first region,
The semiconductor device according to claim 1, wherein the gate insulating film is provided so as to cover a side surface and a bottom surface of the trench. The SiC semiconductor layer includes a first SiC layer, and a second SiC layer provided between the first SiC layer and the gate insulating film,
The first region, the second region, and the third region are provided in the first SiC layer,
The semiconductor device according to claim 1, wherein the second SiC layer is in contact with the second region and the third region. A SiC having a first conductivity type first region, a second conductivity type second region, and a first conductivity type third region separated from the first region by the second region on a substrate. Forming a semiconductor layer;
Forming a gate insulating film on the SiC semiconductor layer,
The step of forming the gate insulating film includes:
Depositing a first film made of an oxide film on the SiC semiconductor layer;
Plasma nitriding the first film;
Depositing a second film made of an oxide film on the first film,
A method of manufacturing a semiconductor device, wherein a peak of nitrogen concentration in the gate insulating film is provided at a position within 5 nm at a distance from an interface with the SiC semiconductor layer in the first film.   11. The method of manufacturing a semiconductor device according to claim 10, wherein the step of forming the gate insulating film includes a step of performing a heat treatment at a temperature of 1000 ° C. or higher in a non-oxidizing atmosphere after the step of plasma nitriding the first film. Method. The first film is 1 nm or more and 5 nm or less,
The method of manufacturing a semiconductor device according to claim 10, wherein the second film has a thickness of 5 nm or more and 200 nm or less. Forming the SiC semiconductor layer includes forming a trench that penetrates the third region and the second region and reaches the first region;
The method for manufacturing a semiconductor device according to claim 10, wherein in the step of forming the gate insulating film, the gate insulating film is formed so as to cover a side surface and a bottom surface of the trench. The step of forming the SiC semiconductor layer includes:
Forming a first SiC layer having the first region, the second region, and the third region;
Forming a second SiC layer in contact with the second region and the third region,
The method of manufacturing a semiconductor device according to claim 10, wherein the gate insulating film is formed on the second SiC layer.

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