JP2012084586A - Inductor - Google Patents

Abstract

PROBLEM TO BE SOLVED: To improve an electrical symmetric property without increasing the occupied area of an on-chip inductor.SOLUTION: In an on-chip inductor formed by metal wiring on a semiconductor substrate, the inductor is formed by the series connection of n turns of round wiring, and bypass wiring connecting the different round wiring is provided so as to reduce impedance difference in an input output end, thereby replacing the wiring order of inductor rounds as appropriate.

Description

  The present invention relates to a wiring structure of a semiconductor integrated circuit. In particular, the present invention relates to an on-chip inductor wiring structure.

  The performance and degree of integration of semiconductor integrated circuits have been improved with the progress of microfabrication technology. In recent years, not only performance improvement due to miniaturization but also attempts to increase functionality by incorporating memory technology or analog circuit technology in a logic circuit have become active. In order to realize a high-performance analog RF circuit, it is desirable to use passive elements such as inductors and capacitors. The basic structure of an inductor in a semiconductor integrated circuit is to form a concentric winding structure using a series of metal wirings in a certain metal wiring layer. However, such a planar inductor has two main problems. One is that it is necessary to increase the number of windings or the inner diameter in order to obtain a sufficient inductance, and the area occupied by the inductor hinders the miniaturization of the semiconductor integrated circuit. The other is that when the inductor is wound in one direction from the outer periphery to the inner periphery, the impedance viewed from the outer peripheral side terminal and the inner peripheral side terminal is different, and electrical asymmetry occurs. The electrical asymmetry adversely affects the characteristics of a circuit that differentially operates an inductor such as an LC voltage controlled oscillator (LC-VCO).

  In order to solve these problems, Patent Document 1 discloses an inductor structure for reducing the area occupied by the inductor. According to the inductor structure of Patent Document 1, it is possible to suppress an increase in the area occupied by the inductor by forming a series of circumferential wirings in the stacking direction using not only the planar direction but also a plurality of metal wiring layers. . FIG. 16 is an example of the inductor wiring structure of Conventional Example 1 according to Patent Document 1, and shows an inductor composed of two metal wiring layers with four turns.

  On the other hand, Patent Document 2 discloses an inductor structure for improving the electrical asymmetry of the inductor. FIG. 19 is an example of the inductor wiring structure of Conventional Example 2 according to Patent Document 2. Here, the number of turns is four. This inductor has a planar structure, and a location where the wiring intersects avoids a short circuit through different wiring layers. The geometric symmetry is enhanced by winding in order from the outer periphery to the inner periphery and from the inner periphery to the outer periphery. Due to this geometric symmetry, the electrical characteristics viewed from both ends of the inductor are also symmetric.

International Publication No. 2008/016089 JP 2010-10344 A

  The following analysis is given by the present invention.

  As described above, it is desirable to improve the electrical symmetry of the inductor without increasing the area occupied by the inductor. However, the problem with the above-described inductor is in a trade-off relationship. In the inductor described in Patent Document 1, in order to realize a desired inductance in a small area, it is necessary to wind a narrow wiring long in a narrow region, but the loss due to the parasitic resistance and parasitic capacitance of the inductor is large. Become. In addition, since the amount of loss at the input / output ends varies depending on the wiring shape of the input / output ends by winding the wiring in one direction from the outside to the inside, the deterioration of electrical symmetry becomes more conspicuous.

  An inductor according to a first aspect of the present invention is an on-chip inductor formed of a metal wiring on a semiconductor substrate, and the inductor is a series connection of concentric n (n is an integer of 3 or more) winding wiring. The connection between the surrounding wirings formed includes at least one detour wiring connection that connects two or more outer wirings or two or more inner wirings.

  According to the inductor of the present invention, since it has a detour wiring connection that connects two or more outer wirings or two or more inner circuit wirings, it is possible to reduce the impedance difference between both ends of the inductor and to achieve electrical symmetry. Inductors with improved performance can be provided.

It is a top view which shows the wiring structure of the inductor in Example 1 of this invention. It is a simulation result of the S parameter of the inductor in Example 1 of the present invention. It is a top view which shows the wiring structure of the inductor in the 1st Embodiment of this invention. FIG. 4 is a cross-sectional view taken along O-I ′ of FIG. 3. It is sectional drawing which shows the wiring structure of the inductor in the 1st Embodiment of this invention. It is a top view which shows the wiring structure of the inductor in the 1st Embodiment of this invention. It is sectional drawing of O-I 'of FIG. It is a top view which shows the wiring structure of the inductor in the 2nd Embodiment of this invention. It is sectional drawing of O-I 'of FIG. It is sectional drawing which shows the wiring structure of the inductor in the 2nd Embodiment of this invention. It is sectional drawing of the wiring structure of the inductor in the 3rd Embodiment of this invention. It is sectional drawing of the wiring structure of the inductor in the 4th Embodiment of this invention. It is O-I 'sectional drawing of FIG. 1 in Example 1 of this invention. It is a top view which shows the wiring structure of the conventional inductor. It is sectional drawing of O-I 'of FIG. 6 is a top view showing a wiring structure of an inductor of Conventional Example 1. FIG. It is sectional drawing of O-I 'of FIG. It is a simulation result of the S parameter of the inductor of Conventional Example 1. FIG. 10 is a top view showing a wiring structure of an inductor of Conventional Example 2.

  Embodiments of the present invention will be described with reference to the drawings as necessary. In addition, drawing quoted in description of embodiment and the code | symbol of drawing are shown as an example of embodiment, and, thereby, the variation of embodiment by this invention is not restrict | limited.

  The inductor according to the first embodiment of the present invention is an on-chip inductor formed of a metal wiring on a semiconductor substrate, and the inductor is a series connection of concentric n (n is an integer of 3 or more) winding wiring. The connection between the peripheral wirings formed is at least one detour wiring connection that connects two or more outer wirings or two or more inner peripheral wirings, and the peripheral wiring 1 connected to the terminals at both ends of the inductor in the circular wiring Among the peripheral wirings n, the peripheral wiring 1 is the outermost peripheral wiring, and from the peripheral wiring 1 to the peripheral wiring k (k is an integer smaller than n-1), one inner peripheral wiring per rotation The peripheral wiring k + 1 is the innermost peripheral wiring, and the wiring from the peripheral wiring k + 1 to the peripheral wiring n is an outer peripheral wiring, one for each circuit.

  FIG. 3 is a top view showing the wiring structure of the inductor according to the first embodiment of the present invention. FIG. 3 is an example in the case of n = 8 and k = 4 in the first embodiment. FIG. 4 is a cross-sectional view taken along O-I ′ of FIG. 3. In FIG. 3, the eight wirings are connected in series. In addition, a detour wiring 42 connected to the four inner circuit wirings is provided in the middle of the circuit. Reference numerals 41a and 41b denote inductor input / output terminals at both ends of the inductor. Of the eight peripheral wirings, the peripheral wiring 1 is the outermost peripheral wiring, and the peripheral wiring 8 is a peripheral wiring inside the outermost periphery and outside the innermost periphery.

  Here, in order to clarify the turn order, the position number and the turn number of each turn wiring are defined. As shown in FIG. 4, the position numbers are assigned numbers so as to increase one by one from the center O toward the peripheral I ′. On the other hand, the circulation number is a number assigned in the order of circulation. Referring to FIG. 4, the outermost periphery is the circulation number 1, and the circulation number 4 is connected to the circulation circuit on the inner side one by one. Next, turn number 5 is the innermost turn wiring. The wiring from the circulation number 5 to the circulation number 8 is one outer wiring for every turn. The circuit wiring with the circulation number 4 and the circuit wiring with the circulation number 5 are connected by the detour wiring 42. The detour wiring 42 does not exist on O-I ′, but in order to indicate that the circulation number 4 and the circulation number 5 are connected by the detour wiring 42, in FIG. 4, the alternate wiring 42 is indicated by a one-dot chain line. Further, the inductor input / output terminals 41a and 41b do not exist on O-I ', but the inductor input / output terminals 41a and 41b are connected to the circulation wiring of the circulation number 8 and the circulation number 1, respectively. Therefore, it is shown by a broken line in FIG. As described above, in the drawing showing the inductor cross section of the specification of the present invention, when the cross section is not on the cross section O-I ', the bypass wiring is indicated by a one-dot chain line and the inductor input / output terminal is indicated by a broken line. FIG. 5 is a cross-sectional view showing the wiring structure of the inductor according to the first embodiment of the present invention, which is generalized with k and k + 1 as the number n of the circulation wirings and the circulation numbers for connecting the bypass wirings. FIG.

  FIG. 14 is a diagram showing a wiring structure of a conventional inductor shown for comparison. Eight winding windings are connected in series from the outside to the inside. Reference numerals 58a and 58b denote inductor input / output terminals, which are connected to the innermost peripheral wiring and the outermost peripheral wiring, respectively. FIG. 15 is a cross-sectional view taken along the line O-I ′ of FIG. In FIG. 15, the circulation number and the position number are the same.

  As can be seen by comparing FIG. 3 showing the first embodiment and FIG. 14 showing the prior art, in FIG. 14, the outermost periphery with a long wiring length and the innermost periphery with a short wiring length are both ends of the inductor. In contrast to the difference in impedance between both ends of the inductor, in FIG. 3, the difference in impedance between the two ends of the inductor can be reduced because the difference in the wiring length between the peripheral lines on both ends of the inductor can be reduced by the bypass wiring. Therefore, in the first embodiment, the electrical symmetry is improved with respect to the prior art shown in FIG.

  FIG. 6 shows an example of n = 4 and k = 1 in the first embodiment. FIG. 7 is a cross-sectional view taken along the line O-I ′ of FIG. 6. As described above, when k = 1, the inductor input / output terminals 44a and 44b are drawn out from the surrounding wiring of the adjacent position numbers.

  The inductor according to the second embodiment of the present invention is an on-chip inductor formed of metal wiring on a semiconductor substrate, and the inductor is a series connection of concentric n (n is an integer of 3 or more) winding wiring. The connection between the peripheral wirings formed is at least one detour wiring connection that connects two or more outer wirings or two or more inner peripheral wirings, and the peripheral wiring 1 connected to the terminals at both ends of the inductor in the circular wiring Among the peripheral wirings n, the peripheral wiring 1 is the innermost peripheral wiring, and from the peripheral wiring 1 to the peripheral wiring k (k is an integer greater than or equal to 1 and smaller than n-1), one outer circuit is provided for each turn. The peripheral wiring k + 1 is the outermost peripheral wiring, and the wiring from the peripheral wiring k + 1 to the peripheral wiring n is an inner peripheral wiring for each turn.

  FIG. 8 is a top view showing the wiring structure of the inductor according to the second embodiment of the present invention. FIG. 8 shows an example where n = 8 and k = 4 in the second embodiment. FIG. 9 is a cross-sectional view taken along O-I ′ of FIG. 8. In FIG. 8, the eight wirings are connected in series. Further, in the middle of the circulation, there are detour wirings 48 connected to the four outer circuit wirings. Reference numerals 47a and 47b denote inductor input / output terminals at both ends of the inductor. Of the eight peripheral wirings, the peripheral wiring 1 is the innermost peripheral wiring, and the peripheral wiring 8 is inside the outermost periphery and outside the innermost periphery.

  In the second embodiment, in FIG. 9, the innermost circumference is the circulation number 1 and the circulation number 4 is connected to the outer circumference wiring one by one for each revolution. Next, the circulation number 5 is the outermost circumference wiring. The circuit wiring from circuit number 5 to circuit number 8 is an inner circuit wiring for each circuit. The circuit wiring having the circulation number 4 and the circuit wiring having the circulation number 5 are connected by the detour wiring 48. FIG. 10 is a cross-sectional view showing the wiring structure of the inductor according to the second embodiment of the present invention, which is generalized with the number n of the peripheral wirings and the peripheral numbers for connecting the bypass wirings as k and k + 1. FIG.

  As can be seen by comparing FIG. 8 showing the second embodiment and FIG. 14 showing the prior art, in FIG. 8, the difference in the wiring length of the peripheral wiring at both ends of the inductor can be reduced by the bypass wiring. The difference in impedance across the inductor is reduced. Therefore, like the first embodiment, the second embodiment has improved electrical symmetry with respect to the prior art shown in FIG.

  The inductor according to the third embodiment of the present invention is an on-chip inductor formed of metal wiring on a semiconductor substrate, and the inductor is a series connection of concentric n (n is an integer of 3 or more) winding wiring. The connection between the peripheral wirings formed is at least one detour wiring connection that connects two or more outer wirings or two or more inner peripheral wirings, and the peripheral wiring 1 connected to the terminals at both ends of the inductor in the circular wiring Among the peripheral wirings n, the peripheral wiring 1 is the outermost peripheral wiring, and from the peripheral wiring 1 to the peripheral wiring k (k is an integer smaller than n-1), one inner peripheral wiring per rotation The circumferential wiring k + 1 is the innermost circumferential wiring, the wiring from the circumferential wiring k + 1 to the circumferential wiring n is one outer wiring for each circumference, and the circumferential wiring is made of different metal wiring layers. Wired, almost identical In comprises a plurality of sub-orbiting wiring position is located at the same position of the center, a plurality of sub-orbiting wiring included in each circumferential wires are connected in series to each other at the ends.

  FIG. 11 is a cross-sectional view showing an inductor according to a third embodiment of the present invention. In the inductor according to the third embodiment, each of the peripheral wirings of the inductor according to the first embodiment is wired with a different metal wiring layer, and has a plurality of sub-circulars each having substantially the same shape and the center position being located at the same position. A plurality of sub circuit wirings included in each circuit wiring are connected to each other in series at the end. FIG. 11 shows an example in which each circuit wiring is composed of sub circuit wiring of two metal wiring layers. In FIG. 11, two metal wiring layers have an upper layer of (m + 1) th layer and a lower layer of (m + 2). Further, the bypass wiring 53 is configured in the mth layer, which is one layer above the (m + 1) th layer. In FIG. 11, the circulation number and the layer number are displayed for each sub-circulation wiring. In each peripheral wiring, the (m + 1) th layer sub-circular wiring and the (m + 2) th layer sub-circular wiring are connected by vias between layers. The connection order from one input / output terminal to the other input / output terminal is shown below. Inductor input / output terminal 52b → secondary wiring (1, m + 2) → via → secondary wiring (1, m + 1) → secondary wiring (2, m + 1) → via →. . . . . . → Sub-circular wiring (k, m + 2) → Via → Sub-circular wiring (k, m + 1) → Bypass wiring 53 → Sub-circular wiring (k + 1, m + 1) → Via → Sub-circular wiring (k + 1, m + 2) → Sub-circular wiring (k + 2) , M + 2) → via → secondary wiring (k + 2, m + 1) →. . . . . . → Sub-circular wiring (n, m + 1) → via → sub-circular wiring (n, m + 2) → inductor input / output terminal 52a.

  In the above-described connection, the connection between one outer circumference wiring or one outer circumference wiring in the same layer can be omitted by configuring the two sub circumference wirings with one inductor wiring. In addition, each sub circuit wiring is connected in series with the sub circuit wiring of the other layer through the via at the end. FIG. 11 shows an example in which the peripheral wiring is composed of two layers of sub-circular wiring. However, the number of layers of the sub-circular wiring is not limited to two, and any number of layers is possible.

  In the third embodiment, not only the effect of improving the electrical symmetry similar to that of the first embodiment is obtained with respect to the prior art of FIG. 14, but also an inductor is configured with a plurality of layers. It is possible to reduce the area occupied by the inductor.

  The inductor according to the fourth embodiment of the present invention is an on-chip inductor formed of metal wiring on a semiconductor substrate, and the inductor is a series connection of concentric n (n is an integer of 3 or more) winding wiring. The connection between the peripheral wirings formed is at least one detour wiring connection that connects two or more outer wirings or two or more inner peripheral wirings, and the peripheral wiring 1 connected to the terminals at both ends of the inductor in the circular wiring Among the peripheral wirings n, the peripheral wiring 1 is the innermost peripheral wiring, and from the peripheral wiring 1 to the peripheral wiring k (k is an integer greater than or equal to 1 and smaller than n-1), one outer circuit is provided for each turn. The peripheral wiring k + 1 is the outermost peripheral wiring, and each of the peripheral wirings is composed of a plurality of sub-circular wirings arranged in different metal wiring layers and having substantially the same shape and the central position at the same position. Included in each circuit A plurality of sub-orbiting wiring are connected in series to each other at the ends.

  FIG. 12 is a cross-sectional view showing an inductor according to a fourth embodiment of the present invention. In the inductor according to the fourth embodiment, each of the peripheral wirings of the inductor according to the second embodiment is wired with a different metal wiring layer, and has a plurality of sub-circulars each having substantially the same shape and the center position arranged at the same position. A plurality of sub circuit wirings included in each circuit wiring are connected to each other in series at the end. FIG. 12 shows an example in which each circuit wiring is composed of sub circuit wiring of two metal wiring layers. The configuration of the fourth embodiment is the same as the configuration of the third embodiment except that the original configuration is changed from the first embodiment to the second embodiment. FIG. 12 shows an example in which the peripheral wiring is composed of two layers of sub-circular wiring. However, the number of sub-circular wirings is not limited to two, and any number of layers is possible.

  In the fourth embodiment, the effect of improving the electrical symmetry similar to that of the second embodiment is obtained with respect to the prior art of FIG. 14, and the inductor is configured by a plurality of layers. It is possible to reduce the area occupied by the inductor.

  Further, in FIGS. 3 to 12 showing the first to fourth embodiments, only one bypass wiring connection is illustrated, but an inductor having a plurality of bypass wiring connections is also possible. When each circular wiring is expressed as (position number, circular number), for example, the number of turns n = 6, and each circular wiring is (1, 1), (2, 2), (3, 5), (4 , 6), (5, 3), (6, 4). In the above configuration example, two bypass wiring connections, that is, a first bypass wiring connection that connects the peripheral wirings of position number 2 and position number 5, and a second bypass wiring connection that connects the circular wiring of position number 6 and position number 3 Is included.

  Hereinafter, embodiments will be described in detail with reference to the drawings.

  The first embodiment is an example in which the number of turns n = 4, k = 1, and the number of sub-circular wiring layers is two. FIG. 1 is a top view showing the inductor according to the first embodiment of the present invention, and FIG. 13 is a cross-sectional view taken along O-I ′ of FIG. 1. Each circular wiring is composed of the (m + 1) th layer and (m + 2) th layer auxiliary wiring. Further, the detour wiring 16a is configured in the m-th layer, which is a layer above the two sub circuit wirings. The connection order from one input / output terminal to the other input / output terminal in the inductor of the first embodiment is shown below. Inductor input / output terminal 19b → lead wiring 11b → inductor wiring 12c (1, m + 2) → via 13d → inductor wiring 14c (1, m + 1) → via 15b → bypass wiring 16a → via 15a → inductor wiring 14a (2, m + 1) → Via 13a → Inductor wiring 12a (2, m + 2) − (3, m + 2) → Via 13b → Inductor wiring 14b (3, m + 1) − (4, m + 1) → Via 13c → Inductor wiring 12b (4, m + 2) → Lead wire 11a → inductor input / output terminal 19a.

  Here, in the same layer, a connection between (2, m + 2)-(3, m + 2), which is a connection between one outer wiring or one inner wiring, (3, m + 1)-(4 The connection between m + 1) is constituted by one inductor wiring, and the connection portion is omitted. In addition, the relationship between the inductor wiring and the auxiliary circuit wiring in FIG. 1 is shown below. The inductor wiring 12a is composed of a sub circuit wiring (2, m + 2) and a sub circuit wiring (3, m + 2), the inductor wiring 12b is composed of a sub circuit wiring (4, m + 2), and the inductor wiring 12c is It is composed of sub-circular wiring (1, m + 2). The inductor wiring 14a is composed of the sub-circular wiring (2, m + 1), the inductor wiring 14b is composed of the sub-circular wiring (3, m + 1) and the sub-circular wiring (4, m + 1), and the inductor wiring 14c is It is composed of sub-circular wiring (1, m + 1). In addition, each sub circuit wiring is connected in series with the sub circuit wiring of the other layer through the via at the end.

  Next, FIG. 16 is a top view showing the wiring structure of the inductor of the conventional example 1 described in Patent Document 1. In FIG. FIG. 17 is a cross-sectional view taken along the line O-I ′ of FIG. The inductor wiring structure of Conventional Example 1 shown in FIG. 16 is composed of inductor wirings of the (m + 1) th layer and the (m + 2) th layer with four turns as in the inductor of the first embodiment. The connection order from one input / output terminal to the other input / output terminal in the inductor of Conventional Example 1 in FIG. 16 is shown below. Inductor input / output terminal 60a → leader wiring 21a → inductor wiring 22c (1, m + 2) → via 23d → inductor wiring 24b (1, m + 1) − (2, m + 1) → via 23c → inductor wiring 22b (2, m + 2) − ( 3, m + 2) → via 23b → inductor wiring 24a (3, m + 1) − (4, m + 1) → via 23a → inductor wiring 22a (4, m + 2) → via 25a → leading wiring 26a → via 25b → leading wiring 21b → inductor Input / output terminal 60b.

  In FIG. 16, the lead-out wiring 26a is composed of the mth layer. Here, (1, m + 1)-(2, m + 1) connection, (2, m + 2)-(3, m + 2), which is a connection of one outer wiring or one inner circuit wiring in the same layer The connection part between (3, m + 1)-(4, m + 1) is constituted by one inductor wiring, and the connection part is omitted. In addition, each inductor wiring is connected in series with the inductor wiring of the other layer through the via at the end.

  Comparing the inductor wiring structures of the first embodiment and the conventional example 1, the occupied area of the inductor is equivalent. On the other hand, in Conventional Example 1, both ends of the inductor are drawn from the outermost circumference with a long wiring length and the innermost circumference with a short wiring length, so that the electrical symmetry is low. By wiring, both ends of the inductor become the outermost circumference and one circumference inside the outermost circumference, so that the difference in wiring length is small, the difference in impedance at both ends of the inductor is small, and electrical symmetry is improved.

  Next, the electrical symmetry of the inductor of Example 1 and the inductor of Conventional Example 1 will be compared below. The following simulation was performed for a four-layer laminated inductor having 8 turns. The S parameter simulation result of Example 1 is shown in FIG. 2, and the S parameter simulation result of Conventional Example 1 is shown in FIG. In general, when an inductor is modeled by a two-port circuit, it can be expressed by four S parameters S11, S12, S21, and S22. However, in the case of an electrically symmetric circuit, S11 and S22 completely match. However, when there is an electrical asymmetry, a mismatch occurs between S11 and S22.

  Referring to FIG. 18 showing the S parameter of the inductor of Conventional Example 1, there is a difference between S11 and S22 in a high frequency band of 40 GHz or more. On the other hand, referring to FIG. 2 showing the S parameter of the inductor of Example 1, it can be seen that S11 and S22 are in good agreement in the entire frequency band.

  In the first embodiment, k indicating the position of the detour wiring is set to 1. However, the present invention is not limited to this, and k can be selected from integers greater than or equal to 1 and less than n-1. For example, k may be selected so that the electrical symmetry is most improved by the S parameter simulation as described above.

  Next, FIG. 19 is a top view showing the wiring structure of the inductor of Conventional Example 2 described in Patent Document 2. In FIG. FIG. 19 shows an example of the 4-turn winding of Conventional Example 2. The connection order from one input / output terminal to the other input / output terminal of the inductor shown in FIG. 19 is as follows. Inductor input / output terminal 61a → leader wiring 31a → inductor wiring 32f → via 33a → cross wiring 34a → via 33b → inductor wiring 32e → via 33c → cross wiring 34b → via 33d → inductor wiring 32b → via 33e → cross wiring 34c → via 33f → inductor wiring 32a → via 33g → cross wiring 34d → via 33h → inductor wiring 32g → via 33i → cross wiring 34e → via 33j → inductor wiring 32d → via 33k → cross wiring 34f → via 33m → inductor wiring 32c → lead wiring 31b → input / output terminal 61b.

  The inductor of Conventional Example 2 shown in FIG. 19 has an advantage that the electrical symmetry is very good because it is geometrically symmetrical. However, in the inductor of Conventional Example 2, the inductor wiring has a planar structure and cannot be laminated. Therefore, the area occupied by the inductor cannot be reduced, and it is difficult to realize a small high-frequency circuit. If the wiring is narrowed or the inner diameter is reduced in order to reduce the occupied area, the parasitic resistance increases and the inductor characteristics are deteriorated.

  When the inductor of Example 1 and the inductor of Conventional Example 2 are compared, both have excellent electrical symmetry, but the inductor of Conventional Example 2 cannot reduce the occupied area as described above. There is. On the other hand, in the case of the inductor according to the first embodiment, the inductor wiring can be constituted by sub-circular wirings in a plurality of layers, so that the area occupied by the inductor can be reduced.

  Further, in the second conventional example, many cross wirings and many vias are required, whereas in the first example, it can be configured with at least one detour wiring, and the number of necessary vias However, it is less than that of the conventional example 2. Therefore, the inductor of Example 1 is effective when the resistance of the bypass wiring or the cross wiring and the via resistance greatly affect the inductor characteristics.

  The present invention is applicable to an on-chip inductor used in a digital wireless circuit such as a mobile phone, a wireless LAN, and a digital terrestrial television broadcast.

  It should be noted that the embodiments and examples can be changed and adjusted within the scope of the entire disclosure (including claims) of the present invention and based on the basic technical concept. Various combinations and selections of various disclosed elements are possible within the scope of the claims of the present invention. That is, the present invention of course includes various variations and modifications that could be made by those skilled in the art according to the entire disclosure including the claims and the technical idea.

12a, 12b, 12c, 14a, 14b, 14c, 22a, 22b, 22c, 24a, 24b, 32a, 32c, 32d, 32e, 32f, 32g: Inductor wiring 11a, 11b, 21a, 21b, 26a, 31a, 31b, 43, 46, 49a, 49b, 59: Lead wires 13a, 13b, 13c, 13d, 15a, 15b, 23a, 23b, 23c, 23d, 25a, 25b, 33a, 33b, 33c, 33d, 33e, 33f, 33g, 33h, 33i, 33j, 33k, 33m: Via 19a, 19b, 41a, 41b, 44a, 44b, 62a, 62b, 47a, 47b, 50a, 50b, 52a, 52b, 55a, 55b, 58a, 58b, 60a, 60b , 61a, 61b: inductor input / output terminals 16a, 42, 45, 48, 51, 53, 56, 63: Detour wiring 34a, 34b, 34c, 34d, 34e, 34f: Cross wiring

Claims (7)

  An on-chip inductor formed of metal wiring on a semiconductor substrate, wherein the inductor is formed by serial connection of concentric n (n is an integer of 3 or more) winding wiring, An inductor having at least one detour wiring connection that connects two or more outer wirings or two or more inner circuit wirings.   Of the peripheral wiring 1 and the peripheral wiring n connected to the terminals at both ends of the inductor, the peripheral wiring 1 is the outermost peripheral wiring, and the peripheral wiring n is inside the outermost periphery and outside the innermost periphery. The inductor according to claim 1, wherein the inductor is a circumferential wiring.   Of the peripheral wiring 1 and the peripheral wiring n connected to the terminals at both ends of the inductor, the peripheral wiring 1 is the innermost peripheral wiring, and the peripheral wiring n is inside the outermost periphery and from the innermost periphery. The inductor according to claim 1, wherein the inductor is an outer circumferential wiring.   Of the peripheral wiring 1 and the peripheral wiring n connected to the terminals at both ends of the inductor, the peripheral wiring 1 is the outermost peripheral wiring, and the peripheral wiring 1 and the subsequent circular wiring k (k is 1 or more and n 1 is an inner circumference wiring for each revolution, and the circumference wiring k + 1 is the innermost circumference wiring, and the wiring from the circumference wiring k + 1 to the circumference wiring n is 1 for each circumference. The inductor according to claim 1, wherein the inductor is an outer circumferential wiring.   Of the peripheral wiring 1 and the peripheral wiring n connected to the terminals at both ends of the inductor, the peripheral wiring 1 is the innermost peripheral wiring, and the peripheral wiring 1 and the subsequent circular wiring k (k is 1 or more). (an integer smaller than n-1) is an outer peripheral wiring for each turn, the peripheral wiring k + 1 is the outermost peripheral wiring, and the wiring from the peripheral wiring k + 1 to the peripheral wiring n is 1 per circuit. 4. The inductor according to claim 1, wherein the inductor is an inner circumferential wiring.   Each of the peripheral wirings includes a plurality of sub-circular wirings that are wired in different metal wiring layers and arranged in substantially the same shape and at the same center position, and the plurality of sub-circular wirings included in each of the peripheral wirings are The inductor according to any one of claims 1 to 5, wherein the inductors are connected in series with each other at the end.   The inductor according to any one of claims 1 to 6, wherein the detour wiring connection is configured by an upper wiring layer or a lower wiring layer of the metal wiring layer constituting the circuit wiring.

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