JP2009253642A - Class-d amplifier, and switching driving method for class-d amplifier - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a class-D amplifier in which output power can be secured greatly by a single-side power source and a pumping phenomenon caused by a regeneration current hardly occurs. <P>SOLUTION: The class-D amplifier comprises: a first pair of high-side and low-side switching elements 1, 2; a second pair of high-side and low-side switching elements 3, 4; a first drive circuit 30 for alternately turning ON/OFF the first pair of switching elements 1, 2 in accordance with a positive/negative input signal; a second drive circuit 40 for alternately turning ON/OFF the second pair of switching elements 3, 4 based on a pulse obtained by performing PWM modulation upon the input signal; a single-side power source 21 connected to both terminals of the first and second pairs of switching elements 1, 2 and 3, 4; and a load RF connected between a connecting point between the first pair of switching elements and a connecting point between the second pair of switching elements via an LC circuit 10, and a C-side terminal of the LC circuit 10 is connected with a ground. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a D class amplifier and a switching drive method for the D class amplifier, and more particularly to a D class amplifier using a single power supply and a switching drive method for the D class amplifier.

  In audio power amplifiers, D-class amplifiers with high power efficiency have been used. The D-class amplifier includes a half-bridge connection having a pair of high-side and low-side switching elements and a full-bridge connection using two pairs of high-side and low-side switching elements. In addition, there are a single power source (+ B) and a dual power source (± B) in the power source format, and in-vehicle power amplifiers create + B or ± B by boosting the battery voltage with a DC / DC converter. FIG. 2 of Japanese Patent Application Laid-Open No. 2006-60278 discloses a configuration example in which both power supplies and half-bridge connection are combined. FIG. 1 shows a schematic configuration. Flywheel diodes D1 and D2 are individually connected in parallel to each of switching elements 1 and 2 that are alternately connected and repeatedly turned on and off in series, and a connection point P (voltage V0 and V0) of the two switching elements 1 and 2 is connected. The LC circuit 10 and the load RL are connected between the terminal and the ground. ± B is supplied from the power supply unit 20 to both ends of the switching elements 1 and 2. The switching elements 1 and 2 are alternately turned on and off based on drive pulses DP1 and DP2 (DP2 is an inversion of DP1) generated by PWM modulation of a high-frequency triangular wave with an input signal. When the switching element 1 is on and 2 is off, V0 is + B, and when the switching element 1 is off and 2 is on, V0 is −B. Now, assuming that the average voltage of V0 is +, the ON period of the switching element 1 is longer than the OFF period, and a current flows from the P to the load RL in the coil LF of the LC circuit 10 (FIG. 1 (1 )), When switching element 1 is turned on, 2 is turned off, 1 is turned off, and 2 is turned on, the current flowing in coil LF tries to maintain continuity, and P continues to load RL. It flows in the direction (see FIG. 1 (2)). The current direction at this time is a regenerative current that is opposite to the direction of the original flow when viewed from the power supply unit 11, so that the large-capacitance capacitor on the −B side of the power supply unit 11 is charged and −B increases by ΔV. A phenomenon occurs. When the input signal is zero and the duty ratio of the drive pulses DP1 and DP2 is 50%, a DC bias of + B / 2 is generated at V0.

  FIG. 5 of JP-T-2000-513159 discloses a configuration example in which a single power source and a full bridge connection are combined. FIG. 2 shows a schematic configuration. Flywheel diodes D1 and D2 are individually connected in parallel to each of switching elements 1 and 2 that are alternately connected and repeatedly turned on and off in series, and a connection point P1 between two switching elements 1 and 2 (voltage is set to V1). Is connected to one end of the load RL via the LC circuit 10. In addition, flywheel diodes D3 and D4 are individually connected in parallel to each of switching elements 3 and 4 that are connected in series and repeatedly turn on and off alternately, and a connection point P2 (voltage V2 between two switching elements 3 and 4). Is connected to the other end of the load RL via the LC circuit 11. One end of the capacitor CF of the LC circuits 10 and 11 is connected to the ground. Both ends of the switching elements 1 and 2 and both ends of 3 and 4 are supplied with + B from the power source unit 21 of a single power source. The switching elements 1 and 2 are alternately turned on and off based on drive pulses DP1 and DP2 (DP2 is an inversion of DP1) generated by PWM modulation of a high-frequency triangular wave with an input signal. The switching elements 3 and 4 are alternately turned on and off based on the drive pulses DP2 and DP1. When the switching elements 1 and 4 are on, 2 and 3 are off, V1−V2 is + B, and when the switching elements 1 and 4 are off and 2 and 3 are on, V1−V2 is −B. Therefore, since the voltage twice as high as + B is applied to the load RL, output power equivalent to that of both power sources can be obtained. In addition, since the single power supply is used, the pumping phenomenon is smaller than that in the case of using both power supplies.

  Incidentally, when the duty ratio of the drive pulses DP1 and DP2 in FIG. 2 is 50%, in principle, both V1 and V2 are about + B / 2, and a DC bias is generated when viewed from the ground.

FIG. 2 of JP-A-2006-60278 Fig. 5 of JP 2000-513159 A

  An object of the present invention is to provide a D-class amplifier in which a large output power can be obtained by a single power source and a pumping phenomenon due to a regenerative current is unlikely to occur.

One of the D-class amplifiers of the present invention includes a first pair of high-side and low-side switching elements, a first pair of diodes connected in parallel to each of the first pair of switching elements, a high-side and a low-side The second pair of switching elements, the second pair of diodes connected in parallel to each of the second pair of switching elements, and the first pair of switching elements alternately according to the positive / negative of the amplitude of the input signal First driving means for on / off driving, second driving means for alternately turning on / off the second pair of switching elements based on a pulse obtained by PWM modulating an input signal, and first and second pairs A single power source connected to both ends of the switching element, a first connection point between the first pair of switching elements, and a second connection point between the second pair of switching elements. And a connected LC circuit, connected to ground one end of the capacitor of the LC circuit, it has to connect the load in parallel with the capacitor of the LC circuit is characterized.
Another one of the D class amplifiers of the present invention includes a first D class amplifier circuit and a second D class amplifier circuit, and the first D class amplifier circuit includes a first pair of a high side and a low side. A first pair of diodes connected in parallel to each of the first pair of switching elements, a second pair of switching elements on the high side and the low side, and each of the second pair of switching elements A second pair of diodes connected in parallel, a first driving means for alternately turning on and off the first pair of switching elements according to the positive / negative of the amplitude of the input signal, and a pulse obtained by PWM modulating the input signal Based on a second driving means for alternately turning on and off the second pair of switching elements, a first single power source connected to both ends of the first and second pair of switching elements, A first LC circuit connected between a first connection point between the pair of switching elements and a second connection point between the second pair of switching elements, and a second D class The amplifier circuit includes a first pair of switching elements on the high side and the low side, a first pair of diodes connected in parallel to each of the first pair of switching elements, and a second pair of switching on the high side and the low side. A first pair of diodes that are connected in parallel to each of the second pair of switching elements, and a first pair of switching elements that are alternately turned on / off according to the positive / negative of the amplitude of the input signal. Driving means, a second driving means for alternately turning on and off the second pair of switching elements based on a pulse obtained by PWM modulating the input signal, and a first pair of switching elements Connected between a second single power source connected to the end, a first connection point between the first pair of switching elements, and a second connection point between the second pair of switching elements. A second LC circuit, one end of the capacitor of the first LC circuit and one end of the capacitor of the second LC circuit are connected to the ground, and a load is provided between the first LC circuit and the second LC circuit. When the first driving means of the first D class amplifier circuit turns on (turns off) the high side of the first pair of switching elements, the first driving of the second D class amplifier circuit Means turns on (off) the low side of the first pair of switching elements, and when the second driving means of the first D class amplifier circuit turns on (off) the high side of the second pair of switching elements, Second driving means of second D class amplifier circuit Is characterized in that the low side of the second pair of switching elements is turned on (off).
One of the switching driving methods of the D-class amplifier according to the present invention includes a first pair of diodes connected in parallel to each of the first pair of switching elements on the high side and the low side, and a second pair of high side and the low side. A second pair of diodes are connected in parallel to each of the switching elements, a single power source is connected to both ends of the first and second pair of switching elements, and a first connection between the first pair of switching elements The LC circuit is connected between the point and the second connection point between the second pair of switching elements, one end of the capacitor of the LC circuit is connected to the ground, and a load is connected in parallel with the capacitor of the LC circuit. Then, the first pair of switching elements are alternately turned on / off according to whether the input signal is positive or negative, and the second pair of switching elements is turned on based on a pulse obtained by PWM-modulating the input signal. It was adapted to each other on and off the drive, is characterized in.
Another one of the switching driving methods of the D class amplifier of the present invention is to connect a first pair of diodes in parallel to each of the first pair of switching elements on the high side and the low side of the first D class amplifier circuit. A second pair of diodes are connected in parallel to each of the second pair of switching elements on the high side and the low side, a first single power source is connected to both ends of the first and second pair of switching elements, A first LC circuit connected between a first connection point between one pair of switching elements and a second connection point between a second pair of switching elements; A first pair of diodes are connected in parallel to each of the first pair of switching elements on the high side and the low side of the circuit, and a second pair of dies are connected to each of the second pair of switching elements on the high side and the low side. Are connected in parallel, a second single power source is connected to both ends of the first and second pair of switching elements, a first connection point between the first pair of switching elements and a second pair of switching elements. A second LC circuit is connected to the second connection point between the switching elements, and one end of the capacitor of the first LC circuit and one end of the capacitor of the second LC circuit are connected to the ground, A load is connected between the first LC circuit and the second LC circuit, and the first pair of switching elements of the first and second D class amplifier circuits are alternately turned on and off according to the positive and negative of the input signal. And the second pair of switching elements of the first and second D class amplifier circuits are alternately turned on / off based on a pulse obtained by PWM modulating the input signal. At this time, the first D class A first pair of switches in an amplifier circuit When the high side of the element is turned on (off), the low side of the first pair of switching elements of the second D class amplifier circuit is turned on (off), and the second pair of switching of the first D class amplifier circuit It is characterized in that when the high side of the element is turned on (off), the low side of the second pair of switching elements of the second D class amplifier circuit is turned on (off).

According to the first and third aspects of the present invention, since the switching elements are connected by a full bridge, it is possible to obtain a large output power equivalent to that of both power sources by a single power source. In addition, since the regenerative current does not flow through the power source, the pumping phenomenon is unlikely to occur, and the output voltage changes centered on the ground, so that no DC bias is generated.
According to the second and fourth aspects of the present invention, by connecting the single-ended first and second D class amplifier circuits by bridge connection, it is possible to obtain an output voltage that is four times that of a single power supply, and a larger output power. Can be taken. In addition, since the regenerative current does not flow through the power source, the pumping phenomenon is unlikely to occur, and the output voltage changes centered on the ground, so that no DC bias is generated.

  Hereinafter, the best mode of the present invention will be described based on examples.

Next, a first embodiment of the present invention will be described with reference to FIG. FIG. 3 is a circuit diagram showing a configuration of an audio D-class amplifier according to the present invention.
In FIG. 3, 1 and 2 are a first pair of high-side and low-side switching elements connected in series, 3 and 4 are a second pair of high-side and low-side switching elements connected in series, and D1 and D2 are Flywheel diodes connected in parallel to switching elements 1 and 2, D3 and D4 are flywheel diodes connected in parallel to switching elements 3 and 4, respectively, and 21 is a + B single power supply. Two pairs of switching elements 1 and 2, 3 and 4 are connected to both ends. Reference numeral 10 denotes a low-pass LC circuit comprising a coil LF and a capacitor CF, and one end of the capacitor CF is connected to the ground to form a single end. RL is a load (speaker) connected in parallel with the capacitor CF on the output side of the LC circuit 10.

Reference numeral 30 denotes a first drive circuit that alternately turns on and off the first pair of switching elements 1 and 2 according to the positive and negative of the instantaneous value of the input signal. FIG. 4 shows a specific circuit configuration. In FIG. 4, reference numeral 31 in the first drive circuit 30 is a comparator for comparing the input signal with the ground potential, and the first pulse at which the instantaneous value of the input signal is low during the positive period and high during the negative period. Output. The first pulse is input to one input terminal of the delay circuit 32 and the AND circuit 33, and the output of the delay circuit 32 is input to the other input terminal of the AND circuit 33. The AND circuit 33 outputs a first switching pulse SP1 with a dead time to the switching element 1 via the driver 34. The first switching pulse SP1 becomes high while the instantaneous value of the input signal is negative (however, the high period is shorter by the dead time), turns on the switching element 1, turns low during positive, and turns off the switching element 1.
Reference numeral 35 denotes an inverting circuit that inverts the output of the comparator 31 and outputs a second pulse in which the instantaneous value of the input signal is high during a positive period and low during a negative period. The second pulse is input to one input terminal of the delay circuit 36 and the AND circuit 37, and the output of the delay circuit 36 is input to the other input terminal of the AND circuit 37. The AND circuit 37 outputs a second switching pulse SP2 with a dead time to the switching element 2 via the driver 38. The second switching pulse SP2 is high for a period when the instantaneous value of the input signal is positive (however, the high period is shorter by the dead time), turns on the switching element 2, turns low for the period, and turns on the switching element 2 ( (See FIG. 6).

  Reference numeral 40 denotes a second drive circuit that alternately turns on and off the second pair of switching elements 3 and 4 based on a pulse obtained by PWM-modulating an input signal. FIG. 5 shows a specific circuit configuration. In FIG. 5, 41 of the second drive circuit 40 is a triangular wave generator that generates a high-frequency triangular wave, 42 is a high-level period in which the input signal and the triangular wave are compared, and the instantaneous value of the input signal is greater than the instantaneous value of the triangular wave. , A comparator that outputs a third pulse that is at a low level for a period in which the instantaneous value of the input signal is smaller than the instantaneous value of the triangular wave, 43 is an inverting circuit that inverts the polarity of the input signal, and 44 is a circuit that compares the inverted polarity of the input signal with the triangular wave A comparator 45 for outputting a fourth pulse in which the instantaneous value of the input signal after inversion is high during a period greater than the instantaneous value of the triangular wave, and the low value during a period when the instantaneous value of the input signal is smaller than the instantaneous value of the triangular wave; XOR circuit for taking the exclusive OR of the pulse and the fourth pulse, 46 for the XNOR circuit for taking the exclusive negative sum of the third pulse and the fourth pulse, and 47 for the XOR circuit of the first drive circuit 30. This is a switch circuit that selectively outputs the output of the XOR circuit 45 while the instantaneous value of the input signal is positive based on the output of the paralator 31, and selectively outputs the output of the XNOR circuit 46 while the instantaneous value is negative. A pulse is output. The fifth pulse is input to one input terminal of the delay circuit 48 and the AND circuit 49, and the output of the delay circuit 48 is input to the other input terminal of the AND circuit 49. The AND circuit 49 outputs a third switching pulse SP3 with a dead time to the switching element 3 via the driver 50. The third switching pulse SP3 becomes high during a period when the instantaneous value of the input signal is larger than the instantaneous value of the triangular wave and during a period when the instantaneous value of the input signal whose polarity is inverted is larger than the instantaneous value of the triangular wave. Short), the switching element 3 is turned on, and becomes low for other periods, and the switching element 3 is turned off.

  Reference numeral 51 denotes an inverting circuit that inverts the output of the switch circuit 47 and outputs a sixth pulse. The sixth pulse is input to one input terminal of the delay circuit 52 and the AND circuit 53, and the output of the delay circuit 52 is input to the other input terminal of the AND circuit 53. The AND circuit 53 outputs a fourth switching pulse SP4 with a dead time to the switching element 4 via the driver 54. The fourth switching pulse SP4 becomes high during a period when the instantaneous value of the input signal is smaller than the instantaneous value of the triangular wave and during a period when the instantaneous value of the input signal whose polarity is inverted is smaller than the instantaneous value of the triangular wave (however, the high period is equivalent to the dead time Short), the switching element 4 is turned on, and becomes low for other periods, and the switching element 4 is turned off (see FIG. 7).

6 is a diagram showing the operation of the first drive circuit 30, FIG. 7 is a diagram showing the operation of the second drive circuit 40 during a period in which the input signal is positive, and FIGS. 8 and 9 are diagrams in which the input signal is positive. FIG. 10 is a diagram illustrating the operation of the second drive circuit 40 during a period when the input signal is negative, and FIGS. 11 and 12 are diagrams illustrating the regenerative current during the period when the input signal is negative. It is explanatory drawing which shows a path | route, Hereinafter, operation | movement of the above-mentioned Example is demonstrated with reference to these figures.
(1) Period in which the instantaneous value of the input signal is positive (see FIGS. 3 and 6 to 9)
During the period when the instantaneous value of the input signal is positive, the first switching pulse SP1 is low and the second switching pulse SP2 is high (however, the low period of the second switching pulse SP2 is shorter by the dead time). For this reason, of the first pair of switching elements, the switching element 1 is kept off, and 2 is kept on. On the other hand, the third switching pulse SP3 is PWM-modulated in proportion to the instantaneous value of the input signal and repeats high and low (however, the high period is shorter by the dead time). Among them, the switching element 3 is turned on and turned off while being low. The fourth switching pulse SP4 becomes low while the third switching pulse SP3 is high and becomes high while low (however, the high period is shorter by the dead time). The switching element 4 is turned on and turned off while low. Thus, the second pair of switching elements 3 and 4 are alternately turned on and off (see the state of the solid lines of the switching elements 1 and 2 in FIG. 3, see FIGS. 8 and 9).

When viewed in time series, for example, the switching element 3 is turned on and the switching element 4 is turned off at the time t1 in FIG. 6 (see the state of the solid lines of the switching elements 3 and 4 in FIG. 3). Both are turned off (dead time, see FIG. 8), switching element 3 is turned off at time t3, 4 is turned on (see FIG. 9), and both switching elements 3, 4 are turned off at time t4 (dead time, see FIG. 8). ), The switching element 3 is turned on again at time t5, and 4 is turned off (see the state of the solid lines of the switching elements 3 and 4 in FIG. 3). Thereafter, the same operation is repeated.
During the period from t1 to t2, the potential V0 of the connection point P1 of the first pair of switching elements 1 and 2 becomes the ground, and the potential V1 of the connection point P2 of the second pair of switching elements 3 and 4 becomes + B. + B is applied to the side opposite to the ground side of the load RL via the switching element 3 and the LC circuit 10. Since the switching element 3 is off during the period from t2 to t5, the single power supply 21 is in a floating state. On the other hand, if a current flows through the coil LF from the connection point P2 to the capacitor CF during the period t1-t2 (see reference numeral I in FIG. 3), the same applies to the coil LF even after the switching element 3 is turned off at t2. The current continues to flow in the direction, but this regenerative current flows through the path of the load RL, the switching element 2, the flywheel diode D4, and the coil LF during the period of t2-t3 and the period of t4-T5 (see FIG. 8). , T3 to t4, the load RL, the switching element 2, the switching element 4, the flywheel diode D4, and the coil LF flow (see FIG. 9). Therefore, the regenerative current does not flow into the single power source 21.

(1) Period in which the instantaneous value of the input signal is negative (see FIGS. 3, 6, 10, 11, and 12)
During a period when the instantaneous value of the input signal is negative, the first switching pulse SP1 is high and the second switching pulse SP2 is low (however, the low period of the first switching pulse SP1 is shorter by the dead time). For this reason, among the first pair of switching elements, the switching element 1 is kept on and 2 is kept off. On the other hand, the third switching pulse SP3 is PWM-modulated in proportion to the instantaneous value of the input signal and repeats high and low (however, the high period is shorter by the dead time). Among them, the switching element 3 is turned on and turned off while being low. The fourth switching pulse SP4 becomes low while the third switching pulse SP3 is high and becomes high while low (however, the high period is shorter by the dead time). The switching element 4 is turned on and turned off while low. As a result, the second pair of switching elements 3 and 4 are alternately turned on and off (see the broken line states of the switching elements 1 and 2 in FIG. 3, see FIGS. 11 and 12).

Looking at time series, for example, the switching element 3 is turned off and the switching element 4 is turned on at the time point t1 ′ in FIG. 10 (the state of the broken lines of the switching elements 3 and 4 in FIG. 3). 4 are turned off (dead time; see FIG. 11), switching element 3 is turned on at time t3 ′, and 4 is turned off (see FIG. 12), and both switching elements 3 and 4 are turned off at time t4 ′ (dead time. At time t5 ′, switching element 3 is turned off and 4 is turned on again (state of broken lines of switching elements 3 and 4 in FIG. 3), and the same operation is repeated thereafter.
During the period t1′-t2 ′, the potential V0 at the connection point P1 of the first pair of switching elements 1 and 2 is the ground, and the potential V1 at the connection point P2 of the second pair of switching elements 3 and 4 is −B. This -B is applied to the opposite side to the ground side of the load RL via the switching element 3 and the LC circuit 10. Since the switching element 4 is off during the period t2′-t5 ′, the single power supply 21 is in a floating state. On the other hand, if the current flows through the coil LF in the direction of the connection point P2 from the capacitor CF side during the period t1′−t2 ′ (see the symbol I ′ in FIG. 3), after the switching element 4 is turned off at t2 ′. However, the regenerative current is P2, flywheel diode D3, switching element 1, load RL during the period t2'-t3 'and the period t4'-t5'. (See FIG. 11), and flows through the path of the switching element 3, the flywheel diode D3, the switching element 1, and the load RL during the period t3′-t4 ′ (see FIG. 12). Therefore, the regenerative current does not flow into the single power source 21 even when the input signal is negative.

  According to this embodiment, a voltage that changes to approximately ± B with respect to the ground is applied to the opposite side of the ground of the load RL, so that the output power becomes as large as both power supplies and no DC bias is generated. Further, since the regenerative current does not flow into the single power source 21, the pumping phenomenon does not occur.

Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 13 is a circuit diagram showing a configuration of an audio D-class amplifier according to the present invention.
13 includes two sets of first and second D class amplifier circuits 70 and 80 configured in exactly the same manner as the D class amplifier of FIG. 3, and includes a first LC circuit of the first D class amplifier circuit 70. One end of the capacitor CF of 10A and one end of the capacitor CF of the second LC circuit 10B of the second D class amplifier circuit 80 are connected to the ground, and the first LC circuit 10A of the first D class amplifier circuit 70 is connected to the first LC circuit 10A. A load RL is connected between the second LC circuit 10B of the second D class amplifier circuit 80.
Further, when the first driving circuit 30 of the first D class amplifier circuit 70 turns on (off) the high side of the first pair of switching elements, the first driving circuit of the second D class amplifier circuit 80 30 turns on (off) the low side of the first pair of switching elements, and the second drive circuit 40 of the first D class amplifier circuit 70 turns on (off) the high side of the second pair of switching elements. At this time, the second drive circuit 40 of the second D-class amplifier circuit 80 turns on (off) the low side of the second pair of switching elements. That is, in the first D class amplifier circuit 70, the switching pulses SP1 and SP2 of the first drive circuit 30 are applied to the switching elements 1 and 2, whereas in the second D class amplifier circuit 80, the first drive circuit Thirty switching pulses SP1 and SP2 are applied to the switching elements 2 and 1, respectively. In the first D class amplifier circuit 70, the switching pulses SP3 and SP4 of the second drive circuit 40 are applied to the switching elements 3 and 4, whereas in the second D class amplifier circuit 80, the second drive circuit 40 Switching pulses SP3 and SP4 are applied to switching elements 4 and 3, respectively.

  In the D class amplifier of FIG. 13, during a period when the input signal is positive, the switching element 1 of the first D class amplifier circuit 70 is kept off and 2 is kept on, so that the switching element 1 of the second D class amplifier circuit 80 is turned on. Is on and 2 is off. The second pair of switching elements 3 and 4 of the first D class amplifier circuit 70 are alternately turned on / off by the switching pulses SP3 and SP4 that are PWM-modulated according to the instantaneous value of the input signal. In synchronization, the second pair of switching elements 3 and 4 of the second D class amplifier circuit 80 are alternately turned on and off (provided that the first D class amplifier circuit 70 and the second D class amplifier circuit 80 are turned on and off). And the opposite side is on / off). At some point, when the switching element 3 of the first D class amplifier circuit 70 is on, 4 is off, and the switching element 3 of the second D class amplifier circuit 80 is off, 4 is on (FIG. 13). Since the potential V2 at the connection point P2 of the first D class amplifier circuit 70 is + B and the potential V2 at the connection point P2 of the second D class amplifier circuit 80 is -B, the load RL has a second potential. When viewed from the D class amplifier circuit 80 side, approximately + 2B is applied to the first D class amplifier circuit 70 side.

At this time, a current flows from the first D class amplifier circuit 70 toward the load RL in the coil LF of the first LC circuit 10A of the first D class amplifier circuit 70, and the second D class amplifier circuit 80 Current flows from the load RL to the second D class amplifier circuit 80 in the coil LF of the second LC circuit 10B (see I in FIG. 13, the current path is the first D class amplifier circuit 70). The first single power supply 21A, the switching element 3, the connection point P2, the first LC circuit 10A, the load RL, the second LC circuit 10B of the second D-class amplifier circuit 80, the connection point P2, the switching element 4, the first 2 single power supply 21B, switching element 1, connection point P1, ground, connection point P1 of first D class amplifier circuit 70, switching element 2, first single power supply 21A), and then a dead tie When both the second switching elements 3 and 4 of the first D class amplifier circuit 70 and the second D class amplifier circuit 80 are turned off, the regenerative current is the second D class amplifier as shown in FIG. It flows in the path of D3 of the circuit 80, switching element 1, connection point P1, ground, connection point P1 of the first D class amplifier circuit 70, switching elements 2 and D4, and flows to the first and second single power supplies 21A and 21B. Does not flow.
Next, when the dead time is over and the switching element 3 of the first D class amplifier circuit 70 is turned off, 4 is turned on, and the switching element 3 of the second D class amplifier circuit 80 is turned on, 4 is turned off. As shown in FIG. 15, the currents are the switching elements 3 and D3 of the second D class amplifier circuit 80, the switching element 1, the connection point P1, the ground, the connection point P1 of the first D class amplifier circuit 70, the switching element 2, and the switching. It flows through the paths of the elements 4 and D4 and the connection point P2, but also does not flow through the first and second single power sources 21A and 21B.

  In contrast, in the D class amplifier of FIG. 13, during the period when the input signal is negative, the switching element 1 of the first D class amplifier circuit 70 is kept on, 2 is kept off, and the second D class amplifier circuit 80 Switching element 1 is off and 2 continues to be on. The second pair of switching elements 3 and 4 of the first D class amplifier circuit 70 are alternately turned on / off by the switching pulses SP3 and SP4 that are PWM-modulated according to the instantaneous value of the input signal. In synchronization, the second pair of switching elements 3 and 4 of the second D class amplifier circuit 80 are alternately turned on and off (provided that the first D class amplifier circuit 70 and the second D class amplifier circuit 80 are turned on and off). And the opposite side is on / off). At some point, when the switching element 3 of the first D class amplifier circuit 70 is off, 4 is on, and the switching element 3 of the second D class amplifier circuit 80 is on, 4 is off. Since the potential V2 at the connection point P2 of the D class amplifier circuit 70 is -B and the potential V2 at the connection point P2 of the second D class amplifier circuit 80 is + B, the second D class amplifier circuit 80 is connected to the load RL. When viewed from the side, approximately −2B is applied to the first D-class amplifier circuit 70 side.

At this time, a current flows from the load RL toward the first D class amplifier circuit 70 through the coil LF of the first LC circuit 10A of the first D class amplifier circuit 70, and the second D class amplifier circuit 80 Current flows from the second D class amplifier circuit 80 toward the load RL in the coil LF of the second LC circuit 10B (see I ′ in FIG. 16), the current path is the second D class amplifier circuit. 80 second single power source 21B, switching element 3, connection point P2, second LC circuit 10B, load RL, first LC circuit 10A of first D class amplifier circuit 70, connection point P2, switching element 4 The first single power source 21A, the switching element 1, the connection point P1, the ground, the connection point P1 of the second D-class amplifier circuit 80, the switching element 2, the second single power source 21B), and then the dead data When the second switching elements 3 and 4 of the first D class amplifier circuit 70 and the second D class amplifier circuit 80 are turned off, the regenerative current is the first D class as shown in FIG. It flows through the path of D3 of the amplifier circuit 70, switching element 1, connection point P1, ground, connection point P1 of the second D class amplifier circuit 80, switching elements 2 and D4, and the first and second single power supplies 21A and 21B. Does not flow.
Next, when the dead time is over and the switching element 3 of the first D-class amplifier circuit 70 is on, 4 is off, and the switching element 3 of the second D-class amplifier circuit 80 is off and 4 is on, the regeneration is performed. As shown in FIG. 18, the currents are the switching elements 3 and D3 of the first D class amplifier circuit 70, the switching element 1, the connection point P1, the ground, the connection point P1 of the second D class amplifier circuit 80, the switching element 2, and the switching. It flows through the paths of the elements 4 and D4 and the connection point P2, but also does not flow through the first and second single power sources 21A and 21B.

  According to the embodiment of FIG. 13, since the voltage changing to ± 2B is applied to the other end side when viewed from one end side of the load RL, the output power can be greatly increased. Further, since the regenerative current does not flow into the first and second single power sources 21A and 21B, the pumping phenomenon does not occur.

  The present invention can be applied to a D class amplifier using a single power source for audio and other purposes.

It is a circuit diagram which shows an example of the conventional audio D class amplifier. It is a circuit diagram which shows the other example of the conventional audio D class amplifier. 1 is a circuit diagram of an audio D-class amplifier according to a first embodiment of the present invention (first embodiment). FIG. FIG. 4 is a circuit diagram of a first drive circuit in FIG. 3. FIG. 4 is a circuit diagram of a second drive circuit in FIG. 3. It is a diagram explaining operation of the 1st drive circuit. It is a diagram explaining operation of the 2nd drive circuit when an input signal is positive. It is explanatory drawing which shows the path | route of the regenerative current when an input signal is positive. It is explanatory drawing which shows the path | route of the regenerative current when an input signal is positive. It is a diagram explaining operation | movement of the 2nd drive circuit when an input signal is negative. It is explanatory drawing which shows the path | route of the regenerative current when an input signal is negative. It is explanatory drawing which shows the path | route of the regenerative current when an input signal is negative. FIG. 6 is a circuit diagram of an audio D-class amplifier according to a second example of the present invention (Example 2). It is operation | movement explanatory drawing of the audio D class amplifier of FIG. It is operation | movement explanatory drawing of the audio D class amplifier of FIG. It is operation | movement explanatory drawing of the audio D class amplifier of FIG. It is operation | movement explanatory drawing of the audio D class amplifier of FIG. It is operation | movement explanatory drawing of the audio D class amplifier of FIG.

Explanation of symbols

1, 2, 3, 4 Switching element 10 LC circuit 10A First LC circuit 10B Second LC circuit 21 Single power supply 21A First single power supply 21B Second single power supply 30 First drive circuit 40 Second drive Circuit 70 First D class amplifier circuit 80 Second D class amplifier circuit RL Load LF Coil

Claims (4)

A first pair of switching elements on the high side and the low side;
A first pair of diodes connected in parallel to each of the first pair of switching elements;
A second pair of switching elements, a high side and a low side;
A second pair of diodes connected in parallel to each of the second pair of switching elements;
First driving means for alternately turning on and off the first pair of switching elements according to the positive and negative of the input signal;
Second driving means for alternately turning on and off the second pair of switching elements based on a PWM modulated pulse of the input signal;
A single power source connected to both ends of the first and second pair of switching elements;
An LC circuit connected between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
Connect one end of the LC circuit capacitor to the ground,
The load was connected in parallel with the capacitor of the LC circuit,
D-class amplifier characterized by A first D-class amplifier circuit and a second D-class amplifier circuit;
The first D-class amplifier circuit includes a first pair of high-side and low-side switching elements,
A first pair of diodes connected in parallel to each of the first pair of switching elements;
A second pair of switching elements, a high side and a low side;
A second pair of diodes connected in parallel to each of the second pair of switching elements;
First driving means for alternately turning on and off the first pair of switching elements according to the positive and negative of the amplitude of the input signal;
Second driving means for alternately turning on and off the second pair of switching elements based on a PWM modulated pulse of the input signal;
A first single power source connected to both ends of the first and second pair of switching elements;
A first LC circuit connected between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
The second D-class amplifier circuit includes a first pair of switching elements on the high side and the low side,
A first pair of diodes connected in parallel to each of the first pair of switching elements;
A second pair of switching elements, a high side and a low side;
A second pair of diodes connected in parallel to each of the second pair of switching elements;
First driving means for alternately turning on and off the first pair of switching elements according to the positive and negative of the amplitude of the input signal;
Second driving means for alternately turning on and off the second pair of switching elements based on a PWM modulated pulse of the input signal;
A second single power source connected to both ends of the first and second pair of switching elements;
A second LC circuit connected between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
One end of the capacitor of the first LC circuit and one end of the capacitor of the second LC circuit are connected to the ground,
A load is connected between the first LC circuit and the second LC circuit;
When the first driving means of the first D class amplifier circuit turns on (off) the high side of the first pair of switching elements, the first driving means of the second D class amplifier circuit is the first pair of switching elements. When the low side of the switching element is turned on (off) and the second driving means of the first D class amplifier circuit turns on (off) the high side of the second pair of switching elements, the second D class amplifier The second driving means of the circuit is configured to turn on (off) the low side of the second pair of switching elements;
D-class amplifier characterized by A first pair of diodes are connected in parallel to each of the first pair of switching elements on the high side and the low side,
A second pair of diodes are connected in parallel to each of the second pair of switching elements on the high side and the low side,
A single power source is connected to both ends of the first and second pair of switching elements,
Connecting an LC circuit between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
Connect one end of the capacitor of the LC circuit to the ground and connect a load in parallel with the capacitor of the LC circuit.
The first pair of switching elements are alternately turned on and off according to the positive and negative of the input signal,
The second pair of switching elements are alternately turned on / off based on a pulse obtained by PWM-modulating the input signal,
A switching drive method for a D-class amplifier characterized by the above. A first pair of diodes connected in parallel to each of the first pair of switching elements on the high side and the low side of the first D-class amplifier circuit;
A second pair of diodes are connected in parallel to each of the second pair of switching elements on the high side and the low side,
A first single power source is connected to both ends of the first and second pair of switching elements,
Connecting the first LC circuit between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
A first pair of diodes connected in parallel to each of the first pair of switching elements on the high side and the low side of the second D-class amplifier circuit;
A second pair of diodes are connected in parallel to each of the second pair of switching elements on the high side and the low side,
A second single power source is connected to both ends of the first and second pair of switching elements;
A second LC circuit is connected between a first connection point between the first pair of switching elements and a second connection point between the second pair of switching elements;
One end of the capacitor of the first LC circuit and one end of the capacitor of the second LC circuit are connected to the ground, and a load is connected between the first LC circuit and the second LC circuit,
The first pair of switching elements of the first and second D class amplifier circuits are alternately turned on and off according to the positive and negative of the input signal, and
Based on a pulse obtained by PWM-modulating the input signal, the second pair of switching elements of the first and second D class amplifier circuits are alternately turned on and off,
At this time, when the high side of the first pair of switching elements of the first D class amplifier circuit is turned on (off), the low side of the first pair of switching elements of the second D class amplifier circuit is turned on (off). When the high side of the second pair of switching elements of the first D class amplifier circuit is turned on (off), the low side of the second pair of switching elements of the second D class amplifier circuit is turned on (off). )
A switching drive method for a D-class amplifier characterized by the above.

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