JP2009246622A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To configure a termination resistor in a semiconductor device to be adjustable for impedance matching with a transmission path or the like connected with the semiconductor device. <P>SOLUTION: A gate voltage of a termination transistor is controlled in order to change on-resistance of the termination transistor in a direction canceling variations in accordance with impedance variations of a termination resistor. Therefore, it is possible to suppress a variation range of a termination resistance value, thereby reducing mismatch with a characteristic impedance of a transmission path or the like connected to the semiconductor device. Consequently, it is possible to suppress waveform deterioration caused by reflection. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having an impedance matching circuit.

  In recent years, the frequency of signals used in electronic devices has been increased, and the ability of electronic devices to control and process information has increased. Furthermore, in order to reduce the size and increase the functionality of electronic devices, more circuits are realized as integrated circuits.

Impedance matching has become important in order to reduce signal reflection, damping time, etc., as compared with the prior art, by increasing the frequency of signals used and circuit integration. FIG. 1 shows a conventional example in which a damping resistor is provided in an integrated circuit to realize impedance matching with an external load. The external resistor Rout has a small variation in resistance and a small variation in termination impedance. The invention disclosed in Patent Document 1 is configured such that any one of a plurality of damping resistors can be selected in order to make the damping resistor variable.
JP 2006-191417 A

  In the above conventional example, a termination resistor is configured by the external resistor and the on-resistance of the transistor in the semiconductor device. However, the mismatch of the termination impedance based on the variation of the on-resistance of the transistor is not considered. . Further, although the invention described in Patent Document 1 can selectively use a damping resistor, it cannot cope with variations in the resistance value based on the manufacturing variation of the resistor and the use environment. According to the present invention, when a circuit in a semiconductor device is manufactured, a terminal impedance (terminal resistor) for impedance matching is manufactured at the same time, and a change in resistance value that changes according to a change in the environment of the semiconductor device including the terminal impedance It is an object of the present invention to provide a semiconductor device having a termination impedance control circuit that can be adapted to impedance matching.

  In the present invention, the characteristics of the semiconductor element formed simultaneously with the termination resistor are such that the relationship between the drain-source voltage and the drain current is linear in a predetermined voltage region of the drain-source voltage, and in this predetermined voltage region, This was done by paying attention to the fact that the on-resistance of the transistor is constant and that the on-resistance varies depending on the gate voltage.

According to one aspect of the embodiment of the present invention, the apparatus includes a substrate, first and second transistors formed on the substrate, and a control circuit that controls a drain-source voltage of the first transistor. An output signal of the control circuit is input to the gate of the second transistor, and a drain of the second transistor is connected to an output terminal.
The control circuit may be a feedback circuit in which a reference voltage and the drain-source voltage of the first transistor are input signals, and the combination of the first and second transistors is 2 The first pair may be composed of a P-type MOS transistor, and the first pair may be composed of an N-type MOS transistor. The semiconductor device can receive an input signal having two values of high and low, and when the input signal has a high value, the input signal is one of the two pairs of the second combinations. When the input signal is a low value, the input signal may be input to the other second gate of the two pairs of combinations.

  According to another aspect of the embodiment of the present invention, a substrate, a resistance characteristic variation detector having a reference resistor formed on the substrate, and a transistor property variation detector having a reference transistor formed on the substrate. And a termination unit having a termination resistor formed on the substrate and a termination transistor connected in series with the termination resistor, the resistance characteristic variation detection unit being input to the amplification circuit and the amplification circuit A reference voltage generating circuit for generating a reference voltage, and the reference voltage and a voltage generated by passing a constant current through the reference resistance element are respectively input to the amplifier circuit, and an output signal of the amplifier circuit is The transistor characteristic fluctuation detection unit has a feedback circuit, and the output signal of the amplifier circuit is input to the feedback circuit, and the output signal of the feedback circuit is used for the reference. The semiconductor device having a structure that is input to the gate of the end transistors of the gate and the end portion of the transistor is provided.

In the semiconductor device, the resistance characteristic variation detection unit further includes a first resistance characteristic variation detection unit and a second resistance characteristic variation detection unit, and the transistor characteristic variation detection unit is a first transistor characteristic variation detection unit. The amplification circuit includes a detection unit and a second transistor characteristic variation detection unit, the reference voltage of the first resistance characteristic variation detection unit and a voltage generated by passing a constant current through the reference resistance element. And the output of the amplifier circuit is input to a feedback circuit of the first transistor characteristic variation detector, and the reference of the first transistor characteristic variation detector The transistor for termination and the termination transistor are P-type MOS transistors, and the output of the feedback circuit is input to the gate of the termination transistor of the P-type MOS transistor. The reference voltage of the resistance characteristic variation detector 2 and the voltage generated by passing a constant current through the reference resistance element are respectively input to a non-inverting input terminal and an inverting input terminal of the amplifier circuit, and the amplifier circuit Is input to a feedback circuit of the second transistor characteristic variation detector, and the reference transistor and the termination transistor of the second transistor characteristic variation detector are N-type MOS transistors, and the feedback The output of the circuit may be input to the gate of the termination transistor of the N-type MOS transistor.
Further, the semiconductor device can receive an input signal having two values of high and low, and the input signal is subjected to first resistance characteristic variation detection according to the signal having a high value or a low value. Or a pair of the first transistor characteristic variation detection unit and the termination transistor which is the P-type MOS transistor, or a second resistance characteristic variation detection unit and a second transistor characteristic variation detection unit, The signal may be input to a pair formed by a combination with the termination transistor which is the N-type MOS transistor.

  Since the gate voltage of the termination transistor is controlled in order to change the on-resistance of the termination transistor in a direction that cancels the variation according to the impedance variation of the termination resistance, this can suppress the fluctuation range of the termination resistance value. The mismatch with the characteristic impedance of the transmission line or the like connected to the semiconductor device of the invention can be reduced, and the deterioration of the waveform due to reflection can be suppressed.

  Prior to the present invention, the relationship between the time characteristic of the rise characteristic of the MOS transistor and the on-resistance of the MOS transistor will be described. The characteristics of MOS transistors vary in wafers and lots at the time of manufacture, and the on-resistance value increases as the transistor rises more slowly, and the on-resistance value increases as the ambient temperature in which the transistor is used is higher. Similarly, the value of the resistance element formed on the same substrate simultaneously with the transistor varies by about ± 10% of the nominal value. Therefore, when impedance matching is performed using this MOS transistor or resistance element, it depends on the resistance element value at the time of manufacture, the variation of the ON resistance (also referred to as ON resistance) of the MOS transistor, and the temperature change. Correction according to the change in resistance value is required.

  FIG. 2 is a graph showing the drain-source voltage (Vds) and the current (drain current Id) with respect to each voltage value by changing the voltage value input to the gate of the MOS transistor. As shown in FIG. 2, there are two types of operation regions of the MOS transistor, a linear region and a saturation region. The drain-source voltage (Vds) of the MOS transistor, the gate-source voltage are set to Vgs, and the MOS transistor is operated. When the threshold voltage is Vth, Vds ≦ Vgs−Vth is established in the linear region, and Vds> Vgs−Vth is established in the saturation region. It should be noted here that, generally, the Vds-Id characteristic of a transistor has a constant slope of the graph in a linear region where Vds is small, and this slope changes when the gate voltage is changed. Is a point. The slope of this graph represents the on-resistance of the transistor. When the slope of the linear region is a straight line, the on-resistance is constant regardless of Vds. The present invention utilizes the characteristic that the on-resistance changes depending on the gate voltage.

  Next, the main part of the present invention will be described with reference to FIG. FIG. 3 is a schematic view showing a main part of the present invention in the semiconductor device 10. In the semiconductor device 10, data having a binary value of high and low is input as a signal. In this embodiment, the data is input to the process variation detection circuits 12 and 14 via the two inverters 16 and 17. . As will be described later, the process variation detection circuits 12 and 14 are switched and used in accordance with binary values of high and low signals. The output signals of the process variation detection circuits 12 and 14 are sent to the termination resistor Rout22. The signals are input to the gates of the P-type MOS transistor 18 and the N-type MOS transistor 20 connected in series. The process fluctuation detection circuits 12 and 14 include reference MOS transistors for detecting fluctuations corresponding to fluctuations in the ON resistance values of the P-type and N-type MOS transistors 18 and 20 and the termination resistance Rout22, and reference reference transistors. A resistance element is provided. Signals input to the gate voltages of the P-type MOS transistor 18 and the N-type MOS transistor 20 in accordance with the fluctuations in the on-resistance value of the reference MOS transistor and the resistance value of the reference resistance element are each process fluctuation detection circuit. 12 and 14, respectively, and input to each gate. The P-type and N-type MOS transistors 18 and 20 are turned on so that the sum of the resistance values of the MOS transistor 18 or 20 and the termination resistance Rout22 is constant. The resistance value is controlled.

  Next, an embodiment of the present invention will be described with reference to FIG. The semiconductor device 100 includes a process variation detection circuit 110, a switch unit 150, and a termination unit 140. The process variation detection circuit 110 further includes a resistance characteristic variation detection unit 120 and a transistor characteristic variation detection unit 130. .

  The semiconductor device 100 receives binary signals of high and low (for example, a high signal corresponds to 1 and a low signal corresponds to 0) as data.

  Each of the resistance characteristic fluctuation detection unit 120, the transistor characteristic fluctuation detection unit 130, and the termination unit 140 uses a P-type MOS transistor or an N-type MOS transistor according to the high and low signals of the input binary signal. Each detection part and termination | terminus part are provided. In FIG. 4, when the input data is a low signal, this low signal is input to the N-ch side circuit via the analog switch 151, and the on-resistance of the N-type MOS transistor 260 is controlled. In the case of a high signal, this high signal is input to the P-ch side circuit via the analog switch 152, and the on-resistance of the P-type MOS transistor 262 is controlled.

  The operations on the N-ch side and the P-ch side are basically configured in the same manner, and the description on the N-ch side will be mainly described below. In addition, the same reference numerals are given to the component parts and the like corresponding to the functions on the P-ch side and the N-ch side. Some of the circuit elements that use a well-known display symbol and that perform a well-known function are not denoted by a reference numeral and a description thereof is omitted.

  The purpose of the resistance characteristic fluctuation detecting unit 120 is to provide a reference resistance element 202 for monitoring resistance value fluctuations and resistance value fluctuations due to temperature changes, a constant current source 204 for supplying a constant current thereto, and a reference voltage Vref2. The voltage dividing resistors 206 and 207 and the amplifier circuit 220 are used for generation.

A constant current is passed from the constant current source 204 to the reference resistance element 202 to drop the voltage (voltage drop). The voltage across the reference resistance element 202 is referred to as a drop voltage. The drop voltage when the resistance value of the reference resistance element 202 is large is Vr +, and the drop voltage when the resistance value is small is Vr−. When the drop voltage is Vr +, the output voltage of the amplifier circuit 220 is Vo1 +, and when the drop voltage is Vr−, Vo1 +. As the input voltage to the amplifier circuit 220 is larger, the output voltage becomes smaller, so Vo1 + <Vo1−. The output voltage of the amplifier circuit 220 decreases as the resistance value of the reference resistance element 202 increases. (An inverting amplifier circuit is configured in which verf2 is input to the non-inverting input terminal of the amplifier circuit 220 and a drop voltage is input to the inverting input terminal via a resistor element.)
Next, the operation of the N-ch side transistor characteristic variation detector 130 will be described. The transistor characteristic variation detection unit 130 includes a reference transistor 250 for monitoring variations and variations in the on-resistance of the transistor, a constant current source 252 for supplying a constant current thereto, and a feedback circuit 254. The reference transistor 250 The feedback circuit is configured to control the gate voltage so that the drain voltage of the transistor becomes the same voltage as the output voltage of the amplifier circuit 220. When the on-resistance of the reference transistor 250 is Ron and the current flowing through the reference transistor 250 is I, the drain voltage Vds of the reference transistor 250 satisfies Vds = I × Ron according to Ohm's law. Since the current I is constant, therefore, in order to increase the drain voltage, Ron must be increased, so the gate voltage decreases.

  Conversely, in order to lower the drain voltage, Ron must be reduced, so the gate voltage increases. Due to the relationship of Vo1 + <Vo1-, the voltage of Vo1- is higher than that of Vo1 +. Therefore, the on-resistance of the reference transistor 250 is Ron + when the input voltage is Vo1 +, and Ron- when Vo1-. Then, Ron + <Ron−.

  Therefore, the on-resistance of the reference transistor 250 can be controlled in the direction opposite to the fluctuation of the resistance value of the reference resistance element 202.

  When the resistance value of the reference resistance element 202 is constant and the output voltage of the amplifier circuit 220 is constant, considering the process variation of the N-ch side transistor, the drain voltage is constant and the P-type and N-type MOS transistors are constant. In order to reduce the on-resistance, the gate voltage is lower when both transistors have slower rise characteristics and when both rise characteristics are slower. Becomes higher. Therefore, the output voltage of the feedback circuit 254 is the output voltage of the feedback circuit 254 when the rise characteristics of both the P-type and N-type MOS transistors are faster when the rise characteristics of both the P-type and N-type MOS transistors are slower. Get higher.

  By connecting the output voltage of the feedback circuit 254 to the gate of the N-type MOS transistor 260 of the N-ch side termination unit 140, the on-resistance of the N-type MOS transistor 260 is increased in resistance value of the termination resistor 280. In some cases, it is small, and when it is small, it can be enlarged. Further, when the rise characteristics of the transistors are slow for both the P-type and N-type MOS transistors, the on-resistance of the N-type MOS transistor 260 can be reduced, and when it is early, the on-resistance can be increased to control the terminal impedance. can do.

  The main part of the above description will be described in more detail. In FIG. 4, when the on-resistance of the reference transistor 250 on the N-ch side of the transistor characteristic variation detector 130 is Ron1, and the number of transistors connected in parallel is m, one transistor. The hit on-resistance is Ron1 × m.

  Further, when the on-resistance of the N-channel MOS transistor 260 on the N-ch side of the termination unit 140 is Ron2, and the number of the N-type MOS transistors 260 connected in parallel is n, the on-resistance per transistor is Ron2 × n.

  Assuming that these reference N-type MOS transistor 250 and N-type MOS transistor 260 are substantially the same size and both are biased in the linear region, the on-resistance per transistor 250 and 260 is substantially equal. Ron1 × m≈Ron2 × n, Ron2≈Ron1 × m / n.

  Therefore, if the on-resistance of the reference transistor 250 can be controlled, the on-resistance of the N-type MOS transistor 260 can also be controlled. Therefore, by controlling the on-resistance of the reference transistor 250 in the direction opposite to the resistance variation of the termination resistance element 280, The termination impedance can be controlled.

  Also, the P-ch side transistor control method is such that the (inversion) amplifier circuit of the process variation detection circuit 110 becomes a normal amplifier circuit, and the output voltage of the normal amplifier circuit increases as the resistance value increases. Since Vds of the reference transistor 255 formed of a MOS transistor is low, the gate voltage is high to reduce the on-resistance, and the reference transistor 255 has a reverse direction to the direction of change in the resistance value of the reference resistor 222. The on-resistance can be controlled.

  The operation of the P-ch side transistor characteristic variation detector 130 is basically the same as the operation of the N-ch side transistor characteristic variation detector 130.

  Although the details of the switch unit 150 are omitted, whether the termination impedance on the N-ch side or the P-ch side is controlled is determined based on the signal input to the semiconductor device 100 based on the analog switch 151. Do by operating.

  Another embodiment of the present invention will be described with reference to FIG. In the figure, the same elements as those shown in FIG. The embodiment shown in FIG. 5 is a case where a terminal resistance element for impedance matching is not provided in the semiconductor device 100. In this case, it is not necessary to detect a change in resistance characteristics, and therefore, the embodiment shown in FIG. In this configuration, the resistance characteristic variation detection unit 120 is omitted from the embodiment.

  Vds is obtained so that the ON resistances of the N-type MOS transistor 260 and the P-type MOS transistor 262 of the termination unit 140 have desired resistance values, and the voltage is input to the negative side input of the feedback circuit 254 of the transistor characteristic variation detection unit 130. It is given as a reference voltage. By doing so, the on-resistance values of the reference transistors 250 and 255 become constant, so that the on-resistances of the N-type MOS transistor 260 and the P-type MOS transistor 262 of the termination unit 140 can also be controlled to be constant.

  Another embodiment of the present invention is shown in FIG. In this embodiment, this corresponds to the case where the termination resistor is outside the semiconductor device 100, and in this case as well, it is not necessary to detect the variation of the resistance characteristic. Therefore, as in the circuit configuration shown in FIG. The on-resistance of the transistor 260 can be controlled to be constant.

  Since the gate voltage of the termination transistor is controlled in order to change the on-resistance of the termination transistor in a direction that cancels the variation according to the impedance variation of the termination resistance, this can suppress the fluctuation range of the termination resistance value. The mismatch with the characteristic impedance of the transmission line or the like connected to the invention can be reduced, and the waveform deterioration due to reflection can be suppressed.

The figure which shows a prior art example. The figure which shows the Vds-Id characteristic of a transistor Circuit block diagram showing an embodiment of the present invention Circuit block diagram showing an embodiment of the present invention Circuit block diagram showing an embodiment of the present invention Circuit block diagram showing an embodiment of the present invention

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor device 120 Resistance characteristic fluctuation | variation detection part 130 Transistor characteristic fluctuation | variation detection part 140 Termination part 150 Switch part 151,152 Analog switch 202,222 Reference resistance element 250,255 Reference transistor 260 N-type MOS transistor 262 P-type MOS transistor

Claims (7)

A substrate,
First and second transistors formed on the substrate;
A control circuit for controlling a drain-source voltage of the first transistor,
An output signal of the control circuit is input to a gate of the second transistor, and a drain of the second transistor is connected to an output terminal. 2. The semiconductor device according to claim 1, wherein the control circuit is a feedback circuit in which a reference voltage and the drain-source voltage of the first transistor are input signals. 2. The combination of the first and second transistors, wherein the first pair is composed of a P-type MOS transistor and the second pair is an N-type MOS transistor. The semiconductor device according to claim 2. The semiconductor device can receive an input signal having two values of high and low, and when the input signal has a high value, the input signal is one of the second gates of the two pairs of combinations. The input signal is input to the second gate of the other of the two pairs of combinations when the input signal is a low value. Such a semiconductor device. A substrate,
A resistance characteristic variation detector having a reference resistor formed on the substrate;
A transistor characteristic variation detector having a reference transistor formed on the substrate;
A termination portion having a termination resistor formed on the substrate and a termination transistor connected in series with the termination resistor;
The resistance characteristic variation detector includes an amplifier circuit and a reference voltage generation circuit that is input to the amplifier circuit and generates a reference voltage, and a voltage generated by passing a constant current through the reference voltage and the reference resistance element Are respectively input to the amplifier circuit, and an output signal of the amplifier circuit is transmitted to the transistor characteristic variation detector,
The transistor characteristic variation detection unit includes a feedback circuit, and an output signal of the amplifier circuit is input to the feedback circuit, and an output signal of the feedback circuit includes a gate of the reference transistor and a gate of the termination transistor of the termination unit. Input to the semiconductor device. The resistance characteristic variation detection unit includes a first resistance characteristic variation detection unit and a second resistance characteristic variation detection unit, and the transistor characteristic variation detection unit includes the first transistor characteristic variation detection unit and the second transistor characteristic detection unit. A fluctuation detecting unit,
The reference voltage of the first resistance characteristic variation detector and the voltage generated by passing a constant current through the reference resistance element are respectively input to an inverting input terminal and a non-inverting input terminal of the amplifier circuit, The output of the amplifier circuit is input to the feedback circuit of the first transistor characteristic variation detector,
The reference transistor and the termination transistor of the first transistor characteristic variation detection unit are P-type MOS transistors, and an output of the feedback circuit is input to a gate of the termination transistor of the P-type MOS transistor. The reference voltage of the resistance characteristic fluctuation detection unit and a voltage generated by passing a constant current through the reference resistance element are respectively input to a non-inverting input terminal and an inverting input terminal of the amplifier circuit, and The output is input to the feedback circuit of the second transistor characteristic variation detector,
The reference transistor and the termination transistor of the second transistor characteristic variation detector are N-type MOS transistors, and the output of the feedback circuit is input to the gate of the termination transistor of the N-type MOS transistor. 6. The semiconductor device according to claim 5, wherein: The semiconductor device can receive an input signal having two values of high and low,
Depending on whether the signal is high or low, the input signal is
A pair configured by a combination of a first resistance characteristic variation detection unit, a first transistor characteristic variation detection unit, and the termination transistor which is the P-type MOS transistor;
Alternatively, the second resistance characteristic variation detection unit, the second transistor characteristic variation detection unit, and the termination transistor that is the N-type MOS transistor are input to a pair. A semiconductor device according to 1.

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