JP2007209121A - Power system - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To prevent reverse current reliably and to enhance efficiency in a power system where each of a plurality of power supply sections is connected with a reverse current prevention section. <P>SOLUTION: In the power system for supplying a DC current to a load through a reverse current prevention section connected with the output terminal each of a plurality of power supply sections outputting a stabilized DC voltage, the reverse current prevention section comprises an n-type FET Q1 connected between an input terminal Tin connected with the power supply section and an output terminal Tout connected with a load, a comparison circuit COM for comparing the voltage between the source S and the drain D of the n-type FET Q1 and outputting a low level when the source voltage Vs is higher than the drain voltage Vd otherwise outputting a high level, and an n-type FET Q2 for control for turning on the gate G of the n-type FET Q1 by applying a voltage when the comparison circuit COM outputs a low level and turning off the gate G of the n-type FET Q1 without applying a voltage when the comparison circuit COM outputs a high level. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a power supply device including a low-loss backflow prevention means.

  A power supply device that supplies stabilized DC power to a low-voltage and large-current DC load generally has a configuration in which power supply units including a plurality of switching power supplies are operated in parallel. In that case, there is a problem that the current flows backward from other normal power supply units to the power supply unit whose output voltage has dropped due to an internal failure or the like. A configuration is known in which each power supply unit is connected to an output terminal of a unit and supplies stabilized DC power to a load via a blocking diode. An example of a power supply device to which the blocking diode is connected is shown in FIG. 3. The power supply units 31 and 32 are constituted by, for example, a switching power supply, and a stabilized DC voltage is applied to the load 33 via the blocking diodes D1 and D2, respectively. To be applied. When the power supply units 31 and 32 are normal, the current in the direction of the arrow is supplied to the load 33 via the blocking diodes D1 and D2. Further, since a voltage is applied in the reverse direction of the blocking diode to the faulty power supply unit, it is possible to prevent the reverse flow.

  When a low voltage and a large current are supplied to the load 33 in a normal state where current flows in the forward direction of the blocking diodes D1 and D2, power loss corresponding to the forward voltage drop of the blocking diodes D1 and D2 is caused. In view of improving the efficiency of the power supply device, it is necessary to reduce this power loss. In view of this, various configurations have been proposed in which the blocking diodes D1 and D2 are replaced with field effect transistors (hereinafter abbreviated as FETs) having low on-resistance. For example, when the load current is large, the FET is turned on to be in a low resistance state, and when the load current is small, the FET is turned off, and the load current is supplied by the forward characteristics of the internal parasitic diode (body diode) and turned off. As a state, a configuration has been proposed in which a parasitic diode at the time acts as a backflow prevention like a blocking diode (see, for example, Patent Document 1).

Also, an FET is connected in parallel with the blocking diode, the FET is turned on, and a direct current is supplied to the load through the parallel circuit of the blocking diode and the FET, so that the on-resistance of the FET becomes the forward resistance of the blocking diode. When compared with a smaller power loss, and when a reverse current flows back through the FET in the on state due to a failure, this reverse current is detected to shut off the gate voltage of the FET and turn it off. The structure which prevents this is proposed (for example, refer patent document 2).
Japanese Patent Laid-Open No. 03-103029 JP 2001-119950 A

  The voltage applied to the load tends to be reduced to about 1 to 2 V or less, and the current tends to increase accordingly. Accordingly, the output voltage of the power supply device is set to a low voltage, and the output current capacity is increased or the number of power supply units in parallel is increased. In that case, as described above, it is conceivable to apply a configuration using an FET having a small on-resistance value compared to the forward resistance of the diode. Further, when the output voltage of the power supply unit is set to a low voltage of 1 to 2 V or less, there is a problem that it is not easy to quickly and surely execute the on / off control of the FET. Further, there is a problem that the configuration including the FET and its drive control portion is increased in size as compared with a single blocking diode. Furthermore, there are two types of FETs, p-type and n-type. The p-type has a problem that the on-resistance is large and expensive compared to the n-type.

  An object of the present invention is to solve the conventional problems, and to reduce the size and improve the efficiency of a low-voltage, large-current power supply device.

  The power supply device of the present invention is a power supply device that supplies a direct current to a load via a backflow prevention unit to output terminals of a plurality of power supply units that output a stabilized DC voltage, wherein the backflow prevention unit includes the power supply unit. The n-type field effect transistor connected between the input terminal connected to the unit and the output terminal connected to the load is compared with the voltage between the source and drain of the n-type field effect transistor, and the source voltage is A comparison circuit that outputs a low level when the voltage is higher than the voltage, and a high level output when the voltage is lower, and a voltage is applied to the gate of the n-type field effect transistor when the comparison circuit outputs a low level. And a control n-type field effect transistor that is turned off without applying a voltage to the gate of the n-type field effect transistor during level output.

  The backflow prevention unit includes a terminal for supplying an operating voltage of the comparison circuit and operating voltages of the n-type field effect transistor and the control n-type field effect transistor, the input terminal connected to the power supply unit, A three-terminal integrated circuit configuration with an output terminal connected to a load can be adopted.

  An n-type field effect transistor has lower on-resistance and is less expensive than a p-type field effect transistor, and improves efficiency by reducing power loss when the power supply is normal and supplying current to a load. Can be achieved. Further, an integrated circuit having a size that is not much different from that of a conventional blocking diode can be realized, and the power supply device can be miniaturized.

  Referring to FIG. 2, the power supply apparatus of the present invention is a power supply apparatus that supplies a direct current to a load via a backflow prevention unit to output terminals of a plurality of power supply units that output a stabilized DC voltage. The backflow prevention unit includes an n-type field effect transistor Q1 connected between an input terminal Tin connected to the power supply unit and an output terminal Tout connected to the load, and a source S / drain D of the n-type field effect transistor Q1. A comparison circuit COM that outputs a low level when the source voltage Vs is higher than the drain voltage Vd and a high level output when the source voltage Vs is lower than the drain voltage Vd, and the n-type field effect transistor Q1 when the comparison circuit COM outputs a low level. A voltage is applied to the gate G of the n-type field effect transistor to turn it on, and a voltage is applied to the gate of the n-type field effect transistor Q1 when the comparison circuit COM outputs a high level. Ide and has a configuration including a control n-type field effect transistor Q2 to an off state.

  FIG. 1 is an explanatory diagram of a first embodiment of the present invention, in which 1 and 2 are power supply units that output a stabilized DC voltage such as a switching power supply, 3 is a load, 4 and 5 are backflow prevention units, and Vcc is a backflow prevention unit. The operating voltage of the part is shown. The backflow prevention units 4 and 5 include n-type FETs and their drive units, and are connected between the output terminals of the power supply units 1 and 2 and the load 3.

  FIG. 2 is an explanatory diagram of the backflow prevention unit according to the first embodiment of the present invention, and shows the configuration of the backflow prevention units 4 and 5 in FIG. 1. Q1 is an n-type field effect transistor having a parasitic diode ( Q2 is a control n-type field effect transistor (hereinafter abbreviated as control n-type FET) having a parasitic diode, D is a drain, S is a source, G is a gate, and COM is a comparison circuit. , C1 is a capacitor, ZD is a Zener diode, R1 to R3 are resistors, Tin is an input terminal connected to the output terminal of the power supply unit, Id is a current supplied to the load, Vs is a source voltage, Vd is a drain voltage, and Tout is a load. An output terminal Vcc connected to Vcc represents an operating voltage supplied from the power supply unit.

  The operating voltage Vcc is supplied as a desired value from the power supply unit, is used as the operating voltage of the comparison circuit COM, is applied to the gate of the control n-type FET Q2 through the resistor R1, and is also formed by the Zener diode ZD and the resistor R2. The voltage is made constant and applied to the drain D of the control n-type FET Q2 and the gate G of the n-type FET Q1 through the resistor R3. Further, when the source S and drain D of the n-type FET Q1 are connected between the input terminal Tin and the output terminal Tout, and a voltage is applied to the gate G to turn it on, the current Id in the direction of the arrow is supplied to the load. When no voltage is applied, the transistor is turned off, and the parasitic diode is also connected in the reverse direction, so that backflow prevention can be performed. The control n-type FET Q2 is an FET that controls whether or not a voltage is applied to the gate G of the n-type FET Q1, and the parasitic diode is connected in the opposite direction to the gate G of the n-type FET Q1. . The capacitor C1 is for stabilizing the operating voltage Vcc of the comparison circuit COM.

  The comparison circuit COM is configured to be a low level output when the source voltage Vs and the drain voltage Vd of the n-type FET Q1 have a relationship of Vs> Vd, and on the contrary, a high level output when the relationship of Vs <Vd. It is possible to apply various configurations such as already known FETs. When the power supply connected to the input terminal Tin is normal, the relationship of Vs> Vd is established, so that the comparison circuit COM becomes a low level output. Therefore, the control n-type FET Q2 is turned off, and both ends of the resistor R2 are connected. A voltage is applied to the gate G of the n-type FET Q1 to turn it on. A current Id in the direction of the arrow is supplied from the output terminal Tout to the load through the n-type FET Q1 in the on state.

  When the output voltage of the power supply unit connected to the input terminal Tin is reduced and the voltage applied to the load from the output terminal Tout is lower than the output voltage of the other power supply unit, the source voltage Vs and the drain voltage Vd of the n-type FET Q1 are reduced. The relationship is Vs> Vd. As a result, the comparison circuit COM becomes a high-level output, and a voltage is applied to the gate G of the control n-type FET Q2 via the resistor R1 to turn it on. Accordingly, the gate G of the n-type FET Q1 is short-circuited with the source S via the control n-type FET Q2, and the n-type FET Q1 is turned off. That is, it becomes a backflow prevention state.

  The backflow prevention unit has a current capacity configuration corresponding to the magnitude of the current Id supplied to the load via the n-type FET Q1, and can be integrated into an integrated circuit including the other control n-type FET Q2 and the comparison circuit COM. In other words, a three-terminal configuration including an input terminal Tin, an output terminal Tout, and a terminal to which the operating voltage Vcc is applied can be employed. Therefore, even if it uses a blocking diode, it does not increase in size. By supplying the operating voltage Vcc of the backflow prevention unit, it is possible to ensure the operation of the comparison circuit COM and the n-type FET.

It is explanatory drawing of Example 1 of this invention. It is explanatory drawing of the backflow prevention part of Example 1 of this invention. It is principal part explanatory drawing of the power supply circuit of a prior art example.

Explanation of symbols

1, 2 Power supply section 3 Load 4, 5 Backflow prevention section Q1 n-type field effect transistor (n-type FET)
Q2 Control n-type field effect transistor (control n-type FET)
COM Comparison circuit C1 Capacitor ZD Zener diode R1 to R3 Resistance Vcc Operating voltage

Claims (2)

In a power supply apparatus that supplies a direct current to a load via a backflow prevention unit to output terminals of a plurality of power supply units that output a stabilized DC voltage,
The backflow prevention unit includes an n-type field effect transistor connected between an input terminal connected to the power supply unit and an output terminal connected to the load, and a voltage between the source and drain of the n-type field effect transistor. In comparison, a comparison circuit that outputs a low level when the source voltage is higher than the drain voltage and a high level output when the source voltage is low, and a voltage applied to the gate of the n-type field effect transistor when the comparison circuit outputs a low level. And a control n-type field effect transistor that is turned off without applying a voltage to the gate of the n-type field effect transistor when the comparator circuit outputs a high level. .   The backflow prevention unit includes a terminal for supplying an operating voltage of the comparison circuit and operating voltages of the n-type field effect transistor and the control n-type field effect transistor, the input terminal connected to the power supply unit, and the load 2. The power supply device according to claim 1, wherein the power supply device has a three-terminal integrated circuit configuration with an output terminal connected to the power source.

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