JP2007165750A - Semiconductor device and its manufacturing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To improve the operating speed of a semiconductor device by suppressing the increase of a resistance rate of metallic wiring whose wiring width is narrow. <P>SOLUTION: In this semiconductor device 100, a silicon oxide film 102 and a copper line 105 formed in the silicon oxide film 102 are formed on a semiconductor substrate 101, and the copper wiring 105 is provided with a first ferromagnetic film 104A formed on the lower face, right face side, and left side face and a second ferromagnetic film 104B formed on the upper face. The magnetization directions of the first ferromagnetic film 104A and the second ferromagnetic film 104B are lined up in the same direction so as to be matched with the extended direction of the copper wiring 105. <P>COPYRIGHT: (C)2007,JPO&INPIT

Description

  The present invention relates to a semiconductor device provided with a metal wiring having a narrow wiring width and a manufacturing method thereof.

  In recent semiconductor devices, miniaturization and multilayering of wiring patterns are progressing in order to realize high integration. However, miniaturization of wiring patterns causes an increase in wiring resistance, and multilayering of wiring patterns causes an increase in inter-wiring capacitance. The cause of the increase in wiring resistance is that the movement of conduction electrons is hindered by static scattering due to impurities and lattice defects and dynamic scattering due to lattice vibration. Such an increase in wiring resistance and an increase in inter-wiring capacitance leads to a decrease in signal transmission speed in the wiring. Since this decrease in the signal transmission speed hinders the speeding up of the operation of the semiconductor device, copper is introduced as a low-resistance metal wiring material as a countermeasure.

However, if the size of the copper crystal grains and the length of one side of the cross section of the wiring are the same as the mean free path of electrons, the influence of electron scattering at the copper grain boundaries and the side walls of the wiring becomes obvious, and the resistivity is increased. It is known to increase. FIG. 5 is a diagram showing the wiring width dependence of the resistivity of the copper wiring using the electron scattering at the crystal grain boundary and the electron scattering at the wiring side wall as parameters (see, for example, Non-Patent Document 1 or 2). As shown in FIG. 5, as the wiring width of the copper wiring becomes narrower, the resistivity due to scattering at the wiring sidewall and scattering at the crystal grain boundary increases, and these resistances are not affected by the wiring width. You can see that the rate is added. Here, in the region where the wiring width is 300 nm or more, resistance due to scattering on the wiring side wall is observed, but this is due to scattering of the plane parallel to the wiring width which occurs because the wiring thickness used in this experiment is 150 nm. It is.
Semiconductor International July edition (2005) Reed Electronics Group (https://www.sijapan.com/content/0507vol2/cover/cover_0507.html) W. Steinhoegl, G. Schindler, G. Steinlesberger, M. Traveling and M. Engelhardt, “Comp-rehenive Study of Copper Wires With Lateral Dimensions of 100nm and Smaller,” J. Appl. Phys., 2005, Vol. 97, p.023706

  However, when the miniaturization of the wiring pattern has progressed and the wiring width becomes about the mean free path of electrons, there has been a problem that the resistivity of the wiring increases and the speeding up of the operation of the semiconductor device is hindered.

  In view of the above-described problems, the present invention has an object to suppress an increase in the resistivity of a wiring even when the wiring width becomes as narrow as the mean free path of conduction electrons, and to improve the operation speed of a semiconductor device. And

  The semiconductor device according to the present invention is directed to a semiconductor device including a metal wiring formed in an insulating film, and the metal wiring includes a first pair of opposing surfaces including an upper surface and a lower surface, and a left side surface or a right side surface. A ferromagnetic film having a magnetization direction in one direction in which the metal wiring extends is provided on at least one of the second pair of opposed surfaces.

  With this configuration, scattering of conduction electrons in the side wall portion of the metal wiring can be suppressed. In other words, the metal wiring is sandwiched between the ferromagnetic films, and the magnetization directions of the ferromagnetic films are the same and coincide with the extending direction of the metal wiring. Since the interaction (interfacial scattering) with the resistance becomes smaller, the resistance becomes lower (this is called the giant magnetoresistance effect). Therefore, even if the wiring width becomes narrow, an increase in resistivity can be suppressed and the operation speed can be improved.

  In the above-described semiconductor device according to the present invention, it is preferable that ferromagnetic films having the same magnetization direction are provided on the first facing surface and the second facing surface. With this configuration, a ferromagnetic film having a uniform magnetization direction is provided on all the top, bottom, left, and right sides with respect to the direction in which the metal wiring extends, so that the resistivity rises on the side wall of the metal wiring. Can be further suppressed.

  In the above-described semiconductor device according to the present invention, the metal wiring preferably includes copper as a main component. Thus, by using copper as a metal wiring material having a low resistance for the metal wiring, an increase in resistivity can be further suppressed.

  The method for manufacturing a semiconductor device according to the present invention includes a step of forming a wiring groove in an insulating film, a first opposing surface comprising an upper surface and a lower surface, and a second opposing surface comprising a left side and a right side. Forming a metal wiring provided with a ferromagnetic film on at least one of them, and applying a magnetic field to the ferromagnetic film so that the magnetization direction of the ferromagnetic film coincides with the extending direction of the metal wiring. ing. With such a configuration, the magnetization direction of the ferromagnetic film can be efficiently aligned.

  According to the semiconductor device and the method for manufacturing the same according to the present invention, it is possible to suppress the increase in resistivity of the metal wiring that becomes apparent as the wiring pattern becomes finer, and the wiring width becomes about the mean free path of electrons. Even so, the operating speed of the halfway apparatus can be improved.

  A semiconductor device according to an embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a cross-sectional structure of a main part of the semiconductor device according to this embodiment.

  As shown in FIG. 1, the semiconductor device 100 according to the present embodiment includes a silicon oxide film 102 having a thickness of about 100 nm formed as an insulating film on a semiconductor substrate 101, and a silicon oxide film 102 formed in the silicon oxide film 102. A copper wiring 105 having a line width and thickness of about 50 nm, a first ferromagnetic film 104A provided on the lower surface, the left side, and the right side of the copper wiring 105, and a second provided on the upper surface of the copper wiring 105. And the ferromagnetic body 104B.

  The first ferromagnetic film 104A and the second ferromagnetic film 104B provided so as to cover the upper surface, the lower surface, the left side surface, and the right side surface of the copper wiring 105 are, for example, Nd (neodymium) having a film thickness of about 2 nm. 1 and is magnetized in the direction perpendicular to the paper surface of FIG. 1, and the magnetization directions are all aligned in the same direction.

  The magnetization direction only needs to coincide with the direction in which the copper wiring 105 extends, and may be the same direction or the opposite direction to the direction in which the current flows.

  The operation of the ferromagnetic film according to the present invention will be described below with reference to FIGS. 2 (a) and 2 (b). 2A and 2B show the spin interaction between the ferromagnetic film 200 and the conduction electrons 201 in the metal wiring, that is, the conduction electrons 201 in the metal wiring sandwiched between the ferromagnetic films 200. FIG. Shows the movement. FIG. 2A shows a case where the magnetization directions (solid arrow or broken line arrow) of the opposing ferromagnetic film 200 are in the same direction and coincide with the extending direction of the metal wiring, and FIG. The case where the magnetization directions are opposite to each other is shown.

  As shown in FIGS. 2A and 2B, the interaction between the conduction electrons and the ferromagnetic film (interface scattering) varies greatly depending on the magnetization direction of the ferromagnetic film 200 (for example, Japanese Patent Laid-Open No. Hei 11). -331618). As shown in FIG. 2A, the spins of the conduction electrons 201 moving in the metal wiring sandwiched between the ferromagnetic films 200 whose magnetization directions coincide with each other have an interaction with the spins of the ferromagnetic film 200. Can move in a small state. Therefore, the resistance of the conduction electron 201 is lowered.

  On the other hand, as shown in FIG. 2B, the spin of the conduction electrons 201 moving in the metal wiring sandwiched between the ferromagnetic films 200 whose magnetization directions are opposite to each other is the spin of the ferromagnetic film 200. Therefore, the resistance of the conduction electron 201 becomes high.

  If the metal wiring is not covered with a ferromagnetic film, the conduction electrons in the metal wiring collide with the metal wiring side wall, resulting in interface scattering with uncontrolled spin. The resistivity of the metal wiring will increase.

  That is, according to the present invention, the increase in resistance of conduction electrons can be suppressed by covering the metal wiring with a ferromagnetic film whose magnetization directions are the same as each other and coincides with the extending direction of the metal wiring. Therefore, the increase in resistivity can be effectively suppressed when the width of the metal wiring is reduced and the mean free path of conduction electrons is reached.

  Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. However, the same components as those in FIG.

  First, as shown in FIG. 3A, a silicon oxide film 102 having a thickness of about 100 nm is formed on a semiconductor substrate 101 by, for example, a CVD (Chemical Vapor Deposition) method, and then a lithography method and a dry etching method are performed. A wiring groove 103 is formed. Next, as shown in FIG. 3B, a first ferromagnetic film 104A made of Nd having a thickness of about 2 nm is deposited by sputtering.

  Next, as shown in FIG. 3C, a portion of the first ferromagnetic film 104A existing outside the wiring trench 103 is removed by isotropic dry etching or CMP (Chemical Mechanical Polish). The first ferromagnetic film 104 </ b> A is formed only inside the wiring trench 103. Subsequently, as shown in FIG. 3D, copper wiring 105 is formed by embedding copper in the wiring groove 103 so as to have a film thickness of about 50 nm by, for example, electroless plating. The copper wiring 105 may be formed by, for example, a method of removing by CMP or etchback after deposition by a sputtering method, or another method such as an electrolytic plating method instead of the electroless plating method.

  Next, as shown in FIG. 3E, a second ferromagnetic film 104B made of Nd having a film thickness of about 2 nm is deposited over the entire surface of the semiconductor substrate 100 by sputtering. Subsequently, as shown in FIG. 3F, the portion existing outside the wiring trench 103 in the second ferromagnetic film 104B is removed by CMP, and the second strong film is only on the inner side of the wiring trench 103. A magnetic film 104B is formed.

  As a result, the copper wiring 105 having the lower surface, the left side surface and the right side surface covered with the first ferromagnetic film 104A and the upper surface covered with the second ferromagnetic film 104B is formed.

  The material of the first ferromagnetic film 104A and the second ferromagnetic film 104B is B (boron), Ce (cerium), Co (cobalt), Cr (chromium) instead of Nd (neodymium). ), Fe (iron), La (lanthanum), Mn (manganese), Ni (nickel), Sm (samarium), Sr (strontium), and their alloys, oxides, and nitrides may be used. Furthermore, for example, an organic material such as TTTA (cyclic thiazyl radical (1,3,5-Trithia-2,4,6-triazapentalenyl)) known as a molecular magnetic substance may be used.

  Here, the first ferromagnetic film 104 </ b> A and the second ferromagnetic film 104 </ b> B are formed by a sputtering method, but may be formed by using a plating method instead of the sputtering method. When forming by a sputtering method, it is performed by a general magnetron sputtering method, and a magnetic field having a magnetic flux density of about 0.01 T, for example, is applied in a direction coinciding with the direction in which the copper wiring 105 extends. By applying the magnetic field in this way, the magnetization directions of the first ferromagnetic film 104A and the second ferromagnetic film 104B can all be made the same, so that the upper surface, the lower surface, and the left side of the copper wiring 105 The first ferromagnetic film 104A and the second ferromagnetic film 104B formed on the surface and the right side have the same magnetization direction.

  As described above, by providing a ferromagnetic film having a uniform magnetization direction so as to coincide with the extending direction of the metal wiring around the metal wiring mainly composed of copper, which is a non-magnetic material, on the side wall of the metal wiring. An increase in resistance due to scattering of conduction electrons can be suppressed. Therefore, it is possible to suppress a reduction in the operation speed of the semiconductor device that occurs with the narrowing of the metal wiring.

  In this embodiment, copper wiring is used as the metal wiring, but the material of the metal wiring is not limited to copper, and other metal materials may be used.

  Hereinafter, the effect of the ferromagnetic film according to the present invention will be described with reference to FIG.

  The property of scattering of conduction electrons in the copper wiring can be expressed by equation (1) (for example, see Non-Patent Document 1).

Where ρ ₀ is the resistivity of the bulk metal wiring material, ρ is the resistivity of the metal wiring (arbitrary unit), w is the wiring width, λ is the mean free path of conduction electrons in the metal wiring (in the case of copper at room temperature) (λ = 40 nm). p is a rate at which conduction electrons are elastically scattered on the wiring sidewall, and takes a value between 0 and 1. When p = 1, all conduction electrons are elastically scattered, so the resistivity does not change even if the conduction electrons collide with the side wall of the metal wiring. That is, the resistivity does not depend on the wiring width. Strictly speaking, in the formula (1), the size of the crystal grain size and the aspect ratio of the wiring structure should be considered. In the present invention, however, the influence of the elastic scattering of conduction electrons on the wiring sidewall is treated. Therefore, the influence of the crystal grain size and aspect ratio is omitted.

  FIG. 4 shows the relationship between the resistivity, elastic scattering rate, and applied magnetic flux intensity of the metal wiring represented by the formula (1), and the wiring width w = 20, 30, 50, 100, and 200 nm in the copper wiring. If you are comparing. Specifically, since the change in the elastic scattering rate depends on the magnetization intensity of the ferromagnetic film, the magnetic flux density applied when magnetizing the magnetic film material is shown as the minor axis of the horizontal axis in FIG. The wiring width dependence of the change in resistivity of the metal wiring when the density is changed to 0.1T is shown. The wiring thickness at this time is made equal to the wiring width.

  As shown in FIG. 4, for example, when the wiring width w = 30 nm (marked by ■), the resistivity ρ of the metal wiring is changed when the elastic scattering rate p is changed from 0.1 to 1.0 (change of 0.9). Changes from about 2.64 to about 1.2 (change 1.44). That is, when p changes by 1 (1.0 change), the change rate of ρ is 1.6. Therefore, by increasing the applied magnetic flux density by 10% (in other words, by increasing the applied magnetic flux density by 0.01 T in order to improve the elastic scattering rate p by 10%), the resistivity ρ (the resistivity due to wiring wall scattering) Can be reduced by 16%.

  Further, in the case of the wiring width w = 50 nm (Δ mark), when p changes by 0.9, the resistivity ρ changes by 0.864. That is, when p changes by 1, the rate of change of ρ is 0.96. Therefore, the resistivity ρ can be reduced by about 10% by increasing the applied magnetic flux intensity by 10%.

  Further, when the wiring width w = 20 nm (marked by ◆), the resistivity ρ changes 2.16 when p changes by 0.9. That is, when p changes by 1, the rate of change of ρ is 2.4. Therefore, the resistivity ρ can be reduced by about 25% by increasing the applied magnetic flux intensity by 10%.

  Thus, according to the present invention, the resistivity of the metal wiring can be effectively reduced by applying a magnetic field as the wiring width is narrower.

  Here, the resistivity and wiring width dependence of the conventional metal wiring compared with the present invention will be described with reference to FIG. As shown in FIG. 5, the resistivity of the copper wiring with a wiring width of 30 nm is approximately 4 μΩ · cm, of which the bulk resistivity is 2 μΩ · cm, the resistivity due to wiring side wall scattering is 1 μΩ · cm, and the resistance due to grain boundary scattering The rate is about 1 μΩ · cm. On the other hand, according to the present invention, as described above, the resistivity due to the wiring side wall scattering in the copper wiring having a line width of 30 nm can be reduced by 16%, so that the resistivity due to the wiring side wall scattering is reduced to 0.84 μΩ · cm. It can be suppressed to cm. Therefore, the resistivity of the copper wiring having a line width of 30 nm can be suppressed from 4 μΩ · cm to 3.84 μΩ · cm.

  In this embodiment, a barrier film (for example, a tantalum film or a tantalum nitride film) that prevents copper as a wiring material from diffusing into the surrounding insulating film may be further provided.

  Further, according to the present invention, when the wiring width is locally narrowed, that is, when the miniaturization of the wiring pattern progresses, the edge roughness of the pattern (pattern edge unevenness) becomes a size that cannot be ignored with respect to the wiring width. Also effective. For example, this is a case where a portion having a line width of 30 nm is locally formed with respect to the standard value of the wiring width of 50 nm. The cause of edge roughness is the reflection of light from the vicinity of the edge of the pattern edge when forming a wiring pattern using the lithography process and the etching process, local variation in light intensity due to scattering, variation in chemical reaction in the development process, etc. It is considered.

  The present invention is useful for suppressing an increase in resistivity of a metal wiring having a narrow wiring width and improving an operation speed.

It is principal part sectional drawing of the semiconductor device which concerns on one Embodiment of this invention. It is a figure explaining the effect | action of the ferromagnetic film of the metal wiring in the semiconductor device which concerns on one Embodiment of this invention. It is process sectional drawing of the manufacturing method of the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the relationship between the resistivity of a metal wiring, the elastic scattering rate, and the applied magnetic flux intensity in the semiconductor device which concerns on one Embodiment of this invention. It is a figure which shows the wiring width dependence of the resistivity of the conventional metal wiring.

Explanation of symbols

DESCRIPTION OF SYMBOLS 100 Semiconductor device 101 Semiconductor substrate 102 Silicon oxide film 103 Wiring trench 104A 1st ferromagnetic film 104B 2nd ferromagnetic film 105 Copper wiring 200 Ferromagnetic film 201 Conduction electron

Claims (8)

A semiconductor device having a metal wiring formed in an insulating film,
A ferromagnetic film having a magnetization direction in one direction in which the metal wiring extends in at least one of a first opposing surface composed of an upper surface and a lower surface and a second opposing surface composed of a left surface and a right surface in the metal wiring. A semiconductor device is provided.   2. The semiconductor device according to claim 1, wherein the ferromagnetic film having the same magnetization direction is provided on the first facing surface and the second facing surface.   3. The semiconductor device according to claim 1, wherein the metal wiring contains copper as a main component.   The ferromagnetic film is made of B, Ce, Co, Cr, Fe, La, Mn, Nd, Ni, Sm, or Sr, or an alloy, oxide, or nitride thereof. 2. The semiconductor device according to 2. Forming a wiring trench in the insulating film;
Forming a metal wiring having a ferromagnetic film on at least one of a first opposing surface consisting of an upper surface and a lower surface and a second opposing surface consisting of a left side surface and a right side surface in the wiring groove;
And a step of applying a magnetic field to the ferromagnetic film so that the magnetization direction coincides with the extending direction of the metal wiring.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the ferromagnetic film is formed using a sputtering method or a plating method.   6. The method of manufacturing a semiconductor device according to claim 5, wherein the metal wiring contains copper as a main component. 6. The ferromagnetic film is made of B, Ce, Co, Cr, Fe, La, Mn, Nd, Ni, Sm, or Sr, or an alloy, oxide, or nitride thereof. Semiconductor device manufacturing method.

Images