JP2006166667A - Switching regulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching regulator for switching a synchronous rectification method and a diode rectification method, by using a single body of the switching regulator, while reverse currents will not be generated, even in a discontinuous mode and an efficiency at the small load can be improved by eliminating a switching loss at a small load. <P>SOLUTION: A first switching regulator method including a switching transistor M1 for turning on/off the input current flowing to inductor L1 and a synchronous rectification transistor M2, which is turned off during on-period of the switching transistor M1 and turned on during off-period, and a second switching regulator method including the switching transistor M1 used in common, and a commutation diode D1 for feeding a load with energy stored in the inductor L1 during the off-time of the switching transistor M1, are provided. By controlling the synchronous rectification transistor M2, the drive is carried out, by switching to the first switching regulator method or the second switching regulator method. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to a synchronous rectification switching regulator, and more particularly to a switching regulator capable of improving power conversion efficiency at light load.

  In recent years, energy saving has been demanded from the viewpoint of environmental measures. In a device using a battery such as a mobile phone or a digital camera, the importance of reducing the power consumed in the device is increasing from the viewpoint of extending the battery life. As a result, a switching regulator using an inductor L1 as shown in FIG. 4 is widely used as a power supply circuit that is highly efficient and can be miniaturized.

In the switching regulator using the inductor L1, the commutation diode D1 is used to release the energy stored in the inductor L1 while the switching transistor M1 is off. However, the on-state voltage of the commutation diode D1 is about 0.7V, which reduces the power conversion efficiency.
Therefore, as shown in FIG. 5, a synchronous rectification switching regulator using a synchronous rectification transistor M2 is used instead of the commutation diode D1. The synchronous rectification transistor M2 is controlled so as to be turned off when the switching transistor M1 is turned on and turned on when the switching transistor M1 is turned off.

  Since the voltage drop when the synchronous rectification transistor M2 is on is much smaller than that of the commutation diode D1, the efficiency of the synchronous rectification switching regulator is improved. However, although the switching regulator is highly efficient at the rated load, the switching loss, which is the power for turning on / off the switching transistor M1 and the synchronous rectification transistor M2, does not change depending on the weight of the load. Alternatively, in the case of a light load state such as a sleep mode, the efficiency is reduced. Furthermore, when the current flowing through the inductor L1 in the light load state is in the discontinuous mode, the charge of the capacitor C1 connected to the output terminal Vout flows backward through the synchronous rectification transistor M2, which significantly reduces the efficiency. .

  Note that the switching loss described above is a delay in rising, and a delay in rising causes a slight backflow current to flow, and a loss occurs in switching at the moment when the synchronous rectification transistor M2 is turned on or off. Deteriorate. In addition, the continuous mode is an operation mode in a range where the current IL flowing through the coil L1 flows on the + side compared to 0 with respect to a certain period of the clock signal as shown in FIG. The mode is an operation mode in a range in which a reverse flow (not shown) slightly toward the + side or the − side with respect to 0.

Many methods have been proposed in the past to improve the efficiency of synchronous rectification switching regulators at light loads.
FIG. 6 is an example disclosed in Japanese Patent Laid-Open No. 2002-281744, for example.
A current detection resistor R3 is connected between the inductor L1 and the output terminal Vout, and a comparison circuit CMP is provided for comparing the voltage across the current detection resistor R3 with the reference voltage Vref. The output of the comparison circuit CMP is connected to the control circuit 10 and the oscillation circuit OSC. Further, a commutation diode D1 is connected in parallel with the synchronous rectification transistor M2.

In FIG. 6, when the load current IR decreases and the voltage drop of the current detection resistor R3 falls below the reference voltage Vref, the output of the comparison circuit CMP is inverted and the control of the switching transistor M1 is switched from PWM to PFM. Is switched to reduce the switching loss of the switching transistor M1, and the synchronous rectification transistor M2 is turned off to completely eliminate the switching loss of the synchronous rectification transistor M2. Further, when the synchronous rectification transistor M2 is turned off, the reverse current from the capacitor C1 connected to the output terminal Vout is prevented when the inductor current IL is in the discontinuous mode.
In addition, after the output of the comparison circuit CMP is inverted and changed to the PFM control, the switching to the diode rectification method using the commutation diode D1 is performed.

  FIG. 7 shows an example disclosed in Japanese Patent Laid-Open No. 2000-92824. The two inputs of the comparison circuit CMP are connected to the ground potential and the intersection V1 of the synchronous rectification transistor M2 and the inductor L1, respectively. The output of the comparison circuit CMP is connected to one input of the AND circuit AND. The other input of the AND circuit is connected to the gate of the switching transistor M1 and further connected to the output of the control circuit 10. The output of the AND circuit AND is connected to the gate of the synchronous rectification transistor M2.

When the output of the control circuit 10 is at a low level, the switching transistor M1 is on and the other input of the AND circuit AND is at a low level, so that the output of the AND circuit AND is at a low level and the synchronous rectification transistor M2 is off.
When the output of the control circuit 10 becomes high level, the switching transistor M1 is turned off, and the voltage at the intersection V1 falls below the ground voltage Vss, so that the output of the comparison circuit CMP becomes high level. Since both of the two inputs of the AND circuit AND become high level, the output of the AND circuit AND becomes high level, and the synchronous rectification transistor M2 is turned on.

When the load of the switching regulator is reduced and the inductor current IL is reduced to be in the discontinuous mode, even when the output of the control circuit 10 is at a high level, the capacitor C1 connected to the output terminal Vout is reversed to the inductor L1. A current flows and the voltage at the intersection V1 rises above Vss.
As a result, since the output of the comparison circuit CMP is inverted and outputs a low level, the output of the AND circuit AND becomes a low level, and the synchronous rectification transistor M2 is turned off. Therefore, backflow from the capacitor C1 can be prevented, and a reduction in efficiency can be prevented.
This method detects the case where the voltage at the intersection V1 rises above the ground voltage Vss and turns off the synchronous rectification transistor M2, so that no commutation diode is required.

  In addition, for example, in the method disclosed in Japanese Patent Application Laid-Open No. 2004-32875, the control mode of the switching regulator is set to PWM using a rectification method switching signal output from a load circuit connected to the output terminal of the switching regulator. In addition to switching from PFM to PFM, a method of switching to the diode rectification method by turning off the synchronous rectification transistor as the rectification method is disclosed.

JP 2002-281744 A JP 2000-92824 A JP 2004-32875 A

  However, in the method disclosed in Japanese Patent Laid-Open No. 2002-281744, since the current detection resistor R3 is connected in series to the inductor L1 in order to detect the load current IR, there is a loss due to the power consumed by the current detection resistor R3. appear. This loss is a slight loss when the load current IR is small, but increases as the load current IR increases.

  In the method disclosed in Japanese Patent Laid-Open No. 2000-92824, the synchronous rectification transistor M2 is turned off after the discontinuous mode is entered and the inductor current IL starts to flow backward. For this reason, the switching loss is not improved because the synchronous rectification transistor M2 is switched even when the load is light.

It is desirable to switch the rectifying element from the synchronous rectifying transistor M2 to the commutating diode D1 at the load current IR where the switching loss of the synchronous rectifying transistor M2 and the power loss due to the voltage drop of the commutating diode D1 coincide. Efficiency is good.
Note that the method disclosed in Japanese Patent Application Laid-Open No. 2004-32875 has a problem that the load circuit cannot be used unless it has a rectification switching signal generation function.

(the purpose)
The object of the present invention has been made in consideration of the above-mentioned circumstances, and can be switched between a synchronous rectification method and a diode rectification method with a single switching regulator, and no backflow occurs even in a discontinuous mode. An object of the present invention is to provide a switching regulator that can eliminate the switching loss at the load and improve the efficiency at a light load.

  In order to solve the above problems, a switching regulator of the present invention includes a switching transistor that turns on and off an input current flowing through an inductor, and a synchronous rectification transistor that is turned off during an on period of the switching transistor and is turned on during an off period. A first switch regulator system having the switching transistor, and a second switch regulator system having a commutation diode for supplying the energy stored in the inductor to the load during the OFF period of the switching transistor. , And controlling the synchronous rectification transistor to switch to either the first switch regulator system or the second switch regulator system.

  More specifically, in a switching regulator that converts an input DC voltage applied between an input terminal and a ground terminal into a predetermined voltage and outputs the voltage to a load from an output terminal, an inductor and an input current flowing through the inductor are turned on / off. A switching transistor to be turned off, a commutation diode for supplying energy stored in the inductor to a load in an off period of the switching transistor, and a parallel connection to the commutation diode, and an on period of the switching transistor A synchronous rectification transistor that is turned off and turned on during an off period; output voltage detection means that outputs a voltage proportional to the voltage of the output terminal; a first reference voltage; an output voltage from the output voltage detection means; An error amplifying circuit for amplifying a difference between the first reference voltages and outputting an error voltage; and a second reference A comparison circuit that compares the voltage, the error voltage, and the second reference voltage, and a control that performs on / off control of the switching transistor and the synchronous rectification transistor according to the error voltage and the output of the comparison circuit It is characterized by comprising a circuit.

  In the present invention, when the load current supplied to the load falls below a predetermined current value, the second reference voltage is set so that the output of the comparison circuit is inverted, and the output of the comparison circuit is inverted. In this case, since the control circuit turns off the synchronous rectification transistor, the load current can be detected without providing a load current detection resistor. Switching to the rectification method can prevent backflow current from the output terminal, and by adjusting the second reference voltage, the load current to switch from the synchronous rectification method to the diode rectification method can be adjusted, so the most efficient switching point Can now be selected.

  Further, since slope compensation is performed on the output of the current detection means for detecting the current flowing in the inductor, it can be implemented even in a switching regulator having current mode control.

  According to the present invention, since the load current is detected from the state of the error voltage, it is possible to switch between the synchronous rectification method and the diode rectification method with a single switching regulator without loss due to the load current detection.

  In addition, by adjusting the second reference voltage, the load current value for switching between the synchronous rectification method and the diode rectification method can be arbitrarily set, so that the synchronous rectification method and the diode rectification method can be set at the most efficient load current value. Switching was possible.

  Furthermore, since slope compensation is provided in the inductor current detection circuit, it can be applied to a current mode control switching regulator.

Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.
(First embodiment)
FIG. 1 is a circuit block diagram of a switching regulator showing a first embodiment of the present invention.
This circuit is an example of a step-down switching regulator.
M1 is a switching transistor, M2 is a synchronous rectification transistor, D1 is a commutation diode, L1 is an inductor, C1 is an output capacitor, R1 and R2 are resistors for detecting an output voltage, 1 is an error amplifier circuit, and 2 is a first reference voltage 3 is a comparison circuit, 4 is a second reference voltage, 10 is a control circuit, and 20 is a load.

The switching transistor M1 is composed of a PMOS transistor, and is turned on when the gate voltage is low and turned off when it is high. The synchronous rectification transistor M2 is composed of an NMOS transistor, and is turned on when the gate voltage is high and turned off when the gate voltage is low.
The control circuit 10 performs on / off control of the switching transistor M1 and the synchronous rectification transistor M2. The synchronous rectification transistor M2 is turned off when the switching transistor M1 is on, and the synchronous rectification transistor M2 is turned on when the switching transistor M1 is off.

The switching transistor M1 and the synchronous rectification transistor M2 are connected in series, and are connected between the input terminal Vin and the ground terminal Vss. An inductor L1 is connected between the intersection LX of the switching transistor M1 and the synchronous rectification transistor M2 and the output terminal Vout. A commutation diode D1 is connected in parallel with the synchronous rectification transistor M2. An output capacitor C1 is connected between the output terminal Vout and the ground terminal Vss.
Further, a series circuit of output voltage detection resistors R1 and R2 is connected between the output terminal Vout and the ground terminal Vss.

The intersection of the output detection resistors R1 and R2 is connected to the inverting input of the error amplifier circuit 1, and the first reference voltage 2 is connected to the non-inverting input. The output of the error amplification circuit 1 is connected to the non-inverting input of the comparison circuit 3 and the control circuit 10.
The second reference voltage 4 is connected to the inverting input of the comparison circuit 3, and the output is connected to the control circuit 10.

The error amplifier circuit 1 outputs an error voltage A corresponding to the difference between the voltage at the intersection of the output voltage detection resistors R1 and R2 and the first reference voltage 2. The error voltage A is a voltage that rises and falls according to the load current. In this embodiment, the error voltage A becomes lower as the load current decreases.
The control circuit 10 generates a driving pulse for the switching transistor M1 according to the error voltage A, and controls the output voltage to a predetermined voltage.

The comparison circuit 3 compares the error voltage A with the second reference voltage 4, and when the error voltage A falls below the second reference voltage 4, it is inverted and becomes a low level.
When the output of the comparison circuit 3 becomes low level, the control circuit 10 sets the gate voltage of the synchronous rectification transistor M2 to low level, turns off the synchronous rectification transistor M2, and switches from the synchronous rectification method to the diode rectification method by the commutation diode D1. .

  As described above, the comparison circuit 3 detects that the error voltage A proportional to the load current has decreased to the second reference voltage 4 or less, and as a result, the synchronous rectification method is switched to the diode rectification method. As in the conventional example, power loss due to the current detection resistor R3 does not occur, and the value of the load current for switching between the synchronous rectification method and the diode rectification method can be arbitrarily set by changing the voltage of the second reference voltage 4 It became possible to set.

(Second embodiment)
FIG. 2 is a configuration diagram of a switching regulator showing a second embodiment of the present invention, and shows an example in which the present invention is applied to a switching regulator for current mode control.
The switching regulator for current mode control is a control method provided with a feedback loop for detecting the current IL flowing through the inductor L1 and controlling the switching transistor M1 with the current value IL in addition to the normal output voltage feedback control. . Thereby, the stability of the whole switching transistor can be increased.

1 differs from the circuit of FIG. 1 in that the current detection resistor R3 is inserted between the input terminal Vin and the switching transistor M1, and the configuration of the control circuit 10 is different. Do.
The control circuit 10 includes a PWM comparator 11, a slope compensation circuit 12, an inverter 13, an RS flip-flop circuit 14, an oscillation circuit 15, and an AND circuit 16.

The slope compensation circuit 12 detects a voltage drop of the current detection resistor R3, and further outputs a slope signal B subjected to slope compensation for preventing harmonic oscillation. As shown by the slope signal (point B) in FIG. 3, the slope of the slope signal is constant because it is uniquely determined by the coil, output voltage, and input voltage. With this inclination, the output of the error amplifier circuit 1 decreases or increases. In this control, harmonic oscillation occurs when the peak voltage of the coil fluctuates due to noise. Since the point located at the peak voltage is the point that determines the duty, if the inclination is small, harmonic oscillation occurs due to the full shift of the duty width, so by applying a steeper movement than the inclination of the output voltage of the coil Prevents oscillation.
The PWM comparator 11 receives the error voltage A and the slope signal B, and resets the RS flip-flop circuit 14 when the slope signal B exceeds the error voltage A.

The oscillation circuit 15 outputs a clock signal and sets the RS flip-flop circuit 14 at a predetermined cycle.
The output QB of the RS flip-flop circuit 16 is connected to the gate of the switching transistor M 1 and one input of the AND circuit 16.
The output of the comparison circuit 3 is connected to the other input of the AND circuit 16.

Next, the operation of the circuit of FIG. 2 will be described with reference to the timing chart of FIG.
A clock signal is output from the oscillation circuit 15. The RS flip-flop circuit 14 is set at the rising edge of the clock signal, and sets the output terminal QB to the low level. Since this signal is also the gate voltage of the switching transistor M1, the switching transistor M1 is turned on. Since this signal is also connected to one input of the AND circuit 16, the output of the AND circuit 16 is set to a low level. Since the output of the AND circuit 16 is the gate voltage of the synchronous rectification transistor M2, the synchronous rectification transistor M2 is turned off.
When the switching transistor M1 is turned on, a current IL flows from the input voltage to the inductor L1. This current IL gradually increases with time.

  Since the inductor current IL gradually increases, the slope signal B of the slope compensation circuit 12 also increases with time. When the error voltage A is exceeded, the output of the PWM comparator 11 is inverted and outputs a low level. This signal is inverted by the inverter 13 to reset the RS flip-flop circuit. As a result, the output terminal QB is inverted to a high level, so that the switching transistor M1 is turned off. In the continuous mode where the inductor current IL is always larger than 0, the error voltage A is higher than the second reference voltage 4, and therefore the output of the comparison circuit 3 is at a high level. For this reason, the output of the AND circuit 16 also goes high, turning on the synchronous rectification transistor M2.

  When the synchronous rectification transistor M2 is turned on, the inductor current IL continuously flows through the inductor L1 via the synchronous rectification transistor M1. This current gradually decreases with time. In the continuous mode, since the next clock signal is applied from the oscillation circuit 15 to the set input S of the RS flip-flop circuit 14 before the inductor current IL becomes 0, the switching transistor M1 is turned on again, and the current flows in the inductor L1. Therefore, the inductor current IL does not become zero.

  When the load is light, the error voltage A decreases and becomes the second reference voltage 4 or less. As a result, the output of the comparison circuit 3 becomes low level, and the output of the AND circuit 16 becomes low level regardless of the level of the output QB of the RS flip-flop circuit 14, so that the synchronous rectification transistor M2 is turned off. Therefore, the inductor current IL after the switching transistor M1 is turned off flows through the commutation diode D1. Even when the inductor current IL becomes 0, the synchronous rectification transistor M2 is off, so that the charge of the output capacitor C1 does not flow backward.

As described above, the control method of the present invention can also be implemented in a current mode control switching regulator.
Note that when applied to a current mode control switching regulator, the slope compensation voltage is superimposed on the error voltage A by performing the slope compensation for preventing harmonic oscillation by the current detection circuit of the inductor L1 as described above. Can be prevented. That is, in the conventional circuit, either the diode or the synchronous rectification transistor M2 is connected, so that even if the switching transistor M1 is turned off, the coil current flows in the same direction via the synchronous rectification transistor M2. As a result, the coil current increases, and the slope compensation voltage may be superimposed on the error voltage A. In this embodiment, when the load becomes light, the current is released by using the commutation diode D1 without using the synchronous rectification transistor M2. Thereby, it is not superimposed.

(Third embodiment)
FIG. 8 is a configuration diagram of a switching regulator showing a third embodiment of the present invention, which is an example in which the present invention is applied to a step-up type switching regulator.
Hereinafter, only the parts different from the step-down type shown in FIG. 1 will be described.
The inductor L1 and the switching transistor M1 are connected in series between the input terminal Vin and the ground terminal Vss. The synchronous rectification transistor M2 is connected between the intersection LX of the inductor L1 and the switching transistor M1 and the output terminal Vout. The commutation diode D1 is connected in parallel to the synchronous rectification transistor M2.

The switching transistor M1 is an NMOS transistor, and the synchronous rectification transistor M2 is a PMOS transistor.
The switching transistor M1 and the synchronous rectification transistor M2 are exclusively on / off controlled by the control circuit 10.

  As shown in FIG. 3, when the load current decreases and the error voltage A drops below the second reference voltage (Vref2), the comparison circuit 3 is inverted and the synchronous rectification transistor M2 is turned off via the control circuit 10. . As a result, the rectification method is switched from the synchronous rectification method to the diode rectification method using the commutation diode D1. Further, since the synchronous rectification transistor M2 is turned off, the backflow current from the output capacitor C1 can be prevented even in the discontinuous mode.

1 is a circuit block diagram of a step-down switching regulator showing a first embodiment of the present invention. It is a circuit block diagram of the switching regulator of current mode control which shows the 2nd Example of this invention. 3 is a timing chart of the switching regulator shown in FIG. It is a circuit diagram of the switching regulator of a prior art example. It is a circuit diagram of the synchronous rectification system switching regulator of a prior art example. It is a circuit diagram of the synchronous rectification system switching regulator of a prior art example. It is a circuit diagram of the synchronous rectification system switching regulator of a prior art example. It is a circuit block diagram of a step-up switching regulator showing a third embodiment of the present invention.

Explanation of symbols

1 error amplifier circuit, 2 first reference voltage, 3 comparison circuit, 4 second reference voltage,
10 control circuit 11 PWM comparator, 12 slope compensation circuit,
13 Inverter 14 RS flip-flop, 15 Oscillator circuit,
16 AND circuit, 20 load M1 switching transistor, M2 synchronous rectification transistor D1, commutation diode, L1 inductor, C1 output capacitor,
R1-R3 resistance

Claims (6)

A first rectification operation including a switching transistor that turns on and off an input current flowing through the inductor, and a synchronous rectification transistor that is turned off during the on period of the switching transistor and is turned on during the off period;
A second rectifying operation having a commutation diode for supplying energy stored in the inductor to a load during an off period of the switching transistor;
A switching regulator characterized by sharing the switching transistor and switching the first rectification operation and the second rectification operation by an executable control means. In the switching regulator that converts the input DC voltage applied between the input terminal and the ground terminal into a predetermined voltage and outputs it to the load from the output terminal.
An inductor for storing energy;
A switching transistor for turning on and off the input current flowing through the inductor;
A commutation diode for supplying energy stored in the inductor to a load during an off period of the switching transistor;
A synchronous rectification transistor connected in parallel to the commutation diode, turned off during the on period of the switching transistor, and turned on during the off period;
Output voltage detection means for outputting a voltage proportional to the voltage of the output terminal;
A first reference voltage providing a predetermined voltage;
An error amplifying circuit for amplifying a difference between an output voltage from the output voltage detecting means and the first reference voltage and outputting an error voltage;
A second reference voltage that provides a voltage different from the first reference voltage;
A comparison circuit for comparing the error voltage with the second reference voltage;
A control circuit that performs on / off control of the switching transistor and the synchronous rectification transistor according to the error voltage and the output of the comparison circuit,
A switching regulator comprising the diode rectification method for driving the switching transistor and the commutation diode and the synchronous rectification method for driving the switching transistor and the synchronous rectification transistor by the comparison circuit and the control circuit. . The switching regulator according to claim 2, wherein
The switching regulator, wherein the second reference voltage is set so that an output of the comparison circuit is inverted when a load current supplied to the load becomes a predetermined current value or less. The switching regulator according to claim 1 or 2,
Comprising current detection means for detecting a current flowing through the inductor;
A switching regulator comprising a current mode control for performing on / off control of the switching transistor in accordance with an output of the current detection means. The switching regulator according to claim 4, wherein
A switching regulator characterized in that slope compensation is performed on the output of the current detection means. In the switching regulator in any one of Claims 1-5,
The inductor and the switching transistor are connected in series between an input terminal and a connection terminal, the synchronous rectification transistor is connected between an intersection of the inductor and the switching transistor and an output terminal, and the commutation diode is parallel to the synchronous rectification transistor. A step-up switching regulator characterized by being connected to

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