JP2006140270A - Mounting method of electronic device, circuit board, and electronic equipment - Google Patents

Mounting method of electronic device, circuit board, and electronic equipment Download PDF

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Publication number
JP2006140270A
JP2006140270A JP2004327712A JP2004327712A JP2006140270A JP 2006140270 A JP2006140270 A JP 2006140270A JP 2004327712 A JP2004327712 A JP 2004327712A JP 2004327712 A JP2004327712 A JP 2004327712A JP 2006140270 A JP2006140270 A JP 2006140270A
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Prior art keywords
electronic device
substrate
conductor post
connection
circuit board
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JP2004327712A
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Japanese (ja)
Inventor
Yoshitomo Hagio
義知 萩尾
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Seiko Epson Corp
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Seiko Epson Corp
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Priority to JP2004327712A priority Critical patent/JP2006140270A/en
Publication of JP2006140270A publication Critical patent/JP2006140270A/en
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    • H01L24/96—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being encapsulated in a common layer, e.g. neo-wafer or pseudo-wafer, said common layer being separable into individual assemblies after connecting
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting method capable of connecting, with high connection reliability, a connection wiring for connection to other conductive member to the connection terminal of an electronic device when mounting it on a board. <P>SOLUTION: The mounting method includes a process (a) in which a chip component 10 is placed on a circuit board 20 while an active surface (terminal forming surface) 12 where a connection terminal 14 is formed faces the side opposite to the circuit board 20, a conductor post forming process (b) in which a conductor post 38 is provided upright using a liquid phase method on the connection terminal 14 of the chip component 10 arranged on the circuit board 20, and a connection wiring forming process (d) in which a connection wiring 34 connected to the conductor post is formed on the circuit board 20 by the liquid phase method. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電子デバイスの実装方法、回路基板、及び電子機器に関するものである。   The present invention relates to an electronic device mounting method, a circuit board, and an electronic apparatus.

近年、電子機器の薄型化、軽量化の傾向が顕著であり、カードサイズの電子機器はその代表的なものである。そしてそれに伴い、電子機器に実装される各種電子デバイスも基板上に薄く実装することが求められている。シリコン半導体ＩＣを例に採れば、ウエハの状態で裏面を削り、厚さ５０μｍ以下のＩＣチップ（電子デバイス）を形成することが可能である。しかしその一方で、このように薄層化した電子デバイスは実装時に損傷しやすくなるため、基板への実装が困難なものとなる。   In recent years, there has been a tendency for electronic devices to be thinner and lighter, and card-sized electronic devices are typical. Accordingly, various electronic devices mounted on electronic devices are also required to be thinly mounted on a substrate. Taking a silicon semiconductor IC as an example, it is possible to form an IC chip (electronic device) having a thickness of 50 μm or less by scraping the back surface in the state of a wafer. However, on the other hand, the electronic device thinned in this way is easily damaged during mounting, which makes it difficult to mount it on a substrate.

そこで最近では、このような電子デバイスの実装に際して、その接続配線の形成に液相法を用いることが提案されている（特許文献１参照）。このような配線形成方法によれば、電子デバイスに接続する配線を形成する際に圧力や超音波振動を印加する必要が無く、またワイヤを引き回す空間も不要であるため、高信頼性かつ薄型の回路基板を製造することが可能である。
特開２００４−２８１５３９号公報 Therefore, recently, it has been proposed to use a liquid phase method for forming the connection wiring when mounting such an electronic device (see Patent Document 1). According to such a wiring formation method, there is no need to apply pressure or ultrasonic vibration when forming a wiring to be connected to an electronic device, and a space for routing the wire is not required. It is possible to manufacture a circuit board.
JP 2004-281539 A

ところで、上記特許文献１に記載の液相法を用いた配線形成においては、ＩＣチップと基板表面との段差を緩和するために、ＩＣチップの側面部に、ＩＣチップの端子形成面から基板表面に延びる斜面部を具備した絶縁部（スロープ材）を形成している。このスロープ材は、例えばディスペンサ等を用いて上記スロープ材の液体材料を所定位置に塗布し、乾燥固化させることで形成することができる。しかしながら、上記スロープ材はＩＣチップの側面部においてＩＣチップ相当の高さに形成する必要があるため、その液体材料の粘度はあまり低くすることができず、上記ディスペンサ等によって液体材料を配置する際の制御性が低くなり、位置精度が低くなるという問題がある。そのため、スロープ材を形成する際にＩＣチップの端子形成面に液体材料が塗布されるとＩＣチップの接続端子が絶縁材料に覆われてしまうという問題が生じ、前記液体材料がＩＣチップの外側に偏るとスロープ材の高さが不足したり、基板上の配線パターンが過度に覆われて接続配線の形成が困難になるという問題が生じる。   By the way, in the wiring formation using the liquid phase method described in Patent Document 1, in order to alleviate the step between the IC chip and the substrate surface, the side surface of the IC chip is changed from the terminal formation surface of the IC chip to the substrate surface. The insulating part (slope material) which comprises the slope part extended in is formed. The slope material can be formed by applying the liquid material of the slope material to a predetermined position using, for example, a dispenser and drying and solidifying the material. However, since the slope material needs to be formed at a height equivalent to the IC chip on the side surface portion of the IC chip, the viscosity of the liquid material cannot be made very low. There is a problem that the controllability is reduced and the positional accuracy is lowered. Therefore, when a liquid material is applied to the terminal formation surface of the IC chip when forming the slope material, there arises a problem that the connection terminal of the IC chip is covered with an insulating material, and the liquid material is placed outside the IC chip. If it is biased, there arises a problem that the height of the slope material is insufficient, or the wiring pattern on the substrate is excessively covered and it becomes difficult to form the connection wiring.

本発明は、上記事情に鑑み成されたものであって、基板上に電子デバイスを実装するに際して、前記電子デバイスの接続端子に対し他の導電部材と接続するための接続配線を高い接続信頼性をもって接続することができる実装方法を提供することを目的としている。   The present invention has been made in view of the above circumstances, and when mounting an electronic device on a substrate, a connection wiring for connecting to another conductive member with respect to the connection terminal of the electronic device has high connection reliability. It aims at providing the mounting method which can be connected with.

本発明は、上記課題を解決するために、接続端子を具備した電子デバイスを基板上に実装する方法であって、前記接続端子が形成された端子形成面を前記基板と反対側に向けて前記電子デバイスを前記基板上に配置する工程と、前記基板上に配置した前記電子デバイスの接続端子上に、液相法を用いて導体ポストを立設する導体ポスト形成工程と、前記基板上に、前記導体ポストに対して接続される接続配線を液相法を用いて形成する接続配線形成工程とを含むことを特徴とする電子デバイスの実装方法を提供する。
この実装方法によれば、前記接続配線形成工程に先立って、前記電子デバイスの接続端子上に導体ポストを立設するので、前記接続端子上に絶縁材料等が付着した場合にも、導体ポストの先端側の部分を露出させておくことができ、係る先端側の部分に対して接続配線を接続することで前記接続端子と接続配線との電気的接続を行うことができる。したがって本実装方法によれば、高い接続信頼性をもって電子デバイスを実装することができる。 In order to solve the above problems, the present invention is a method of mounting an electronic device having a connection terminal on a substrate, wherein the terminal formation surface on which the connection terminal is formed faces the opposite side of the substrate. A step of disposing an electronic device on the substrate; a step of forming a conductor post on a connection terminal of the electronic device disposed on the substrate using a liquid phase method; and on the substrate. There is provided a method for mounting an electronic device, comprising: a connection wiring forming step of forming a connection wiring connected to the conductor post using a liquid phase method.
According to this mounting method, since the conductor post is erected on the connection terminal of the electronic device prior to the connection wiring forming step, even when an insulating material or the like adheres to the connection terminal, the conductor post The front end portion can be exposed, and the connection terminal and the connection wiring can be electrically connected by connecting the connection wiring to the front end portion. Therefore, according to this mounting method, an electronic device can be mounted with high connection reliability.

本発明の電子デバイスの実装方法では、前記導体ポスト形成工程が、前記接続端子に対して前記導体ポストを形成するための液体材料を吐出ヘッドにより吐出配置する液体材料配置工程と、前記接続端子上に配された液体材料を乾燥処理する乾燥工程と、を含み、前記液体材料配置工程と前記乾燥工程とを繰り返すことで、所定突出高さの前記導体ポストを形成する工程であることが好ましい。この実装方法によれば、前記導体ポスト形成工程において、前記接続端子上に所定量の液体材料を配置した後、一度乾燥させ、その後再度液体材料の配置を行うので、接続端子上で液体材料が濡れ広がるのを防止しつつ、接続端子上に導体ポストを積み上げることができる。これにより、接続端子上に正確に相当高さの導体ポストを形成することができる。   In the electronic device mounting method of the present invention, the conductor post forming step includes a liquid material disposing step of discharging and disposing a liquid material for forming the conductor post with respect to the connecting terminal by an ejecting head; It is preferable that it is a step of forming the conductor post having a predetermined protruding height by repeating the liquid material disposing step and the drying step. According to this mounting method, in the conductor post forming step, after a predetermined amount of liquid material is disposed on the connection terminal, the liquid material is dried once and then disposed again. The conductor posts can be stacked on the connection terminals while preventing the spread. As a result, the conductor post having a considerably high height can be accurately formed on the connection terminal.

本発明の電子デバイスの実装方法では、前記基板上に配置された電子デバイスの側面部に、前記端子形成面と前記基板の実装面との段差を緩和するスロープ材を形成するスロープ材形成工程と、前記導体ポスト及び／又は前記接続端子から、前記スロープ材の表面を経て前記基板表面に至る接続配線を液相法を用いて形成する接続配線形成工程と、を含むこともできる。
前記端子形成面を基板と反対側に向けて電子デバイスを基板上に載置し、係る電子デバイスの接続端子に対して接続配線を接続する場合、電子デバイスの端子形成面と基板表面との間に電子デバイス自体の厚さに相当する段差が存在するため、係る段差を緩和するべく前記スロープ材を形成することで、前記段差に起因する接続配線の断線等を良好に防止することができる。そして、本発明では、前記接続端子上に導体ポストが立設されているので、上記スロープ材の一部が電子デバイスの接続端子上に形成されてしまっても、前記導体ポストの先端側の部分をスロープ材の上側に露出させておくことができ、係る露出部分に対して前記接続配線を接続できるので、スロープ材の形成位置が多少ずれたとしても、電子デバイスに対して確実に接続配線を接続することができる。 In the electronic device mounting method of the present invention, a slope material forming step of forming a slope material that relaxes a step between the terminal formation surface and the mounting surface of the substrate on a side surface portion of the electronic device disposed on the substrate; A connection wiring forming step of forming a connection wiring from the conductor post and / or the connection terminal through the surface of the slope material to the substrate surface using a liquid phase method.
When the electronic device is placed on the substrate with the terminal formation surface facing away from the substrate and the connection wiring is connected to the connection terminal of the electronic device, between the terminal formation surface of the electronic device and the substrate surface Since there is a step corresponding to the thickness of the electronic device itself, it is possible to satisfactorily prevent disconnection of the connection wiring due to the step by forming the slope material so as to alleviate the step. And in this invention, since the conductor post is standingly arranged on the said connection terminal, even if a part of said slope material is formed on the connection terminal of an electronic device, the part at the front end side of the said conductor post Can be exposed to the upper side of the slope material, and the connection wiring can be connected to the exposed portion, so even if the slope material formation position is slightly shifted, the connection wiring can be securely connected to the electronic device. Can be connected.

本発明の電子デバイスの実装方法では、前記基板として、配線パターンを有する基板を用い、前記接続配線を介して前記導体ポストと前記配線パターンとを電気的に接続することもできる。すなわち、前記導体ポストを介して電子デバイスの接続端子に接続された接続配線の一端を、基板上の配線パターンに対して接続することもできる。   In the electronic device mounting method of the present invention, a substrate having a wiring pattern can be used as the substrate, and the conductor post and the wiring pattern can be electrically connected via the connection wiring. That is, one end of the connection wiring connected to the connection terminal of the electronic device via the conductor post can be connected to the wiring pattern on the substrate.

本発明の電子デバイスの実装方法では、前記基板として、前記配線パターンに導電接続されたパッドを有する基板を用い、前記導体ポスト形成工程において、前記基板のパッド上にも前記導体ポストを立設することができる。前記基板が、その表面に電気的接続のためのパッドを有する構成である場合、係るパッドが前記スロープ材を形成するための材料によって覆われてしまうと接続配線の接続ができなくなり、電子デバイスを実装できなくなる。そこで本実装方法のように、基板上に設けられたパッド上にも導体ポストを立設しておけば、前記スロープ材を形成するための材料がパッド上に塗布されても、導体ポストの先端側の部分を露出させておくことができるので、この露出部分に対して接続配線を接続することができる。   In the electronic device mounting method of the present invention, a substrate having a pad conductively connected to the wiring pattern is used as the substrate, and the conductor post is also erected on the pad of the substrate in the conductor post forming step. be able to. If the substrate has a pad for electrical connection on its surface, if the pad is covered with the material for forming the slope material, connection wiring cannot be connected, and the electronic device is Can not be implemented. Therefore, as in this mounting method, if the conductor post is also erected on the pad provided on the substrate, the tip of the conductor post can be applied even if the material for forming the slope material is applied on the pad. Since the side portion can be exposed, the connection wiring can be connected to the exposed portion.

本発明の電子デバイスの実装方法では、前記基板上に電子デバイスを配置するに際して、ダミー基板に対して前記端子形成面を対向させた状態で前記電子デバイスを載置する工程と、前記電子デバイスを覆う樹脂材料を前記ダミー基板上に配して封止体を形成する工程と、前記ダミー基板を除去して前記封止体表面に前記電子デバイスの端子形成面を露出させる工程とを行うこともできる。すなわち、本発明は、電子デバイスを樹脂材料で封止した封止体からなる回路基板にも適用することができる。   In the electronic device mounting method of the present invention, when placing the electronic device on the substrate, placing the electronic device with the terminal formation surface facing the dummy substrate; and A step of forming a sealing body by disposing a resin material to be covered on the dummy substrate; and a step of removing the dummy substrate and exposing a terminal forming surface of the electronic device on the surface of the sealing body. it can. That is, the present invention can also be applied to a circuit board made of a sealing body in which an electronic device is sealed with a resin material.

本発明の電子デバイスの実装方法では、前記導体ポスト形成工程と接続配線形成工程との間に、前記導体ポストの一部を露出させた状態で前記電子デバイスの表面を含む基板表面に絶縁層を形成する工程を有していてもよい。この構成によれば、前記接続配線が形成されるべき封止体の表面を前記絶縁層によって平坦化することができ、また接続配線が形成される表面を絶縁層の表面のみとすることができるため、接続配線を形成するための液体材料を配置した際に、液体材料が過度に濡れ広がったり、弾かれたりするのを防止でき、正確な位置に正確な形状の接続配線を形成することができる。   In the electronic device mounting method of the present invention, an insulating layer is formed on the substrate surface including the surface of the electronic device with a part of the conductor post exposed between the conductor post forming step and the connection wiring forming step. You may have the process to form. According to this configuration, the surface of the sealing body on which the connection wiring is to be formed can be planarized by the insulating layer, and the surface on which the connection wiring is formed can be only the surface of the insulating layer. Therefore, when the liquid material for forming the connection wiring is arranged, it is possible to prevent the liquid material from being excessively spread and repelled, and to form the connection wiring of the correct shape at the correct position. it can.

本発明の回路基板は、先に記載の本発明の実装方法を用いて得られたことを特徴とする。この構成によれば、高い信頼性をもって電子デバイスが実装された回路基板を得ることができる。   The circuit board of the present invention is obtained by using the mounting method of the present invention described above. According to this configuration, it is possible to obtain a circuit board on which an electronic device is mounted with high reliability.

本発明の回路基板は、接続端子を有する電子デバイスを基板上に実装してなる回路基板であって、前記電子デバイスの接続端子上に、液相法により形成された導体ポストが設けられ、該導体ポストに対して、液相法により形成された接続配線が接続されていることを特徴とする。
上記回路基板においては、前記導体ポストに接続された接続配線が、前記基板上に形成された配線パターンに接続されていてもよい。また前記基板上に、前記配線パターンに電気的に接続されたパッドが設けられており、当該パッド上に液相法を用いて形成された導体ポストが立設されており、前記パッド上の導体ポストに対して、前記接続配線が接続されている構成とすることもできる。 The circuit board of the present invention is a circuit board formed by mounting an electronic device having a connection terminal on a board, and a conductor post formed by a liquid phase method is provided on the connection terminal of the electronic device, A connection wiring formed by a liquid phase method is connected to the conductor post.
In the circuit board, the connection wiring connected to the conductor post may be connected to a wiring pattern formed on the board. Further, a pad electrically connected to the wiring pattern is provided on the substrate, and a conductor post formed using a liquid phase method is erected on the pad, and a conductor on the pad is provided. The connection wiring may be connected to the post.

本発明の電子機器は、先に記載の本発明の回路基板を備えたことを特徴とする。この構成によれば、薄型に電子デバイスが実装された回路基板を具備したことで、回路部の信頼性に優れ、かつ薄型化、小型化を実現した電子機器を得ることができる。   An electronic apparatus according to the present invention includes the circuit board according to the present invention described above. According to this configuration, by providing the circuit board on which the electronic device is thinly mounted, it is possible to obtain an electronic apparatus that is excellent in the reliability of the circuit unit and is thin and small.

（第１の実施形態）
以下、本発明の実施の形態について図面を参照して説明するが、本発明の技術範囲は以下の実施の形態に限定されるものではない。 (First embodiment)
Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to the following embodiments.

＜回路基板＞
図１（ａ）は、本発明に係る電子デバイスの実装方法を用いて製造できる電子デバイス実装体である回路基板の平面構成図であり、図１（ｂ）は、（ａ）に示すＡ−Ａ’線に沿う断面構成図である。図１に示す回路基板２０は、その一面側（（ｂ）図上面側）に、チップ部品（電子デバイス）１０をフェースアップボンディングし、チップ部品１０の接続端子と回路基板２０上の配線パターンとを電気的に接続した構成を備えている。本実施形態の場合、チップ部品１０は、半導体集積回路チップであり、回路基板２０と反対側の面が、半導体集積回路１２ａが形成された能動面（端子形成面）１２となっている。 <Circuit board>
Fig.1 (a) is a plane block diagram of the circuit board which is an electronic device mounting body which can be manufactured using the mounting method of the electronic device which concerns on this invention, FIG.1 (b) is A- shown to (a). It is a section lineblock diagram which meets an A 'line. The circuit board 20 shown in FIG. 1 has a chip component (electronic device) 10 face-up bonded to one surface side ((b) upper surface side) of the circuit board 20, and connection terminals of the chip component 10 and wiring patterns on the circuit board 20 Are electrically connected. In the present embodiment, the chip component 10 is a semiconductor integrated circuit chip, and the surface opposite to the circuit board 20 is an active surface (terminal forming surface) 12 on which the semiconductor integrated circuit 12a is formed.

なお、図１（ｂ）では図示を省略しているが、能動面１２には半導体集積回路１２ａ及びそこから延びる前記配線を保護するためのパッシべーション膜が形成されている。このパッシべーション膜は絶縁材料からなる薄膜であり、例えばＳｉＯ２やＳｉＮ等の無機絶縁材料を用いて形成される。あるいは、前記無機絶縁材料を用いて形成した絶縁膜上に、さらにポリイミド等の有機絶縁材料（樹脂材料）を用いた絶縁膜を積層してもよい。またパッシべーション膜は、接続端子１４の平面領域を避けて形成されており、パッシべーション膜は、チップ部品１０の側面ないし裏面側まで延設されていてもよい。 Although not shown in FIG. 1B, a passivation film for protecting the semiconductor integrated circuit 12a and the wiring extending therefrom is formed on the active surface 12. The passivation film is a thin film made of an insulating material, and is formed using an inorganic insulating material such as SiO 2 or SiN. Alternatively, an insulating film using an organic insulating material (resin material) such as polyimide may be stacked on the insulating film formed using the inorganic insulating material. Further, the passivation film is formed so as to avoid the planar region of the connection terminal 14, and the passivation film may be extended to the side surface or the back surface side of the chip component 10.

本発明の実装方法を適用して実装できるチップ部品１０としては、図１に示したものに限らず、一面側に外部接続端子を具備した電子デバイスを広く用いることができる。すなわち、チップ部品１０は、集積回路を具備しない半導体部品等の能動部品であってもよく、受動部品（抵抗器、キャパシタ、インダクタ等）であってもよい。本実施形態では、チップ部品１０が、３００μｍ程度の厚さに薄層化された集積回路チップである場合について説明する。   The chip component 10 that can be mounted by applying the mounting method of the present invention is not limited to the one shown in FIG. 1, and an electronic device having an external connection terminal on one side can be widely used. That is, the chip component 10 may be an active component such as a semiconductor component that does not include an integrated circuit, or may be a passive component (such as a resistor, a capacitor, or an inductor). In the present embodiment, the case where the chip component 10 is an integrated circuit chip thinned to a thickness of about 300 μm will be described.

チップ部品１０の能動面１２には、各辺端部に沿って複数の接続端子１４が配列形成されており、各接続端子１４は、半導体集積回路１２ａから引き出された図示略の配線と電気的に接続されている。本実施形態では平面視矩形状のチップの周縁部に複数の接続端子１４が配列されている場合を示しているが、例えば、複数の接続端子１４は、能動面の二辺端部に沿って配列されていてもよく、能動面１２の中央部に１又は複数の接続端子１４が配置されていてもよい。   On the active surface 12 of the chip component 10, a plurality of connection terminals 14 are arranged along each side edge, and each connection terminal 14 is electrically connected to a wiring (not shown) drawn from the semiconductor integrated circuit 12 a. It is connected to the. In the present embodiment, a case is shown in which a plurality of connection terminals 14 are arranged at the peripheral edge of a rectangular chip in plan view. For example, the plurality of connection terminals 14 extend along two side edges of the active surface. They may be arranged, and one or a plurality of connection terminals 14 may be arranged at the center of the active surface 12.

本実施形態の場合、チップ部品１０の裏面（能動面１２と反対側のチップ面）には接続端子は形成されていないが、この裏面に電極が設けられている構成であっても構わない。また当該裏面に前記電極を設けた場合には、当該電極を介して半導体集積回路１２ａと回路基板２０上の配線パターンとを電気的に接続することができる。   In the case of the present embodiment, the connection terminal is not formed on the back surface (chip surface opposite to the active surface 12) of the chip component 10, but a configuration in which electrodes are provided on this back surface may be employed. When the electrode is provided on the back surface, the semiconductor integrated circuit 12a and the wiring pattern on the circuit board 20 can be electrically connected via the electrode.

上記構成を具備したチップ部品１０は、実装面（（ｂ）図上側面）に複数の配線パターン２２が形成された回路基板２０上に実装されている。配線パターン２２は、回路基板２０に設けられた配線のうち、チップ実装面に露出されているものである。配線パターン２２は、チップ部品１０の近傍に拡幅部（ランド）を有していてもよい。そして、前記配線パターン２２と、チップ部品１０の接続端子１４との電気的接続のための接続配線３４が設けられている。   The chip component 10 having the above configuration is mounted on a circuit board 20 in which a plurality of wiring patterns 22 are formed on a mounting surface (a side surface in FIG. 5B). The wiring pattern 22 is exposed on the chip mounting surface among the wirings provided on the circuit board 20. The wiring pattern 22 may have a widened portion (land) in the vicinity of the chip component 10. A connection wiring 34 for electrical connection between the wiring pattern 22 and the connection terminal 14 of the chip component 10 is provided.

本実施形態の回路基板２０は、図１（ｂ）に示すように、絶縁層を介して複数層の配線層が積層された多層基板であり、その裏面側（（ｂ）図下側面）に露出する配線を具備した両面基板である。また回路基板２０は、内部に延在する導体パターン２８を含んでいる。この回路基板としては、部品内蔵型の配線基板であってもよく、例えば、基板２０の内部に抵抗器、キャパシタ、インダクタ等の受動部品又は集積回路部品等の能動部品が埋め込まれ、内蔵の導体パターン２８に電気的に接続されている構成が採用できる。   As shown in FIG. 1B, the circuit board 20 of the present embodiment is a multi-layer board in which a plurality of wiring layers are laminated via an insulating layer, and on the back surface side (the lower side surface in FIG. 1B). It is a double-sided board with exposed wiring. The circuit board 20 includes a conductor pattern 28 extending inside. The circuit board may be a component built-in type wiring board. For example, a passive component such as a resistor, a capacitor, or an inductor, or an active component such as an integrated circuit component is embedded in the substrate 20, and a built-in conductor. A configuration electrically connected to the pattern 28 can be employed.

チップ部品１０は、回路基板２０に対して、その裏面（能動面１２と反対側）を向けた状態で載置されており、チップ部品１０と回路基板２０との間には、接着層２９が介在している。接着層２９としては、導電性の接着剤と、絶縁性の接着剤のいずれも用いることができ、導電性の接着剤を用いれば、チップ実装領域の配線パターンとチップ部品１０の裏面に設けられた電極との導電接続に利用することができる。絶縁性の接着剤としては、ＤＡＦ（ダイアタッチフィルム）を用いることができる。また、接着層２９には絶縁マトリクス中に導電粒子が分散された異方性導電ペースト（ＡＣＰ）や、異方性導電フィルム（ＡＣＦ）を用いることもできる。   The chip component 10 is placed with the back surface (the side opposite to the active surface 12) facing the circuit board 20, and an adhesive layer 29 is interposed between the chip component 10 and the circuit board 20. Intervene. As the adhesive layer 29, either a conductive adhesive or an insulating adhesive can be used. If a conductive adhesive is used, the adhesive layer 29 is provided on the wiring pattern in the chip mounting area and the back surface of the chip component 10. It can be used for conductive connection with other electrodes. As the insulating adhesive, DAF (die attach film) can be used. Alternatively, the adhesive layer 29 may be an anisotropic conductive paste (ACP) in which conductive particles are dispersed in an insulating matrix or an anisotropic conductive film (ACF).

またチップ部品１０の接続端子１４上には、柱状の導体ポスト３８が立設されている。この導体ポスト３８は、導電性微粒子を媒質に分散させた液体材料を接続端子１４上に選択配置する液滴吐出法を用いて形成されたものである。この導体ポスト３０は、例えば１０μｍ〜２０μｍ程度の高さに形成されている。また導体ポスト３８の形成に用いられる導電性微粒子としては、金、銀、銅、パラジウム等が例示できる。   A columnar conductor post 38 is erected on the connection terminal 14 of the chip component 10. The conductor post 38 is formed using a droplet discharge method in which a liquid material in which conductive fine particles are dispersed in a medium is selectively disposed on the connection terminal 14. The conductor post 30 is formed to a height of about 10 μm to 20 μm, for example. Examples of the conductive fine particles used for forming the conductor post 38 include gold, silver, copper, and palladium.

回路基板２０上に載置されたチップ部品１０を取り囲むように、チップ部品１０の能動面１２と回路基板２０の実装面との段差を緩和する斜面部を具備したスロープ材３０が設けられている。スロープ材３０は、電気的に絶縁性を有する材料（例えば樹脂）によって形成されており、接着層２９と同一又は異なる材料で形成することができる。本実施形態の場合、チップ部品１０を取り囲むように配線パターン２２が配置されているので、スロープ材３０がチップ部品１０を取り囲むように形成されているが、チップ部品１０の一部の辺端部にのみ近接して配線パターン２２が形成されている場合には、その辺端部に隣接する部分にのみスロープ材３０を設ければよい。   A slope member 30 having a slope portion for relaxing a step between the active surface 12 of the chip component 10 and the mounting surface of the circuit board 20 is provided so as to surround the chip component 10 placed on the circuit board 20. . The slope member 30 is made of an electrically insulating material (for example, resin) and can be made of the same or different material as the adhesive layer 29. In the case of this embodiment, since the wiring pattern 22 is arranged so as to surround the chip component 10, the slope material 30 is formed so as to surround the chip component 10. In the case where the wiring pattern 22 is formed in close proximity to only the slope material 30, the slope material 30 may be provided only in the portion adjacent to the side edge portion.

スロープ材３０は、チップ部品１０の側面に接触するようにして形成されており、スロープ材３０表面の斜面部をもってチップ部品１０の能動面１２（パッシべーション膜１６表面）から回路基板２０の実装面まで段差無く連続するようになっている。本実施形態の場合、図１（ｂ）に示すように、スロープ材３０の一部がチップ部品１０の能動面１２に一部乗り上げるようにして形成されている。スロープ材３０は、ディスペンサ等の液体材料塗布手段を用いてスロープ材３０を形成するための液体樹脂材料を回路基板２０上に配置することで形成されるが、所定高さの斜面部を有するスロープ材を形成するために、前記液体樹脂材料の粘度を高くする必要がある。そのため、ディスペンサによる塗布位置や塗布量の制御が難しく、塗布位置のずれによって図示のように能動面１２に一部乗り上げてしまう場合がある。そこで、本実施形態のチップ部品１０では、上述したように接続端子１４上に導体ポスト３８が立設されている構成を採用することで、スロープ材３０形成用の液体樹脂材料が一部が能動面１２上に被った場合にも導体ポスト３８の先端部がスロープ材３０の表面に露出されるようにしている。これにより、後段の工程で形成される接続配線３４とチップ部品１０との導通性を確保できるようになっている。   The slope member 30 is formed so as to be in contact with the side surface of the chip component 10, and the circuit board 20 is mounted from the active surface 12 (passivation film 16 surface) of the chip component 10 with the slope portion of the surface of the slope member 30. It continues to the surface without any step. In the case of this embodiment, as shown in FIG. 1B, a part of the slope material 30 is formed so as to partially ride on the active surface 12 of the chip component 10. The slope material 30 is formed by disposing a liquid resin material for forming the slope material 30 on the circuit board 20 by using a liquid material application means such as a dispenser, but has a slope portion having a predetermined height. In order to form the material, it is necessary to increase the viscosity of the liquid resin material. For this reason, it is difficult to control the application position and the application amount by the dispenser, and a part of the active surface 12 may be climbed as shown in FIG. Therefore, in the chip component 10 of the present embodiment, by adopting a configuration in which the conductor post 38 is erected on the connection terminal 14 as described above, a part of the liquid resin material for forming the slope member 30 is active. The tip of the conductor post 38 is exposed to the surface of the slope member 30 even when it covers the surface 12. Thereby, the electrical connection between the connection wiring 34 formed in the subsequent process and the chip component 10 can be secured.

チップ部品１０の各接続端子１４は、上記導体ポスト３８と接続配線３４とによって、各々対応する配線パターン２２に電気的に接続されている。具体的には、接続配線３４は、接続端子１４上に立設された導体ポスト３８の、スロープ材３０表面からの露出部分に当接して形成され、この当接位置からスロープ材３０上を通って配線パターン２２に至るよう形成されている。このように、チップ部品１０の側方に設けられたスロープ材３０の斜面部を介して異なる高さの端子と配線とを接続しているので、接続配線３４の断線を防止できる。またワイヤボンディングのようにワイヤを引き回す空間を要しないことから、薄型の回路基板となっている。   Each connection terminal 14 of the chip component 10 is electrically connected to the corresponding wiring pattern 22 by the conductor post 38 and the connection wiring 34. Specifically, the connection wiring 34 is formed in contact with the exposed portion of the conductor post 38 erected on the connection terminal 14 from the surface of the slope material 30, and passes through the slope material 30 from this contact position. The wiring pattern 22 is formed. As described above, since the terminals and the wirings having different heights are connected via the slope portions of the slope member 30 provided on the side of the chip component 10, the disconnection of the connection wiring 34 can be prevented. Further, since a space for drawing a wire is not required unlike wire bonding, the circuit board is thin.

回路基板２０の裏面側には、複数の外部端子３６が形成されている。この外部端子３６は、実装面側の配線パターン２２上に設けてもよい。外部端子３６は、導電性を有する金属（例えば合金）であって、溶融させて電気的な接続を図る、いわゆるろう材により形成してもよい。ろう材は、軟ろう（soft solder）又は硬ろう（hard solder）のいずれであってもよく、スズー銀（Ｓｎ―Ａｇ）系、スズ−ビスマス（Ｓｎ−Ｂｉ）系、スズ−亜鉛（Ｓｎ−Ｚｎ）系、あるいはスズ−銅（Ｓｎ−Ｃｕ）系の合金や、これらの合金に銀、ビスマス、亜鉛、銅などを添加した合金からなる鉛を含まないはんだ（以下、鉛フリーはんだという。）を使用してもよい。   A plurality of external terminals 36 are formed on the back side of the circuit board 20. The external terminals 36 may be provided on the wiring pattern 22 on the mounting surface side. The external terminal 36 is a metal having conductivity (for example, an alloy), and may be formed of a so-called brazing material that is melted for electrical connection. The brazing material may be either soft solder or hard solder, such as tin-silver (Sn-Ag), tin-bismuth (Sn-Bi), tin-zinc (Sn-). Zn) -based or tin-copper (Sn-Cu) -based alloys, and alloys containing these alloys with addition of silver, bismuth, zinc, copper, etc., which do not contain lead (hereinafter referred to as lead-free solder). May be used.

回路基板２０は、図１（ｂ）に示すような外部端子３６を有するＢＧＡ（Ball Grid Array）型のパッケージやＣＳＰ（Chip Size Package）などの形態で構成することができ、外部端子３６を設けずに、配線パターン２２の一部が外部との電気的接続部を成すＬＧＡ（Land Grid Array)型のパッケージとして構成してもよい。
なお、回路基板２０上に実装されたチップ部品１０は、封止材によって封止されていてもよい。封止材を設ける場合には、少なくとも接続配線３４と接続端子１４との電気的接続部と、接続配線３４と配線パターン２２との電気的接続部とを気密に封止する。また封止材によってチップ部品１０全体を封止した構造であってもよい。 The circuit board 20 can be configured in the form of a BGA (Ball Grid Array) type package or CSP (Chip Size Package) having the external terminals 36 as shown in FIG. Alternatively, a part of the wiring pattern 22 may be configured as an LGA (Land Grid Array) type package in which an electrical connection with the outside is formed.
The chip component 10 mounted on the circuit board 20 may be sealed with a sealing material. When the sealing material is provided, at least the electrical connection portion between the connection wiring 34 and the connection terminal 14 and the electrical connection portion between the connection wiring 34 and the wiring pattern 22 are hermetically sealed. Moreover, the structure which sealed the chip component 10 whole with the sealing material may be sufficient.

＜回路基板の他の構成＞
次に、図２を参照して本発明に係る回路基板の他の構成例について説明する。図２は、同構成例に係る回路基板の断面構成図であって、図１（ｂ）に相当する図面である。したがって、図２に示す構成要素のうち図１と共通のものには同一の符号を付して説明を省略する。 <Other configurations of circuit board>
Next, another configuration example of the circuit board according to the present invention will be described with reference to FIG. FIG. 2 is a cross-sectional configuration diagram of a circuit board according to the configuration example, and corresponds to FIG. 2 that are the same as those in FIG. 1 are denoted by the same reference numerals and description thereof is omitted.

図２に示す回路基板２０は、その表面に延在する配線パターン２２上にそれぞれ設けられた導電性のパッド２４を備えたものとなっており、これらのパッド２４上に、導体ポスト３８と同様の構成の導体ポスト３９が立設されている。このパッド２４上の導体ポスト３９も、例えば１０μｍ〜２０μｍ程度の高さに形成されている。   The circuit board 20 shown in FIG. 2 includes conductive pads 24 provided on the wiring pattern 22 extending on the surface thereof, and the same as the conductor posts 38 on these pads 24. A conductor post 39 having the structure is erected. The conductor post 39 on the pad 24 is also formed to a height of about 10 μm to 20 μm, for example.

上記構成を具備した回路基板では、回路基板２０上のパッド２４上に導体ポスト３９が立設されていることで、接続配線３４の接続信頼性をさらに高め得るものとなっている。先に記載のように、スロープ材３０を形成するための液体樹脂材料は、所定高さの斜面部を形成するために、回路基板２０上であまり濡れ広がらない高粘度の液体材料となっているため、塗布位置や塗布量の制御が困難であり、チップ部品１０の能動面１２に乗り上げる可能性がある一方で、チップ部品１０から離れる方向に塗布位置がずれる可能性もある。チップ部品１０から離れる方向にスロープ材３０の形成位置がずれると、図２に示すように回路基板２０上にパッド２４が形成されている場合にはパッド２４を液体樹脂材料が覆ってしまい、接続配線３４を接続できなくなるおそれがある。   In the circuit board having the above configuration, the connection reliability of the connection wiring 34 can be further improved by providing the conductor posts 39 on the pads 24 on the circuit board 20. As described above, the liquid resin material for forming the slope member 30 is a high-viscosity liquid material that does not spread so much on the circuit board 20 in order to form a slope portion having a predetermined height. Therefore, it is difficult to control the application position and the application amount, and the application position may be shifted in the direction away from the chip part 10 while it may run on the active surface 12 of the chip part 10. If the forming position of the slope member 30 is shifted in the direction away from the chip component 10, the pad 24 is covered with the liquid resin material when the pad 24 is formed on the circuit board 20 as shown in FIG. There is a possibility that the wiring 34 cannot be connected.

そこで本例のように、パッド２４上に導体ポスト３９を立設した構成としておけば、スロープ材形成用の液体樹脂材料がパッド２４上にまで広がったとしても、導体ポスト３９の先端部側はスロープ材３０の表面から露出させることができるので、導体ポスト３９の露出部分に対して接続配線３４を接続することで、チップ部品１０の接続端子１４と、配線パターン２２とを、導体ポスト３８，３９及び接続配線３４によって電気的に接続することができる。   Therefore, if the conductor post 39 is erected on the pad 24 as in this example, even if the liquid resin material for forming the slope material spreads over the pad 24, the tip end side of the conductor post 39 is Since it can be exposed from the surface of the slope member 30, by connecting the connection wiring 34 to the exposed portion of the conductor post 39, the connection terminal 14 of the chip component 10 and the wiring pattern 22 are connected to the conductor post 38, 39 and the connection wiring 34 can be electrically connected.

このように本構成例によれば、回路基板２０上に設けられたパッド２４上にも導体ポスト３９を立設する構成としたことで、スロープ材３０の形成位置に多少のずれが生じたとしても、チップ部品１０を確実に実装できるものとなっている。また、上記導体ポスト３９は、チップ部品１０上に導体ポスト３８を形成する際に同工程で形成することができるので、図１に示した構成に比して工数の増加やそれに伴うコストの増加はほとんど無い。   As described above, according to the present configuration example, the conductor post 39 is also erected on the pad 24 provided on the circuit board 20, so that a slight shift occurs in the formation position of the slope material 30. Also, the chip component 10 can be reliably mounted. Further, since the conductor post 39 can be formed in the same process when the conductor post 38 is formed on the chip component 10, the number of man-hours and the associated cost increase compared to the configuration shown in FIG. There is almost no.

（電子デバイスの実装方法）
以下、図３を参照して図１に示した構成の回路基板における電子デバイスの実装方法について説明する。図３（ａ）〜（ｆ）は、第１実施形態の回路基板２０におけるチップ部品（電子デバイス）１０の実装工程を説明する図である。 (Electronic device mounting method)
Hereinafter, a method of mounting the electronic device on the circuit board having the configuration shown in FIG. 1 will be described with reference to FIG. FIGS. 3A to 3F are diagrams for explaining a mounting process of the chip component (electronic device) 10 on the circuit board 20 of the first embodiment.

本実施形態の実装方法は、回路基板２０上にチップ部品１０を載置する載置工程（図３（ａ））と、チップ部品１０の接続端子１４上に導体ポスト３８を立設する導体ポスト形成工程（図３（ｂ））と、チップ部品１０の周囲にスロープ材３０を形成するスロープ材形成工程（図３（ｃ））と、接続配線３４を形成する接続配線形成工程（図３（ｄ））と、外部端子３６を形成する外部端子形成工程（図３（ｅ））と、を有している。さらに本実施形態の実装方法では、接続配線工程において、液滴吐出法（液相法）を用いて、導体ポスト３８及び接続配線３４を形成するようになっている。   The mounting method of this embodiment includes a mounting step (FIG. 3A) for mounting the chip component 10 on the circuit board 20, and a conductor post for standing the conductor post 38 on the connection terminal 14 of the chip component 10. Forming step (FIG. 3B), slope material forming step of forming the slope material 30 around the chip component 10 (FIG. 3C), and connection wiring forming step of forming the connection wiring 34 (FIG. 3B). d)) and an external terminal forming step for forming the external terminal 36 (FIG. 3E). Furthermore, in the mounting method of this embodiment, the conductor posts 38 and the connection wirings 34 are formed by using a droplet discharge method (liquid phase method) in the connection wiring process.

＜載置工程＞
以下、図面を参照して実装方法の各工程について詳細に説明する。
まず、図３（ａ）に示すように、所定の配線パターン２２や導体パターン２８が形成された回路基板２０上に、接着層２９を介してチップ部品１０を載置する。チップ部品１０の基板上への載置は、真空チャック等によりチップ部品１０を吸着支持して搬送し、回路基板２０上の実装位置に配置する方法が採用でき、場合によっては手作業で配置してもよい。チップ部品１０の裏面又は回路基板２０上に、図３（ａ）に示す接着層２９を形成するための接着剤を塗布した状態でチップ部品１０は回路基板２０上に載置される。接着層２９には、先に記載のように、ＤＡＦや樹脂製接着剤を用いることができるが、接着層２９を介して回路基板２０にチップ部品１０を接着させた状態でチップ部品１０の位置調整を行う場合、チップ部品１０の移動が容易になるよう、未硬化の樹脂製接着剤を用いることが好ましい。
またこのとき、上記真空チャック等によって載置したチップ部品１０を水平方向に動かして、チップ部品１０の接続端子１４と、それに対応する配線パターン２２との位置合わせを行ってもよい。 <Installation process>
Hereinafter, each step of the mounting method will be described in detail with reference to the drawings.
First, as shown in FIG. 3A, the chip component 10 is placed on the circuit board 20 on which the predetermined wiring pattern 22 and the conductor pattern 28 are formed via the adhesive layer 29. For mounting the chip component 10 on the substrate, a method can be adopted in which the chip component 10 is sucked and supported by a vacuum chuck or the like and transported and placed at a mounting position on the circuit board 20. May be. The chip component 10 is placed on the circuit substrate 20 in a state where an adhesive for forming the adhesive layer 29 shown in FIG. 3A is applied to the back surface of the chip component 10 or the circuit substrate 20. As described above, DAF or resin adhesive can be used for the adhesive layer 29, but the position of the chip component 10 in a state where the chip component 10 is adhered to the circuit board 20 via the adhesive layer 29. When the adjustment is performed, it is preferable to use an uncured resin adhesive so that the chip component 10 can be easily moved.
At this time, the chip component 10 placed by the vacuum chuck or the like may be moved in the horizontal direction to align the connection terminal 14 of the chip component 10 with the corresponding wiring pattern 22.

＜導体ポスト形成工程＞
チップ部品１０を回路基板２０上に載置したならば、次に、図３（ｂ）に示すように、チップ部品１０の接続端子１４上に導体ポスト３８を立設する。本実施形態では、この導体ポストの形成に際して、導電性微粒子を媒質に分散させた液体材料を吐出ヘッドにより選択配置する液滴吐出法を用いる。まず、導体ポスト３８の形成に用いる液滴吐出装置、及び液体材料について図４を参照して説明する。 <Conductor post formation process>
After the chip component 10 is placed on the circuit board 20, next, as shown in FIG. 3B, the conductor post 38 is erected on the connection terminal 14 of the chip component 10. In this embodiment, when forming the conductor post, a droplet discharge method is used in which a liquid material in which conductive fine particles are dispersed in a medium is selectively arranged by an ejection head. First, a droplet discharge device and a liquid material used for forming the conductor post 38 will be described with reference to FIG.

［液滴吐出装置］
図４（ａ）は、本実施形態で用いる液滴吐出装置ＩＪの概略構成を示す斜視図である。
液滴吐出装置ＩＪは、液滴吐出ヘッド３０１と、Ｘ軸方向駆動軸３０４と、Ｙ軸方向ガイド軸３０５と、制御装置ＣＯＮＴと、ステージ３０７と、クリーニング機構３０８と、基台３０９と、ヒータ３１５とを備えている。ステージ３０７は、この液滴吐出装置ＩＪによりインク（液体材料）を設けられる基板２０を支持するものであって、基板２０を基準位置に固定する不図示の固定機構を備えている。 [Droplet discharge device]
FIG. 4A is a perspective view showing a schematic configuration of a droplet discharge device IJ used in the present embodiment.
The droplet discharge device IJ includes a droplet discharge head 301, an X-axis direction drive shaft 304, a Y-axis direction guide shaft 305, a control device CONT, a stage 307, a cleaning mechanism 308, a base 309, and a heater. 315. The stage 307 supports the substrate 20 on which ink (liquid material) is provided by the droplet discharge device IJ, and includes a fixing mechanism (not shown) that fixes the substrate 20 to a reference position.

液滴吐出ヘッド３０１は、複数の吐出ノズルを備えたマルチノズルタイプの液滴吐出ヘッドであり、長手方向とＹ軸方向とを一致させている。複数の吐出ノズルは、液滴吐出ヘッド３０１の下面にＹ軸方向に並んで一定間隔で設けられている。液滴吐出ヘッド３０１の吐出ノズルからは、ステージ３０７に支持されている基板２０に対して、上述した導電性微粒子を含むインクが吐出される。   The droplet discharge head 301 is a multi-nozzle type droplet discharge head provided with a plurality of discharge nozzles, and the longitudinal direction and the Y-axis direction are made to coincide. The plurality of ejection nozzles are provided on the lower surface of the droplet ejection head 301 in the Y axis direction at regular intervals. From the discharge nozzle of the droplet discharge head 301, the ink containing the conductive fine particles described above is discharged onto the substrate 20 supported by the stage 307.

Ｘ軸方向駆動軸３０４には、Ｘ軸方向駆動モータ３０２が接続されている。Ｘ軸方向駆動モータ３０２はステッピングモータ等であり、制御装置ＣＯＮＴからＸ軸方向の駆動信号が供給されると、Ｘ軸方向駆動軸３０４を回転させる。Ｘ軸方向駆動軸３０４が回転すると、液滴吐出ヘッド３０１はＸ軸方向に移動する。
Ｙ軸方向ガイド軸３０５は、基台３０９に対して動かないように固定されている。ステージ３０７は、Ｙ軸方向駆動モータ３０３を備えている。Ｙ軸方向駆動モータ３０３はステッピングモータ等であり、制御装置ＣＯＮＴからＹ軸方向の駆動信号が供給されると、ステージ３０７をＹ軸方向に移動する。 An X-axis direction drive motor 302 is connected to the X-axis direction drive shaft 304. The X-axis direction drive motor 302 is a stepping motor or the like, and rotates the X-axis direction drive shaft 304 when a drive signal in the X-axis direction is supplied from the control device CONT. When the X-axis direction drive shaft 304 rotates, the droplet discharge head 301 moves in the X-axis direction.
The Y-axis direction guide shaft 305 is fixed so as not to move with respect to the base 309. The stage 307 includes a Y-axis direction drive motor 303. The Y-axis direction drive motor 303 is a stepping motor or the like, and moves the stage 307 in the Y-axis direction when a drive signal in the Y-axis direction is supplied from the control device CONT.

制御装置ＣＯＮＴは、液滴吐出ヘッド３０１に液滴の吐出制御用の電圧を供給する。また、Ｘ軸方向駆動モータ３０２に液滴吐出ヘッド３０１のＸ軸方向の移動を制御する駆動パルス信号を、Ｙ軸方向駆動モータ３０３にステージ３０７のＹ軸方向の移動を制御する駆動パルス信号を供給する。
クリーニング機構３０８は、液滴吐出ヘッド３０１をクリーニングするものである。クリーニング機構３０８には、図示しないＹ軸方向の駆動モータが備えられている。このＹ軸方向の駆動モータの駆動により、クリーニング機構は、Ｙ軸方向ガイド軸３０５に沿って移動する。クリーニング機構３０８の移動も制御装置ＣＯＮＴにより制御される。
ヒータ３１５は、ここではランプアニールにより基板２０を熱処理する手段であり、基板２０上に塗布された液体材料に含まれる溶媒の蒸発及び乾燥を行う。このヒータ３１５の電源の投入及び遮断も制御装置ＣＯＮＴにより制御される。 The control device CONT supplies a droplet discharge control voltage to the droplet discharge head 301. Further, the X-axis direction drive motor 302 has a drive pulse signal for controlling the movement of the droplet discharge head 301 in the X-axis direction, and the Y-axis direction drive motor 303 has a drive pulse signal for controlling the movement of the stage 307 in the Y-axis direction. Supply.
The cleaning mechanism 308 is for cleaning the droplet discharge head 301. The cleaning mechanism 308 includes a Y-axis direction drive motor (not shown). The cleaning mechanism moves along the Y-axis direction guide shaft 305 by driving the Y-axis direction drive motor. The movement of the cleaning mechanism 308 is also controlled by the control device CONT.
Here, the heater 315 is a means for heat-treating the substrate 20 by lamp annealing, and performs evaporation and drying of the solvent contained in the liquid material applied on the substrate 20. The heater 315 is also turned on and off by the control device CONT.

液滴吐出装置ＩＪは、液滴吐出ヘッド３０１と基板２０を支持するステージ３０７とを相対的に走査しつつ基板２０に対して液滴を吐出する。ここで、以下の説明において、Ｘ軸方向を走査方向、Ｘ軸方向と直交するＹ軸方向を非走査方向とする。したがって、液滴吐出ヘッド３０１の吐出ノズルは、非走査方向であるＹ軸方向に一定間隔で並んで設けられている。なお、図４（ａ）では、液滴吐出ヘッド３０１は、基板２０の進行方向に対し直角に配置されているが、液滴吐出ヘッド３０１の角度を調整し、基板２０の進行方向に対して交差させるようにしてもよい。このようにすれば、液滴吐出ヘッド３０１の角度を調整することで、ノズル間のピッチを調節することができる。また、基板２０とノズル面との距離を任意に調節できるようにしてもよい。   The droplet discharge device IJ discharges droplets onto the substrate 20 while relatively scanning the droplet discharge head 301 and the stage 307 that supports the substrate 20. Here, in the following description, the X-axis direction is a scanning direction, and the Y-axis direction orthogonal to the X-axis direction is a non-scanning direction. Accordingly, the discharge nozzles of the droplet discharge head 301 are provided side by side at regular intervals in the Y-axis direction that is the non-scanning direction. In FIG. 4A, the droplet discharge head 301 is disposed at a right angle to the traveling direction of the substrate 20, but the angle of the droplet discharge head 301 is adjusted to the traveling direction of the substrate 20. You may make it cross. In this way, the pitch between the nozzles can be adjusted by adjusting the angle of the droplet discharge head 301. Further, the distance between the substrate 20 and the nozzle surface may be arbitrarily adjusted.

図４（ｂ）は、ピエゾ方式による液体材料の吐出原理を説明するための液滴吐出ヘッドの概略構成図である。図４（ｂ）において、液体材料（インク；機能液）を収容する液体室３２１に隣接してピエゾ素子３２２が設置されている。液体室３２１には、液体材料を収容する材料タンクを含む液体材料供給系３２３を介して液体材料が供給される。ピエゾ素子３２２は駆動回路３２４に接続されており、この駆動回路３２４を介してピエゾ素子３２２に電圧を印加し、ピエゾ素子３２２を変形させて液体室３２１を弾性変形させる。そして、この弾性変形時の内容積の変化によってノズル３２５から液体材料が吐出されるようになっている。この場合、印加電圧の値を変化させることにより、ピエゾ素子３２２の歪み量を制御することができる。また、印加電圧の周波数を変化させることにより、ピエゾ素子３２２の歪み速度を制御することができる。ピエゾ方式による液滴吐出は材料に熱を加えないため、材料の組成に影響を与えにくいという利点を有する。   FIG. 4B is a schematic configuration diagram of a droplet discharge head for explaining the principle of discharging a liquid material by a piezo method. In FIG. 4B, a piezo element 322 is installed adjacent to a liquid chamber 321 that stores a liquid material (ink; functional liquid). The liquid material is supplied to the liquid chamber 321 via a liquid material supply system 323 including a material tank that stores the liquid material. The piezo element 322 is connected to a drive circuit 324, and a voltage is applied to the piezo element 322 via the drive circuit 324 to deform the piezo element 322 and elastically deform the liquid chamber 321. And the liquid material is discharged from the nozzle 325 by the change of the internal volume at the time of this elastic deformation. In this case, the amount of distortion of the piezo element 322 can be controlled by changing the value of the applied voltage. In addition, the strain rate of the piezo element 322 can be controlled by changing the frequency of the applied voltage. Since the droplet discharge by the piezo method does not apply heat to the material, it has an advantage of hardly affecting the composition of the material.

［インク（液体材料）］
次に、本実施形態に係る製造方法で用いられる、液滴吐出ヘッド３０１からの吐出に好適なインク（液体材料）について説明する。本実施形態で用いる導体ポスト形成用（及び接続配線形成用）の液体材料は、導電性微粒子を分散媒に分散させた分散液、若しくはその前駆体からなるものである。導電性微粒子として、例えば金、銀、銅、パラジウム、ニオブ及びニッケル等を含有する金属微粒子の他、これらの前駆体、合金、酸化物、並びに導電性ポリマーやインジウム錫酸化物等の微粒子などが用いられる。これらの導電性微粒子は、分散性を向上させるために表面に有機物などをコーティングして使うこともできる。導電性微粒子の粒径は１ｎｍ〜０．１μｍ程度であることが好ましい。０．１μｍより大きいと、後述する液体吐出ヘッド３０１のノズルに目詰まりが生じるおそれがあるだけでなく、得られる膜の緻密性が悪化する可能性がある。また、１ｎｍより小さいと、導電性微粒子に対するコーティング剤の体積比が大きくなり、得られる膜中の有機物の割合が過多となる。 [Ink (liquid material)]
Next, ink (liquid material) suitable for ejection from the droplet ejection head 301 used in the manufacturing method according to the present embodiment will be described. The liquid material for forming conductor posts (and for forming connection wirings) used in the present embodiment is made of a dispersion obtained by dispersing conductive fine particles in a dispersion medium, or a precursor thereof. Examples of the conductive fine particles include metal fine particles containing, for example, gold, silver, copper, palladium, niobium and nickel, as well as precursors, alloys, oxides thereof, and fine particles such as conductive polymers and indium tin oxide. Used. These conductive fine particles can be used by coating the surface with an organic substance or the like in order to improve dispersibility. The particle diameter of the conductive fine particles is preferably about 1 nm to 0.1 μm. If it is larger than 0.1 μm, there is a possibility that clogging may occur in the nozzles of the liquid discharge head 301 described later, and the denseness of the resulting film may be deteriorated. On the other hand, if it is smaller than 1 nm, the volume ratio of the coating agent to the conductive fine particles becomes large, and the ratio of the organic matter in the obtained film becomes excessive.

分散媒としては、上記の導電性微粒子を分散できるもので、凝集を起こさないものであれば特に限定されない。例えば、水の他に、メタノール、エタノール、プロパノール、ブタノールなどのアルコール類、ｎ−ヘプタン、ｎ−オクタン、デカン、ドデカン、テトラデカン、トルエン、キシレン、シメン、デュレン、インデン、ジペンテン、テトラヒドロナフタレン、デカヒドロナフタレン、シクロヘキシルベンゼンなどの炭化水素系化合物、またエチレングリコールジメチルエーテル、エチレングリコールジエチルエーテル、エチレングリコールメチルエチルエーテル、ジエチレングリコールジメチルエーテル、ジエチレングリコールジエチルエーテル、ジエチレングリコールメチルエチルエーテル、１，２−ジメトキシエタン、ビス（２−メトキシエチル）エーテル、ｐ−ジオキサンなどのエーテル系化合物、さらにプロピレンカーボネート、γ−ブチロラクトン、Ｎ−メチル−２−ピロリドン、ジメチルホルムアミド、ジメチルスルホキシド、シクロヘキサノンなどの極性化合物を例示できる。これらのうち、微粒子の分散性と分散液の安定性、また液滴吐出法（インクジェット法）への適用の容易さの点で、水、アルコール類、炭化水素系化合物、エーテル系化合物が好ましく、より好ましい分散媒としては、水、炭化水素系化合物を挙げることができる。   The dispersion medium is not particularly limited as long as it can disperse the conductive fine particles and does not cause aggregation. For example, in addition to water, alcohols such as methanol, ethanol, propanol, butanol, n-heptane, n-octane, decane, dodecane, tetradecane, toluene, xylene, cymene, durene, indene, dipentene, tetrahydronaphthalene, decahydro Hydrocarbon compounds such as naphthalene and cyclohexylbenzene, ethylene glycol dimethyl ether, ethylene glycol diethyl ether, ethylene glycol methyl ethyl ether, diethylene glycol dimethyl ether, diethylene glycol diethyl ether, diethylene glycol methyl ethyl ether, 1,2-dimethoxyethane, bis (2- Methoxyethyl) ether, ether compounds such as p-dioxane, propylene carbonate, γ- Butyrolactone, N- methyl-2-pyrrolidone, dimethylformamide, dimethyl sulfoxide, can be exemplified polar compounds such as cyclohexanone. Of these, water, alcohols, hydrocarbon compounds, and ether compounds are preferred from the viewpoints of fine particle dispersibility and dispersion stability, and ease of application to the droplet discharge method (inkjet method). More preferred dispersion media include water and hydrocarbon compounds.

上記導電性微粒子の分散液の表面張力は０．０２Ｎ／ｍ〜０．０７Ｎ／ｍの範囲内であることが好ましい。インクジェット法にて液体を吐出する際、表面張力が０．０２Ｎ／ｍ未満であると、インク組成物のノズル面に対する濡れ性が増大するため飛行曲りが生じやすくなり、０．０７Ｎ／ｍを超えるとノズル先端でのメニスカスの形状が安定しないため吐出量や、吐出タイミングの制御が困難になる。表面張力を調整するため、上記分散液には、基板との接触角を大きく低下させない範囲で、フッ素系、シリコーン系、ノニオン系などの表面張力調節剤を微量添加するとよい。ノニオン系表面張力調節剤は、液体の基板への濡れ性を向上させ、膜のレベリング性を改良し、膜の微細な凹凸の発生などの防止に役立つものである。上記表面張力調節剤は、必要に応じて、アルコール、エーテル、エステル、ケトン等の有機化合物を含んでもよい。   The surface tension of the conductive fine particle dispersion is preferably in the range of 0.02 N / m to 0.07 N / m. When the liquid is ejected by the ink jet method, if the surface tension is less than 0.02 N / m, the wettability of the ink composition to the nozzle surface increases, and thus flight bending tends to occur, exceeding 0.07 N / m. Since the meniscus shape at the nozzle tip is not stable, it becomes difficult to control the discharge amount and the discharge timing. In order to adjust the surface tension, a small amount of a surface tension regulator such as a fluorine-based, silicone-based, or nonionic-based material may be added to the dispersion within a range that does not significantly reduce the contact angle with the substrate. The nonionic surface tension modifier improves the wettability of the liquid to the substrate, improves the leveling property of the film, and helps prevent the occurrence of fine irregularities in the film. The surface tension modifier may contain an organic compound such as alcohol, ether, ester, or ketone, if necessary.

上記分散液の粘度は１ｍＰａ・ｓ〜５０ｍＰａ・ｓであることが好ましい。インクジェット法を用いて液体材料を液滴として吐出する際、粘度が１ｍＰａ・ｓより小さい場合にはノズル周辺部がインクの流出により汚染されやすく、また粘度が５０ｍＰａ・ｓより大きい場合は、ノズル孔での目詰まり頻度が高くなり円滑な液滴の吐出が困難となるだけでなく、液滴の吐出量が減少する。   The viscosity of the dispersion is preferably 1 mPa · s to 50 mPa · s. When a liquid material is ejected as droplets using the inkjet method, if the viscosity is less than 1 mPa · s, the nozzle periphery is easily contaminated by the outflow of the ink, and if the viscosity is greater than 50 mPa · s, the nozzle hole The clogging frequency in the case becomes high, and not only is it difficult to smoothly discharge droplets, but also the amount of droplets discharged is reduced.

［導体ポストの形成］
上記液滴吐出装置ＩＪを用いて導体ポスト３８を形成するには、図３（ｂ）に示すように、吐出ヘッド３０１を接続端子１４上に位置合わせして配置し、ノズル３２５から液体材料を滴下して接続端子１４上に配置する。導体ポスト３８は相当高さ（例えば１０〜２０μｍ）に形成する必要があるから、吐出ヘッド３０１から多数の液滴を吐出して堆積させる必要がある。しかし、一箇所に連続して液滴を配置しても、導電性微粒子の堆積物の高さを確保するのは困難であり、逆に配置した液体材料が濡れ広がって他の接続端子１４と短絡するおそれがある。そこで、導体ポスト３８の形成に際しては、液滴の吐出を複数回に分けて行い、段階的に導電性微粒子の堆積物を積み上げることが好ましい。 [Formation of conductor posts]
In order to form the conductor post 38 using the droplet discharge device IJ, as shown in FIG. 3B, the discharge head 301 is positioned on the connection terminal 14 and the liquid material is supplied from the nozzle 325. Dropped and placed on the connection terminal 14. Since the conductor post 38 needs to be formed to have a considerable height (for example, 10 to 20 μm), it is necessary to discharge and deposit a large number of droplets from the discharge head 301. However, even if droplets are continuously arranged in one place, it is difficult to secure the height of the conductive fine particle deposit, and conversely, the arranged liquid material spreads out and the other connection terminals 14 and There is a risk of short circuit. Therefore, when forming the conductor post 38, it is preferable that the droplets are ejected in a plurality of times and the deposits of conductive fine particles are stacked step by step.

具体的には、接続端子１４上に１〜数滴の液体材料を滴下した後、接続端子１４上の液体材料を乾燥させて導電性微粒子の堆積物を得る。この乾燥工程では、少なくとも前記液体材料の表面が乾燥する程度であればよく、完全に分散媒を除去する必要はない。この乾燥処理は、例えば基板２０を加熱する通常のホットプレート、電気炉などによる処理の他、ドライエアの吹き付けや、ランプアニールによって行うこともできる。ランプアニールに使用する光の光源としては、特に限定されないが、赤外線ランプ、キセノンランプ、ＹＡＧレーザー、アルゴンレーザー、炭酸ガスレーザー、ＸｅＦ、ＸｅＣｌ、ＸｅＢｒ、ＫｒＦ、ＫｒＣｌ、ＡｒＦ、ＡｒＣｌなどのエキシマレーザーなどを光源として使用することができる。これらの光源は一般には、出力１０Ｗ以上５０００Ｗ以下の範囲のものが用いられるが、本実施形態では１００Ｗ以上１０００Ｗ以下の範囲で十分である。
その後、接続端子１４上の堆積物に対して、さらに液体材料を吐出配置する。接続端子１４上の堆積物は乾燥状態となっているので、その上に液体材料を配置しても濡れ広がることなく高さを増すことができる。 Specifically, after dropping one to several drops of liquid material on the connection terminal 14, the liquid material on the connection terminal 14 is dried to obtain a deposit of conductive fine particles. In this drying step, it is sufficient that at least the surface of the liquid material is dried, and it is not necessary to completely remove the dispersion medium. This drying process can be performed by spraying dry air or lamp annealing, for example, in addition to a process using a normal hot plate or an electric furnace for heating the substrate 20. The light source used for lamp annealing is not particularly limited, but excimer laser such as infrared lamp, xenon lamp, YAG laser, argon laser, carbon dioxide laser, XeF, XeCl, XeBr, KrF, KrCl, ArF, ArCl, etc. Can be used as a light source. In general, these light sources have an output in the range of 10 W to 5000 W, but in the present embodiment, a range of 100 W to 1000 W is sufficient.
Thereafter, a liquid material is further discharged and disposed on the deposit on the connection terminal 14. Since the deposit on the connection terminal 14 is in a dry state, the height can be increased without spreading even if a liquid material is placed thereon.

そして、以上の液滴吐出工程と、乾燥工程とを複数回繰り返すことで、所定高さの導電性微粒子の堆積物を得ることができる。その後、かかる堆積物を一括して焼成することで、所定高さの導体ポスト３８を得ることができる。この焼成工程には、加熱処理や光照射処理が適用でき、例えば１５０℃のホットプレートで３０分程度加熱する方法を用いることができる。導体ポスト３８の高さが１０〜２０μｍ程度である場合、上記液滴吐出工程と乾燥工程とを５〜１０回程度繰り返して行うことで、相当高さの堆積物を形成することができ、かかる堆積物を焼成することで前記高さの導体ポスト３８を得ることができる。   And the deposit of the conductive fine particle of predetermined height can be obtained by repeating the above droplet discharge process and a drying process in multiple times. Thereafter, the deposits are fired in a lump to obtain a conductor post 38 having a predetermined height. For this baking step, heat treatment or light irradiation treatment can be applied, and for example, a method of heating for about 30 minutes with a hot plate at 150 ° C. can be used. When the height of the conductor post 38 is about 10 to 20 μm, it is possible to form a deposit having a considerably high height by repeating the droplet discharge step and the drying step about 5 to 10 times. The conductor post 38 having the height can be obtained by firing the deposit.

上記焼成工程における加熱処理及び／又は光照射処理は通常大気中で行われるが、必要に応じて、窒素、アルゴン、ヘリウムなどの不活性ガス雰囲気中で行うこともできる。熱処理及び／又は光処理の処理温度は、分散媒の沸点（蒸気圧）、雰囲気ガスの種類や圧力、微粒子の分散性や酸化性等の熱的挙動、金属有機塩の熱および化学的な分解挙動、さらには基材の耐熱温度等を考慮して適宜決定される。   The heat treatment and / or light irradiation treatment in the baking step is usually performed in the air, but can be performed in an inert gas atmosphere such as nitrogen, argon, helium, etc., if necessary. The heat treatment and / or light treatment temperatures are the boiling point (vapor pressure) of the dispersion medium, the type and pressure of the atmospheric gas, the thermal behavior such as the dispersibility and oxidation of the fine particles, the heat and chemical decomposition of the metal organic salt. It is appropriately determined in consideration of the behavior and the heat-resistant temperature of the substrate.

なお、図２に示したように、回路基板２０上にパッド２４が形成され、係るパッド２４に対して接続配線３４を接続してチップ部品１０を実装する構成である場合には、上記導体ポスト３８を形成する工程で、回路基板上のパッド２４上にも吐出ヘッド３０１を用いて液体材料を配置するようにすれば、導体ポスト３８の形成と同時に導体ポスト３９を形成することができる。   As shown in FIG. 2, when the pad 24 is formed on the circuit board 20 and the connection wiring 34 is connected to the pad 24 and the chip component 10 is mounted, the conductor post If the liquid material is also disposed on the pad 24 on the circuit board using the discharge head 301 in the step of forming the substrate 38, the conductor post 39 can be formed simultaneously with the formation of the conductor post 38.

＜スロープ材形成工程＞
次に、図３（ｃ）に示すように、チップ部品１０の側面部に当接するスロープ材３０を形成する。このスロープ材３０は、例えばポリイミド樹脂、シリコーン変性ポリイミド樹脂、エポキシ樹脂、シリコーン変性エポキシ樹脂、ベンゾシクロブテン（ＢＣＢ；benzocyclobutene）、ポリベンゾオキサゾール（ＰＢＯ；polybenzoxazole）等の樹脂材料を、ディスペンサ等の液体材料塗布手段を用いて回路基板２０上に塗布することで形成することができる。あるいは、ドライフィルムを固着することにより形成してもよい。スロープ材３０は、図示のように、チップ部品１０の側面から外側に向かって薄くなるように形成し、その表面に傾斜面を形成する。本実施形態の場合、接続端子１４上に導体ポスト３８が立設されているので、図示のようにスロープ材３０の一部がチップ部品１０の能動面１２に乗り上げたとしても、導体ポスト３８の先端部はスロープ材３０の表面から露出するようになっている。 <Slope material formation process>
Next, as shown in FIG. 3C, a slope material 30 that contacts the side surface portion of the chip component 10 is formed. The slope material 30 is made of a resin material such as a polyimide resin, a silicone-modified polyimide resin, an epoxy resin, a silicone-modified epoxy resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or a liquid such as a dispenser. It can form by apply | coating on the circuit board 20 using a material application | coating means. Or you may form by sticking a dry film. As shown in the figure, the slope member 30 is formed so as to become thinner from the side surface of the chip component 10 toward the outside, and an inclined surface is formed on the surface thereof. In the case of this embodiment, since the conductor post 38 is erected on the connection terminal 14, even if a part of the slope member 30 rides on the active surface 12 of the chip component 10 as shown in the drawing, The leading end is exposed from the surface of the slope member 30.

＜接続配線形成工程＞
次に、図３（ｄ）に示すように、チップ部品１０と回路基板２０とを導電接続する接続配線３４を形成する。接続配線３４は、スロープ材３０の表面に露出した導体ポスト３８から、スロープ材３０の斜面上を通って配線パターン２２上に至るように形成する。本実施形態では、この接続配線３４の形成に際して、導電性微粒子を媒質に分散させた液体材料を吐出ヘッドにより選択配置する液滴吐出法を用いる。 <Connection wiring formation process>
Next, as shown in FIG. 3D, connection wiring 34 for conductively connecting the chip component 10 and the circuit board 20 is formed. The connection wiring 34 is formed so as to reach the wiring pattern 22 from the conductor post 38 exposed on the surface of the slope material 30 through the slope of the slope material 30. In the present embodiment, when the connection wiring 34 is formed, a droplet discharge method is used in which a liquid material in which conductive fine particles are dispersed in a medium is selectively arranged by an discharge head.

液滴吐出装置ＩＪを用いて接続配線３４を形成するには、吐出ヘッド３０１とチップ部品１０と回路基板２０とを、所定の位置関係となるように配置する。位置合わせに際しては、スロープ材３０の表面に露出した導体ポスト３８を位置合わせ基準として用いることができる。
次いで、吐出ヘッド３０１と回路基板２０とを相対的に移動させつつ所定のタイミングでノズル３２５から液体材料を吐出することで、導体ポスト３８と配線パターン２２とを接続するように線状に液体材料を配置する。このとき、図３（ｄ）に示すように、導体ポスト３８から配線パターン２２に至る経路の全体にスロープ材３０が形成されていれば、その経路上での液体材料の濡れ性が均一になるので、液体材料の不要な濡れ広がりやバルジ（液溜まり）の発生を良好に防止できるという効果が得られる。
また、上記液体材料の吐出を複数回繰り返して行えば、所定厚さの導電層が積層された構造の接続配線３４を形成することができる。 In order to form the connection wiring 34 using the droplet discharge device IJ, the discharge head 301, the chip component 10, and the circuit board 20 are arranged in a predetermined positional relationship. In alignment, the conductor post 38 exposed on the surface of the slope member 30 can be used as an alignment reference.
Next, the liquid material is discharged from the nozzle 325 at a predetermined timing while relatively moving the discharge head 301 and the circuit board 20, so that the liquid material is linearly connected so as to connect the conductor post 38 and the wiring pattern 22. Place. At this time, as shown in FIG. 3D, if the slope member 30 is formed on the entire path from the conductor post 38 to the wiring pattern 22, the wettability of the liquid material on the path becomes uniform. Therefore, it is possible to effectively prevent the occurrence of unnecessary wetting and spreading of the liquid material and bulge (liquid pool).
Further, if the liquid material is repeatedly discharged a plurality of times, the connection wiring 34 having a structure in which conductive layers having a predetermined thickness are stacked can be formed.

吐出ヘッド３０１を用いて液体材料を配置したならば、回路基板２０上に配された液体材料に含まれる分散媒の除去を目的として乾燥処理を行う。乾燥処理方法は、先の導体ポスト３８の形成工程と同様の乾燥処理でよい。   If the liquid material is disposed using the ejection head 301, a drying process is performed for the purpose of removing the dispersion medium contained in the liquid material disposed on the circuit board 20. The drying treatment method may be the same drying treatment as that of the previous conductor post 38 forming step.

上記乾燥処理に続いて、回路基板２０上の導電性微粒子の堆積物の導電性を向上させることを目的として、加熱処理又は光照射処理による焼成工程を実施する。この焼成工程により、分散媒の除去がより確実に成される。また前記乾燥体に金属有機塩が含まれている場合、熱分解により金属に変成することができる。さらに、導電性微粒子がコーティング材に覆われている場合、その除去も行うことができる。   Subsequent to the drying treatment, a firing step by heat treatment or light irradiation treatment is performed for the purpose of improving the conductivity of the conductive fine particle deposit on the circuit board 20. By this firing step, the dispersion medium is more reliably removed. Further, when a metal organic salt is contained in the dried body, it can be transformed into a metal by thermal decomposition. Further, when the conductive fine particles are covered with the coating material, the removal can also be performed.

また、この焼成工程によって、回路基板２０上に既設の導体ポスト３８と接続配線３４との結合も強固なものとなり、優れた接続信頼性を得ることができる。さらに、この焼成工程により、導体ポスト３８に含まれる分散媒のより確実な除去が成されるとともに、導体ポスト３８を構成する導電性微粒子がより強固に結合され、良好な導電性と強度とを具備した導体ポストを得ることができる。   In addition, this firing step also strengthens the connection between the conductor post 38 and the connection wiring 34 that are already provided on the circuit board 20, so that excellent connection reliability can be obtained. Furthermore, this firing step makes it possible to more surely remove the dispersion medium contained in the conductor post 38, and the conductive fine particles constituting the conductor post 38 are more firmly bonded, resulting in good conductivity and strength. The provided conductor post can be obtained.

＜外部端子形成工程＞
次に、図３（ｅ）に示すように、回路基板２０の裏面側に露出された導体パターン２８に対して、鉛フリーはんだ等のろう材を用いて外部接続端子３６を形成する。この外部接続端子３６は、フローはんだ付け法等の公知のはんだ付け法を用いて形成することができる。 <External terminal formation process>
Next, as shown in FIG. 3E, external connection terminals 36 are formed on the conductor pattern 28 exposed on the back side of the circuit board 20 using a brazing material such as lead-free solder. The external connection terminal 36 can be formed using a known soldering method such as a flow soldering method.

以上の工程により、チップ部品１０を回路基板２０上に実装することができる。なお、実装したチップ部品１０上にはトランスファ・モールドやポッティングによって封止材を形成してもよい。   Through the above steps, the chip component 10 can be mounted on the circuit board 20. Note that a sealing material may be formed on the mounted chip component 10 by transfer molding or potting.

本実施の形態によれば、スロープ材３０の形成に先立って、接続端子１４上に液滴吐出法を用いて導体ポスト３８を形成しているので、スロープ材形成工程で液体樹脂材料がチップ部品１０の能動面１２上に塗布されて接続端子１４が前記液体樹脂材料に覆われたとしても、導体ポスト３８の一部をスロープ材３０表面に露出させることができ、かかる導体ポスト３８を介して接続配線３４と接続端子１４とを電気的に接続できる。したがって、スロープ材３０の塗布位置にばらつきが生じた場合にもチップ部品１０の実装を確実に行うことができ、高歩留まりにチップ部品１０の実装を行うことができる。   According to the present embodiment, the conductor post 38 is formed on the connection terminal 14 using the droplet discharge method prior to the formation of the slope member 30, so that the liquid resin material is a chip component in the slope member forming step. 10, even if the connection terminal 14 is covered with the liquid resin material, a part of the conductor post 38 can be exposed to the surface of the slope member 30, and the conductor post 38 is interposed through the conductor post 38. The connection wiring 34 and the connection terminal 14 can be electrically connected. Therefore, even when the application position of the slope material 30 varies, the chip component 10 can be reliably mounted, and the chip component 10 can be mounted with a high yield.

また、スロープ材３０により接続端子１４が覆われていても導体ポスト３８により接続配線３４との電気的接続を行えることから、スロープ材３０の一部を意図的に能動面１２上に塗布し、導体ポスト３８から配線パターン２２に至る経路の全体に渡ってスロープ材３０が延在するようにしてもよい。このようにすれば、接続配線３４をスロープ材３０の表面のみに形成することができるため、接続配線３４が形成される表面の特性（撥液／親液性）が一様なものとなり、線状に配置された接続配線形成用の液体材料にバルジや短絡が生じるのを防止できる。   Further, even if the connection terminal 14 is covered with the slope material 30, the conductor post 38 can be electrically connected to the connection wiring 34, so that a part of the slope material 30 is intentionally applied on the active surface 12, The slope member 30 may extend over the entire path from the conductor post 38 to the wiring pattern 22. In this way, since the connection wiring 34 can be formed only on the surface of the slope member 30, the surface characteristics (liquid repellency / lyophilicity) on which the connection wiring 34 is formed become uniform. It is possible to prevent a bulge or a short circuit from occurring in the liquid material for forming the connection wiring arranged in a shape.

具体例を挙げると、チップ部品１０の表面には窒化シリコンやポリイミド等からなるパッシべーション膜が形成されているので、何ら表面特性の制御を行わないままに接続配線形成用の液体材料を塗布すると、前記液体材料が能動面１２上で濡れ広がってしまい、接続端子１４同士を短絡させることがある。そこで、上記のようにスロープ材３０を能動面１２上に乗り上げるように形成しておくことで、パッシべーション膜の表面に前記液体材料が塗布されることが無くなるため、スロープ材３０の表面特性を適切に制御するのみで接続配線３４を正確な位置に正確な形状で形成できるようになる。   As a specific example, since a passivation film made of silicon nitride, polyimide, or the like is formed on the surface of the chip component 10, a liquid material for forming a connection wiring is applied without performing any surface property control. Then, the liquid material wets and spreads on the active surface 12, and the connection terminals 14 may be short-circuited. Therefore, by forming the slope member 30 so as to run on the active surface 12 as described above, the liquid material is not applied to the surface of the passivation film. The connection wiring 34 can be formed at an accurate position and in an accurate shape only by appropriately controlling the above.

また、接続端子１４と配線パターン２２とを電気的に接続する接続配線３４を液滴吐出法を用いて形成しているので、ワイヤボンディングやフェースダウンボンディングで行われるような超音波振動の付与や加圧を避けることができる。したがって、基板２０に対する耐熱性の要求を減らし、チップ部品１０のストレスの発生を減らすことができる。
また接続配線３４は、チップ部品１０及びスロープ材３０の表面に密着した状態で形成されるので、ワイヤボンディングのようにワイヤを引き回す空間は不要であり、薄型の電子デバイス実装体を得ることができ、係る電子デバイス実装体によれば、これを備える電子機器の薄型化、小型化に寄与し得るものとなる。また、基板２０として汎用基板を使用し、チップ部品１０の構成（接続端子１４の配列等）に応じて接続配線３４を引き回すこともできる。 In addition, since the connection wiring 34 that electrically connects the connection terminal 14 and the wiring pattern 22 is formed using a droplet discharge method, the application of ultrasonic vibration as performed by wire bonding or face-down bonding is possible. Pressurization can be avoided. Therefore, the heat resistance requirement for the substrate 20 can be reduced, and the occurrence of stress on the chip component 10 can be reduced.
Further, since the connection wiring 34 is formed in close contact with the surface of the chip component 10 and the slope member 30, a space for drawing the wire as in the case of wire bonding is unnecessary, and a thin electronic device mounting body can be obtained. According to the electronic device mounting body, the electronic device equipped with the electronic device mounting body can contribute to the reduction in thickness and size. Further, a general-purpose substrate can be used as the substrate 20, and the connection wiring 34 can be routed according to the configuration of the chip component 10 (such as the arrangement of the connection terminals 14).

（第２の実施形態）
次に、図５を参照して本発明の第２の実施形態について説明する。図５は、本実施形態の電子デバイスの実装方法を説明するための回路基板の断面構成図である。 (Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a cross-sectional configuration diagram of a circuit board for explaining the electronic device mounting method of the present embodiment.

本実施形態の実装方法により電子デバイスの実装を行うには、まず、図５（ａ）に示すように、表面に接着性を付与されたダミー基板５１上に、チップ部品（電子デバイス）６１〜６３を接着固定する。チップ部品６１は、例えば半導体集積回路等の能動部品であり、ダミー基板５１側の面に、接続端子６１ａ、６１ｂと、これらの接続端子に対応する開口を有するパッシべーション膜６１ｃとが形成されたものとなっている。また、チップ部品６２，６３は、例えば抵抗器やキャパシタ等の受動部品であり、それぞれダミー基板５１側の面に、接続端子６２ａ、６２ｂ、及び接続端子６３ａ、６３ｂが設けられた構成を備えている。すなわち、チップ部品６１〜６３は、いずれもその端子形成面をダミー基板５１側に向けて載置されている。   In order to mount an electronic device by the mounting method of the present embodiment, first, as shown in FIG. 5A, a chip component (electronic device) 61-61 is placed on a dummy substrate 51 having an adhesive property on the surface. 63 is bonded and fixed. The chip component 61 is an active component such as a semiconductor integrated circuit, for example. On the surface of the dummy substrate 51, connection terminals 61a and 61b and a passivation film 61c having openings corresponding to these connection terminals are formed. It has become. The chip components 62 and 63 are passive components such as resistors and capacitors, for example, and have a configuration in which connection terminals 62a and 62b and connection terminals 63a and 63b are provided on the surface of the dummy substrate 51, respectively. Yes. That is, each of the chip components 61 to 63 is placed with the terminal formation surface facing the dummy substrate 51 side.

次に、図５（ｂ）に示すように、チップ部品６１〜６３を覆うようにダミー基板５１上に樹脂材料を塗布し、チップ部品６１〜６３が封止された封止体５２を形成する。このチップ部品６１〜６３の封止には、例えばエポキシ樹脂等の樹脂材料を好適に用いることができる。   Next, as illustrated in FIG. 5B, a resin material is applied on the dummy substrate 51 so as to cover the chip components 61 to 63, thereby forming a sealing body 52 in which the chip components 61 to 63 are sealed. . For sealing the chip components 61 to 63, for example, a resin material such as an epoxy resin can be suitably used.

次に、図５（ｃ）に示すように、封止体５２からダミー基板５１を除去し、封止体５２の一面側（図５（ｃ）上面側）に、チップ部品６１〜６３の端子形成面を露出させる。これにより、ダミー基板５１により保護されていた各チップ部品の接続端子６１ａ、６１ｂ、６２ａ、６２ｂ、６３ａ、６３ｂが露出される。   Next, as shown in FIG. 5C, the dummy substrate 51 is removed from the sealing body 52, and the terminals of the chip components 61 to 63 are provided on one surface side (upper surface side in FIG. 5C) of the sealing body 52. Expose the forming surface. As a result, the connection terminals 61a, 61b, 62a, 62b, 63a, 63b of each chip component protected by the dummy substrate 51 are exposed.

次に、図５（ｄ）に示すように、各接続端子６１ａ、６１ｂ、６２ａ、６２ｂ、６３ａ、６３ｂ上に、液滴吐出法を用いて導体ポスト８１〜８６を立設する。これらの導体ポスト８１〜８６の形成方法は、先の実施形態で図３（ｂ）を参照して説明した導体ポスト３８の形成工程と同様である。導体ポスト８１〜８６の高さは、チップ部品６１〜６３の構成等に応じて適宜変更することができる。
次いで、封止体５２の表面に、絶縁膜７１を形成する。絶縁膜７１は、例えば熱硬化性のエポキシ系樹脂と光硬化性のアクリル系樹脂との混合材料等の樹脂材料からなる有機絶縁膜、あるいは酸化シリコン等からなる無機絶縁膜であり、液滴吐出法を用いて形成することが好ましい。すなわち、絶縁膜７１の形成材料として例えば硬化前の樹脂材料を吐出ヘッドにより封止体５２表面に吐出配置することで形成することが好ましい。
チップ部品６１〜６３の各接続端子上には、導体ポスト８１〜８６が立設されているので、絶縁膜７１を形成した後にも、導体ポスト８１〜８６の先端側の一部が絶縁膜７１上に露出した状態となる。 Next, as shown in FIG. 5D, conductor posts 81 to 86 are erected on the connection terminals 61a, 61b, 62a, 62b, 63a, and 63b by using a droplet discharge method. The formation method of these conductor posts 81-86 is the same as that of the formation process of the conductor post 38 demonstrated with reference to FIG.3 (b) by previous embodiment. The height of the conductor posts 81 to 86 can be appropriately changed according to the configuration of the chip components 61 to 63.
Next, an insulating film 71 is formed on the surface of the sealing body 52. The insulating film 71 is an organic insulating film made of a resin material such as a mixed material of a thermosetting epoxy resin and a photocurable acrylic resin, or an inorganic insulating film made of silicon oxide, for example. It is preferable to form it using a method. That is, it is preferable to form the insulating film 71 by, for example, discharging and arranging a resin material before curing on the surface of the sealing body 52 by the discharge head.
Since the conductor posts 81 to 86 are erected on the connection terminals of the chip components 61 to 63, even after the insulating film 71 is formed, a part of the tip side of the conductor posts 81 to 86 is part of the insulating film 71. It will be exposed above.

次に、図５（ｅ）に示すように、絶縁膜７１上に、液滴吐出法を用いて接続配線１０１〜１０４を形成する。接続配線１０１〜１０４の形成方法は、先の実施形態で図３（ｄ）を参照して説明した接続配線３４の形成工程と同様である。本実施形態の場合、封止体５２の表面に形成された絶縁膜７１上にのみ接続配線１０１〜１０４を形成するので、これらの接続配線が形成される表面の状態は封止体５２上で一様であり、接続配線１０１〜１０４を形成するために絶縁膜７１上に配置された液体材料が過度に濡れ広がったり、断線したりするのを容易に防止できるようになっている。また、封止体５２の表面が絶縁膜７１によって平坦化されている点も、接続配線１０１〜１０４を正確な位置に正確な形状で形成するのに有利である。   Next, as shown in FIG. 5E, connection wirings 101 to 104 are formed on the insulating film 71 by using a droplet discharge method. The formation method of the connection wirings 101 to 104 is the same as the formation process of the connection wiring 34 described with reference to FIG. In the case of this embodiment, since the connection wirings 101 to 104 are formed only on the insulating film 71 formed on the surface of the sealing body 52, the surface state on which these connection wirings are formed is on the sealing body 52. It is uniform, and it is possible to easily prevent the liquid material disposed on the insulating film 71 to form the connection wirings 101 to 104 from excessively spreading or disconnecting. In addition, the fact that the surface of the sealing body 52 is flattened by the insulating film 71 is advantageous for forming the connection wirings 101 to 104 in accurate positions and in accurate shapes.

このように、本実施形態の実装方法によれば、チップ部品６１〜６３の接続端子６１ａ、６１ｂ、６２ａ、６２ｂ、６３ａ、６３ｂに対して電気的に接続される接続配線１０１〜１０４を形成するに先立って、上記接続端子６１ａ、６１ｂ、６２ａ、６２ｂ、６３ａ、６３ｂ上に導体ポスト８１〜８６を立設するようになっているので、封止体５２の表面に絶縁膜７１を形成することができる。これによりチップ部品６１〜６３の端子形成面を保護することができるとともに、接続配線１０１〜１０４を形成する面の平坦化及び表面特性の均一化を行うことができる。
したがって本実施形態の実装方法によれば、チップ部品の接続端子に対して優れた接続信頼性をもって接続配線を接続することができ、高信頼性の回路基板を得ることができる。 As described above, according to the mounting method of this embodiment, the connection wirings 101 to 104 that are electrically connected to the connection terminals 61a, 61b, 62a, 62b, 63a, and 63b of the chip components 61 to 63 are formed. Prior to this, since the conductor posts 81-86 are erected on the connection terminals 61a, 61b, 62a, 62b, 63a, 63b, the insulating film 71 is formed on the surface of the sealing body 52. Can do. As a result, the terminal forming surfaces of the chip components 61 to 63 can be protected, and the surfaces on which the connection wirings 101 to 104 are formed can be flattened and the surface characteristics can be made uniform.
Therefore, according to the mounting method of this embodiment, the connection wiring can be connected to the connection terminals of the chip component with excellent connection reliability, and a highly reliable circuit board can be obtained.

また本実施形態の回路基板では、図５（ｅ）に示すように１層の絶縁膜７１を介して接続配線１０１〜１０４が形成された構造のみならず、図５（ｆ）に示すような多層配線構造の回路基板を形成することもできる。この場合、図５（ｅ）に示した工程に続いて、接続配線１０１〜１０３上に導体ポスト８７〜８９を立設した後、接続配線１０１〜１０４を覆うように絶縁膜７２を成膜する。そして、絶縁膜７２上に露出されている導体ポスト８７〜８９に対して接続されるように接続配線１０５〜１０７を形成することで、絶縁膜を介して積層された第２層目の接続配線を形成することができる。   Further, in the circuit board according to the present embodiment, not only the structure in which the connection wirings 101 to 104 are formed through the one-layer insulating film 71 as shown in FIG. 5E but also the structure as shown in FIG. A circuit board having a multilayer wiring structure can also be formed. In this case, following the process shown in FIG. 5E, after the conductor posts 87 to 89 are erected on the connection wirings 101 to 103, the insulating film 72 is formed so as to cover the connection wirings 101 to 104. . Then, the connection wirings 105 to 107 are formed so as to be connected to the conductor posts 87 to 89 exposed on the insulating film 72, so that the second-layer connection wiring stacked via the insulating film is formed. Can be formed.

その後、第２層目の接続配線１０５〜１０７上に導体ポスト９０〜９２を立設し、接続配線１０５〜１０７を覆うように絶縁膜７３を成膜する。そして、絶縁膜７３上に露出されている導体ポスト９０〜９２に対して接続されるように接続配線１０８〜１１０を接続することで、第３層目（最表面）の接続配線を形成することができる。なお、最表面に形成された接続配線１０８〜１１０は、他のチップ部品の接続端子（パッド）として用いることができる。   Thereafter, conductor posts 90 to 92 are erected on the second-layer connection wirings 105 to 107, and an insulating film 73 is formed so as to cover the connection wirings 105 to 107. Then, the connection wirings 108 to 110 are connected so as to be connected to the conductor posts 90 to 92 exposed on the insulating film 73, thereby forming the third layer (outermost surface) connection wiring. Can do. The connection wirings 108 to 110 formed on the outermost surface can be used as connection terminals (pads) for other chip components.

本実施形態では、絶縁膜７１〜７３を介して３層の接続配線１０１〜１１０が積層形成されている構成を例示して説明したが、上記導体ポスト形成工程と、絶縁膜形成工程と、接続配線形成工程とを繰り返すことで、４層以上の積層構造を容易に得られるのは勿論である。   In the present embodiment, the configuration in which the three layers of connection wirings 101 to 110 are stacked and formed via the insulating films 71 to 73 has been described as an example. However, the conductor post forming step, the insulating film forming step, the connection, Of course, it is possible to easily obtain a laminated structure of four or more layers by repeating the wiring forming step.

（電子機器）
図６（ａ）は、本発明に係る電子機器の一例を示す斜視図である。この図に示す携帯電話１３００は、筐体の内部或いは表示部１３０１に、前述の方法を用いて得られる回路基板を備えている。図中、符号１３０２は操作ボタン１３０２、符号１３０３は受話口、符号１３０４は送話口を示している。
図６（ｂ）は、（ａ）に示す表示部１３０１の斜視構成図である。表示部１３０１は、液晶表示装置や有機ＥＬ表示装置からなる表示パネル１３１１の一辺端に、電子デバイス１３１２を実装した回路基板１３１３を接続してなる構成を備えている。そして、この回路基板１３１３には、本発明の実装方法を用いて電子デバイスを実装された回路基板が好適に用いられており、回路基板上に薄型に電子デバイスが実装されているので、携帯電話１３００の薄型化、小型化を実現することができる。 (Electronics)
FIG. 6A is a perspective view showing an example of an electronic apparatus according to the present invention. A cellular phone 1300 shown in this figure includes a circuit board obtained by using the above-described method, in the housing or in the display portion 1301. In the figure, reference numeral 1302 denotes an operation button 1302, reference numeral 1303 denotes a mouthpiece, and reference numeral 1304 denotes a mouthpiece.
FIG. 6B is a perspective configuration diagram of the display unit 1301 shown in FIG. The display unit 1301 has a configuration in which a circuit board 1313 on which an electronic device 1312 is mounted is connected to one end of a display panel 1311 made of a liquid crystal display device or an organic EL display device. The circuit board 1313 is preferably a circuit board on which an electronic device is mounted using the mounting method of the present invention, and the electronic device is mounted thinly on the circuit board. 1300 can be made thinner and smaller.

前記実施の形態の回路基板は、前記携帯電話に限らず、電子ブック、パーソナルコンピュータ、ディジタルスチルカメラ、液晶テレビ、ビューファインダ型あるいはモニタ直視型のビデオテープレコーダ、カーナビゲーション装置、ページャ、電子手帳、電卓、ワードプロセッサ、ワークステーション、テレビ電話、ＰＯＳ端末、タッチパネルを備えた機器等々、種々の電子機器に適用することができる。いずれの電子機器においても、本発明の半導体装置を適用することで、薄型化、小型化を実現することができる。   The circuit board of the embodiment is not limited to the mobile phone, but an electronic book, a personal computer, a digital still camera, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic notebook, The present invention can be applied to various electronic devices such as a calculator, a word processor, a workstation, a video phone, a POS terminal, and a device equipped with a touch panel. In any electronic apparatus, the semiconductor device of the present invention can be applied to achieve a reduction in thickness and size.

第１実施形態に係る回路基板の平面構成図（ａ）及び断面構成図（ｂ）。FIG. 1A is a plan configuration diagram (a) and a cross-sectional configuration diagram (b) of a circuit board according to a first embodiment. 回路基板の他の構成例を示す断面構成図。The cross-sectional block diagram which shows the other structural example of a circuit board. 第１実施形態に係る電子デバイスの実装方法を説明するための工程図。Process drawing for demonstrating the mounting method of the electronic device which concerns on 1st Embodiment. 液滴吐出装置の斜視構成図（ａ）、及び吐出ヘッドの概略図（ｂ）。FIG. 2 is a perspective configuration diagram (a) of a droplet discharge device and a schematic diagram (b) of a discharge head. 第２実施形態に係る電子デバイスの実装方法を説明するための工程図。Process drawing for demonstrating the mounting method of the electronic device which concerns on 2nd Embodiment. 電子機器の一例を示す斜視構成図（ａ）、及び表示部の斜視構成図（ｂ）。The perspective block diagram (a) which shows an example of an electronic device, and the perspective block diagram (b) of a display part.

符号の説明Explanation of symbols

１０ チップ部品（電子デバイス）、１２ 能動面（端子形成面）、１４ 接続端子、２０ 回路基板、２２ 配線パターン、２８ 導体パターン、２９ 接着層、３０ スロープ材、３８，３９ 導体ポスト、５１ ダミー基板、５２ 封止体（回路基板）、６１〜６３ チップ部品（電子デバイス）、６１ａ（６１ｂ、６２ａ、６２ｂ、６３ａ、６３ｂ） 接続端子、７１〜７３ 絶縁膜、８１〜９２ 導体ポスト、１０１〜１１０ 接続配線。   DESCRIPTION OF SYMBOLS 10 Chip components (electronic device), 12 Active surface (terminal formation surface), 14 Connection terminal, 20 Circuit board, 22 Wiring pattern, 28 Conductor pattern, 29 Adhesive layer, 30 Slope material, 38, 39 Conductor post, 51 Dummy substrate , 52 Sealed body (circuit board), 61-63 Chip component (electronic device), 61a (61b, 62a, 62b, 63a, 63b) Connection terminal, 71-73 Insulating film, 81-92 Conductor post, 101-110 Connection wiring.

Claims (10)

接続端子を具備した電子デバイスを基板上に実装する方法であって、
前記接続端子が設けられた端子形成面を前記基板と反対側に向けて前記電子デバイスを前記基板上に配置する工程と、
前記基板上に配置した前記電子デバイスの接続端子上に、液相法を用いて導体ポストを立設する導体ポスト形成工程と、
前記基板上に、前記導体ポストに対して接続される接続配線を液相法を用いて形成する接続配線形成工程と
を含むことを特徴とする電子デバイスの実装方法。 A method of mounting an electronic device having a connection terminal on a substrate,
Placing the electronic device on the substrate with the terminal forming surface provided with the connection terminal facing away from the substrate;
A conductor post forming step of standing a conductor post using a liquid phase method on the connection terminal of the electronic device disposed on the substrate;
A method for mounting an electronic device, comprising: forming a connection wiring to be connected to the conductor post on the substrate using a liquid phase method. 前記導体ポスト形成工程が、
前記接続端子に対して前記導体ポストを形成するための液体材料を吐出ヘッドにより吐出配置する液体材料配置工程と、
前記接続端子上に配された液体材料を乾燥処理する乾燥工程と、を含み、
前記液体材料配置工程と前記乾燥工程とを繰り返すことで、所定突出高さの前記導体ポストを形成する工程であることを特徴とする請求項１に記載の電子デバイスの実装方法。 The conductor post forming step includes
A liquid material disposing step of ejecting and disposing a liquid material for forming the conductor post with respect to the connection terminal by an ejection head;
A drying step of drying the liquid material disposed on the connection terminal,
2. The electronic device mounting method according to claim 1, wherein the conductor post having a predetermined protruding height is formed by repeating the liquid material arranging step and the drying step. 前記基板上に配置された電子デバイスの側面部に、前記端子形成面と前記基板の実装面との段差を緩和するスロープ材を形成するスロープ材形成工程と、
前記導体ポスト及び／又は前記接続端子から、前記スロープ材の表面を経て前記基板表面に至る接続配線を液相法を用いて形成する接続配線形成工程と、
を含むことを特徴とする請求項１又は２に記載の電子デバイスの実装方法。 A slope material forming step of forming a slope material that relaxes a step between the terminal forming surface and the mounting surface of the substrate on a side surface portion of the electronic device disposed on the substrate;
A connection wiring formation step of forming a connection wiring from the conductor post and / or the connection terminal through the surface of the slope material to the substrate surface using a liquid phase method;
The electronic device mounting method according to claim 1, wherein the electronic device mounting method comprises: 前記基板として、配線パターンを有する基板を用い、
前記接続配線を介して前記導体ポストと前記配線パターンとを電気的に接続することを特徴とする請求項１から３のいずれか１項に記載の電子デバイスの実装方法。 As the substrate, using a substrate having a wiring pattern,
4. The electronic device mounting method according to claim 1, wherein the conductor post and the wiring pattern are electrically connected via the connection wiring. 5. 前記基板として、前記配線パターンに導電接続されたパッドを有する基板を用い、
前記導体ポスト形成工程において、前記基板のパッド上にも前記導体ポストを立設することを特徴とする請求項４に記載の電子デバイスの実装方法。 A substrate having a pad conductively connected to the wiring pattern is used as the substrate.
5. The electronic device mounting method according to claim 4, wherein, in the conductor post forming step, the conductor post is also erected on a pad of the substrate. 前記基板上に電子デバイスを配置するに際して、
ダミー基板に対して前記端子形成面を対向させた状態で前記電子デバイスを載置する工程と、
前記電子デバイスを覆う樹脂材料を前記ダミー基板上に配して封止体を形成する工程と、
前記ダミー基板を除去して前記封止体表面に前記電子デバイスの端子形成面を露出させる工程と
を行うことを特徴とする請求項１又は２に記載の電子デバイスの実装方法。 When placing an electronic device on the substrate,
Placing the electronic device in a state where the terminal formation surface is opposed to a dummy substrate;
Arranging a resin material covering the electronic device on the dummy substrate to form a sealing body;
The method for mounting an electronic device according to claim 1, wherein the dummy substrate is removed to expose a terminal forming surface of the electronic device on the surface of the sealing body. 前記導体ポスト形成工程と接続配線形成工程との間に、前記導体ポストの一部を露出させた状態で前記電子デバイスの表面を含む基板表面に絶縁層を形成する工程を有することを特徴とする請求項６に記載の電子デバイスの実装方法。   Between the conductor post forming step and the connection wiring forming step, a step of forming an insulating layer on the substrate surface including the surface of the electronic device with a part of the conductor post exposed is provided. The electronic device mounting method according to claim 6. 接続端子を有する電子デバイスを基板上に実装してなる回路基板であって、
前記電子デバイスの接続端子上に、液相法により形成された導体ポストが設けられ、該導体ポストに対して、液相法により形成された接続配線が接続されていることを特徴とする回路基板。 A circuit board obtained by mounting an electronic device having a connection terminal on a board,
A circuit board characterized in that a conductor post formed by a liquid phase method is provided on a connection terminal of the electronic device, and a connection wiring formed by a liquid phase method is connected to the conductor post. . 請求項１から７のいずれか１項に記載の実装方法を用いて得られたことを特徴とする回路基板。   A circuit board obtained by using the mounting method according to claim 1. 請求項８又は９に記載の回路基板を具備したことを特徴とする電子機器。   An electronic apparatus comprising the circuit board according to claim 8.
JP2004327712A 2004-11-11 2004-11-11 Mounting method of electronic device, circuit board, and electronic equipment Withdrawn JP2006140270A (en)

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008021843A (en) * 2006-07-13 2008-01-31 Seiko Epson Corp Method of manufacturing wiring circuit and multilayer wiring circuit board
CN102316676A (en) * 2010-07-07 2012-01-11 三星电机株式会社 Electronic component module and manufacturing approach thereof
JP2014003176A (en) * 2012-06-19 2014-01-09 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method of the same

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008021843A (en) * 2006-07-13 2008-01-31 Seiko Epson Corp Method of manufacturing wiring circuit and multilayer wiring circuit board
CN102316676A (en) * 2010-07-07 2012-01-11 三星电机株式会社 Electronic component module and manufacturing approach thereof
JP2012019192A (en) * 2010-07-07 2012-01-26 Samsung Electro-Mechanics Co Ltd Electronic component module and method of manufacturing the same
JP2014003176A (en) * 2012-06-19 2014-01-09 Fuji Mach Mfg Co Ltd Semiconductor package and manufacturing method of the same

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