JP2006135236A - Packaging method of electronic device, circuit board, and electronic equipment - Google Patents

Packaging method of electronic device, circuit board, and electronic equipment Download PDF

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Publication number
JP2006135236A
JP2006135236A JP2004325074A JP2004325074A JP2006135236A JP 2006135236 A JP2006135236 A JP 2006135236A JP 2004325074 A JP2004325074 A JP 2004325074A JP 2004325074 A JP2004325074 A JP 2004325074A JP 2006135236 A JP2006135236 A JP 2006135236A
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Japan
Prior art keywords
electronic device
conductive layer
forming
connection
wiring
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JP2004325074A
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Japanese (ja)
Inventor
Hirofumi Kurosawa
弘文 黒沢
Yoshitomo Hagio
義知 萩尾
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Seiko Epson Corp
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Seiko Epson Corp
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Priority to JP2004325074A priority Critical patent/JP2006135236A/en
Publication of JP2006135236A publication Critical patent/JP2006135236A/en
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    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19041—Component type being a capacitor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19042—Component type being an inductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/1901—Structure
    • H01L2924/1904—Component type
    • H01L2924/19043—Component type being a resistor

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a packaging method of an electronic device that can accurately align a discharge head, a wiring pattern on a substrate, and a connection terminal of the electronic device when using a droplet discharge method for forming connection wiring, and can achieve a reliable packaging structure by reliable connection wiring obtained by the accurate alignment. <P>SOLUTION: When the connection wiring, which electrically connects the connection terminal 14 of a chip component 10 to a wiring pattern 22 on the circuit board 20, is formed by the droplet discharge method: the discharge head 301 is aligned with the connection terminal 14 as a reference for form a first conductive layer 341; alignment marks 151, 152 are formed on the chip component 10 by a liquid material; the discharge head 301 is aligned with the alignment marks 151, 152 as a reference; and a second conductive layer is laminated onto a first one 341 further by selectively arranging the liquid material for forming the connection wiring. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

本発明は、電子デバイスの実装方法、回路基板、及び電子機器に関するものである。   The present invention relates to an electronic device mounting method, a circuit board, and an electronic apparatus.

近年、電子機器の薄型化、軽量化の傾向が顕著であり、カードサイズの電子機器はその代表的なものである。そしてそれに伴い、電子機器に実装される各種電子デバイスも基板上に薄く実装することが求められている。シリコン半導体ＩＣを例に採れば、ウエハの状態で裏面を削り、厚さ５０μｍ以下のＩＣチップ（電子デバイス）を形成することが可能である。しかしその一方で、このように薄層化した電子デバイスは実装時に損傷しやすくなるため、基板への実装が困難なものとなる。   In recent years, there has been a tendency for electronic devices to be thinner and lighter, and card-sized electronic devices are typical. Accordingly, various electronic devices mounted on electronic devices are also required to be thinly mounted on a substrate. Taking a silicon semiconductor IC as an example, it is possible to form an IC chip (electronic device) having a thickness of 50 μm or less by scraping the back surface in the state of a wafer. However, on the other hand, the electronic device thinned in this way is easily damaged during mounting, which makes it difficult to mount it on a substrate.

そこで最近では、このような電子デバイスの実装に際して、その接続配線の形成に液相法を用いることが提案されている（特許文献１参照）。このような配線形成方法によれば、電子デバイスに接続する配線を形成する際に圧力や超音波振動を印加する必要が無く、またワイヤを引き回す空間も不要であるため、高信頼性かつ薄型の回路基板を製造することが可能である。
特開２００４−２８１５３９号公報 Therefore, recently, it has been proposed to use a liquid phase method for forming the connection wiring when mounting such an electronic device (see Patent Document 1). According to such a wiring formation method, there is no need to apply pressure or ultrasonic vibration when forming a wiring to be connected to an electronic device, and a space for routing the wire is not required. It is possible to manufacture a circuit board.
JP 2004-281539 A

ところで、上記特許文献１に記載の液相法を用いた配線形成においては、複数の吐出ノズルを具備した吐出ヘッドから液体材料を吐出することで複数の接続配線を形成することが工程の効率上好ましい。しかし、このような配線形成方法を採用するには、電子デバイスの接続端子、基板上の配線パターン、及び吐出ヘッドのノズルが互いに正確に位置合わせされた状態で接続配線を形成する必要がある。   By the way, in the wiring formation using the liquid phase method described in Patent Document 1, it is necessary to form a plurality of connection wirings by discharging a liquid material from a discharge head provided with a plurality of discharge nozzles. preferable. However, in order to employ such a wiring formation method, it is necessary to form the connection wiring in a state where the connection terminals of the electronic device, the wiring pattern on the substrate, and the nozzles of the ejection head are accurately aligned with each other.

本発明は、上記事情に鑑み成されたものであって、液滴吐出法を用いて接続配線を形成する際に、吐出ヘッドと、基板上の配線パターンと、電子デバイスの接続端子とを正確に位置合わせすることができ、これにより得られる信頼性に優れた接続配線によって高信頼性の実装構造を実現し得る電子デバイスの実装方法を提供することを目的としている。   The present invention has been made in view of the above circumstances, and when forming a connection wiring by using a droplet discharge method, an ejection head, a wiring pattern on a substrate, and a connection terminal of an electronic device are accurately connected. It is an object of the present invention to provide a mounting method of an electronic device that can realize a highly reliable mounting structure by using a connection wiring having excellent reliability.

本発明の電子デバイスの実装方法は、上記課題を解決するために、接続端子を具備した電子デバイスを、配線パターンを有する基板に実装する際に、前記接続端子と前記配線パターンとを電気的に接続する接続配線を、吐出ヘッドから接続配線形成用の液体材料を吐出する液滴吐出法により形成する電子デバイスの実装方法であって、前記接続配線を形成する工程が、前記接続端子を基準にして前記吐出ヘッドの位置合わせを行う第１の位置調整工程と、前記電子デバイス及び前記基板上に前記液体材料を選択配置することで、前記接続端子と前記配線パターンとの間を接続する第１導電層を形成する第１導電層形成工程と、前記液体材料を用いて前記電子デバイス上又は前記基板上にアライメントマークを形成するアライメントマーク形成工程と、前記アライメントマークを基準に前記吐出ヘッドの位置合わせを行う第２の位置調整工程と、前記第１導電層上に、前記液体材料を選択配置することで第２導電層を形成する第２導電層形成工程と、を含む工程であることを特徴とする。
この実装方法では、複数の導電層を積層してなる構造を具備した接続配線によって電子デバイスと基板上の配線パターンとを導電接続する場合に、第１導電層を形成する際には、吐出ヘッドと電子デバイスとの位置合わせを電子デバイス上の接続端子を基準として行うが、第２導電層を形成する際の位置合わせでは、第１導電層とともに形成したアライメントマークを基準にして行うようになっている。第２導電層形成工程では、第１の位置調整工程での位置合わせに用いた接続端子上に既に第１導電層が形成されているため、そのまま接続端子を基準に位置合わせを行うと、位置合わせの精度が低下したり、位置合わせ自体が行えないおそれがある。そこで本発明では、第２の位置調整工程で上記アライメントマークを位置合わせ基準に用いることで、係る精度低下等が生じないようにしている。したがって本発明によれば、正確な位置に正確な形状で接続配線を形成することができ、信頼性に優れた実装構造を得ることができる。 In order to solve the above problems, the electronic device mounting method of the present invention electrically connects the connection terminal and the wiring pattern when mounting the electronic device having the connection terminal on a substrate having a wiring pattern. An electronic device mounting method in which a connection wiring to be connected is formed by a droplet discharge method of discharging a liquid material for forming a connection wiring from an ejection head, wherein the step of forming the connection wiring is based on the connection terminal. A first position adjusting step for aligning the ejection head, and a first connecting the connection terminal and the wiring pattern by selectively arranging the liquid material on the electronic device and the substrate. A first conductive layer forming step for forming a conductive layer, and an alignment mark forming for forming an alignment mark on the electronic device or the substrate using the liquid material; And a second position adjusting step for aligning the ejection head with reference to the alignment mark, and a second conductive layer is formed by selectively disposing the liquid material on the first conductive layer. And a step of forming two conductive layers.
In this mounting method, when an electronic device and a wiring pattern on a substrate are conductively connected by a connection wiring having a structure in which a plurality of conductive layers are laminated, an ejection head is formed when the first conductive layer is formed. Is aligned with the connection terminal on the electronic device as a reference, but alignment when forming the second conductive layer is performed with reference to the alignment mark formed together with the first conductive layer. ing. In the second conductive layer forming step, since the first conductive layer has already been formed on the connection terminal used for alignment in the first position adjustment step, if the alignment is performed with reference to the connection terminal as it is, There is a possibility that the accuracy of alignment is lowered or the alignment itself cannot be performed. Therefore, in the present invention, the alignment mark is used as an alignment reference in the second position adjustment process, so that the accuracy degradation or the like does not occur. Therefore, according to the present invention, the connection wiring can be formed at the correct position and with the correct shape, and a mounting structure with excellent reliability can be obtained.

また本発明の電子デバイスの実装方法は、接続端子を具備した電子デバイスを、配線パターンを有する基板に実装する際に、前記接続端子と前記配線パターンとを電気的に接続する接続配線を、吐出ヘッドから接続配線形成用の液体材料を吐出する液滴吐出法により形成する電子デバイスの実装方法であって、前記接続配線を形成する工程が、前記接続端子と前記配線パターンとを結ぶ線に、前記吐出ヘッドの進行方向を一致させるように前記吐出ヘッドの位置合わせを行う第１の位置調整工程と、前記電子デバイス及び前記基板上に前記液体材料を選択配置することで、前記接続端子と前記配線パターンとの間を接続する第１導電層を形成する第１導電層形成工程と、前記液体材料を用いて前記電子デバイス上又は前記基板上にアライメントマークを形成するアライメントマーク形成工程と、前記アライメントマークを基準に前記吐出ヘッドの位置合わせを行う第２の位置調整工程と、前記第１導電層上に、さらに前記液体材料を選択配置することで第２導電層を形成する第２導電層形成工程と、を含む工程であることを特徴とする。
この実装方法によれば、第１の位置調整工程で接続端子とそれに対応する配線パターンとを用いて位置合わせをして第１導電層を形成するようになっているので、基板と電子デバイスとが互いに位置ずれしている場合にも正確に第１導電層を形成できるようになっている。また、第２の位置調整工程では、第１導電層とともに形成したアライメントマークを用いて位置合わせを行うので、第１導電層が形成された後の接続端子や配線パターンを位置合わせ基準に用いる必要が無く、高精度の位置合わせを容易に行うことができる。 In the electronic device mounting method of the present invention, when an electronic device having a connection terminal is mounted on a substrate having a wiring pattern, a connection wiring that electrically connects the connection terminal and the wiring pattern is discharged. A mounting method of an electronic device formed by a droplet discharge method for discharging a liquid material for forming a connection wiring from a head, wherein the step of forming the connection wiring is a line connecting the connection terminal and the wiring pattern, A first position adjusting step for aligning the ejection head so that the traveling direction of the ejection head is aligned; and selectively disposing the liquid material on the electronic device and the substrate; A first conductive layer forming step of forming a first conductive layer connecting between the wiring pattern and the alignment on the electronic device or the substrate using the liquid material; An alignment mark forming step for forming a mark, a second position adjusting step for aligning the ejection head with reference to the alignment mark, and further selectively arranging the liquid material on the first conductive layer. A second conductive layer forming step of forming a second conductive layer.
According to this mounting method, since the first conductive layer is formed by performing alignment using the connection terminal and the corresponding wiring pattern in the first position adjusting step, the substrate, the electronic device, The first conductive layer can be formed accurately even when the two are displaced from each other. In the second position adjustment step, alignment is performed using the alignment mark formed together with the first conductive layer. Therefore, it is necessary to use the connection terminal and the wiring pattern after the first conductive layer is formed as the alignment reference. Therefore, highly accurate alignment can be easily performed.

本発明の電子デバイスの実装方法では、前記第２導電層形成工程の後に、前記第２導電層上にさらに前記液体材料を選択配置することで３層以上の導電層の積層構造を具備した前記接続配線を形成することもできる。この実装方法によれば、所定の積層数で導電層が積層された接続配線を形成することができ、接続配線の信頼性を高め、また配線抵抗の低減を図ることができる。
上記３層目以降の導電層形成工程に先立って行う位置調整工程では、先のアライメントマークを用いて行う。すなわち、第１導電層に対して正確に位置合わせされた状態で形成されたアライメントマークを用いることで、第１導電層上に複数の導電層を正確に積層することができる。 In the electronic device mounting method of the present invention, after the second conductive layer forming step, the liquid material is further selectively disposed on the second conductive layer to provide a laminated structure of three or more conductive layers. Connection wiring can also be formed. According to this mounting method, a connection wiring in which conductive layers are stacked in a predetermined number of layers can be formed, and the reliability of the connection wiring can be improved and the wiring resistance can be reduced.
In the position adjustment step performed prior to the third and subsequent conductive layer forming steps, the alignment mark is used. That is, a plurality of conductive layers can be accurately stacked on the first conductive layer by using alignment marks formed in a state of being accurately aligned with the first conductive layer.

本発明の電子デバイスの実装方法では、辺端部近傍に複数の前記接続端子が配列形成されてなる前記電子デバイスを、前記各接続端子に対応する配線パターンを具備した前記基板に実装するに際して、前記吐出ヘッドとして、所定間隔でノズルが配列形成された吐出ヘッドを用い、前記吐出ヘッドの一走査期間に前記複数のノズルから前記液体材料を吐出することで、複数の前記接続配線を形成することもできる。この実装方法によれば、複数の接続端子と複数の配線パターンとをそれぞれ接続する導電層を、吐出ヘッドの一走査期間で一括に形成することができ、効率よく接続配線を形成することができる。   In the mounting method of the electronic device of the present invention, when mounting the electronic device in which a plurality of the connection terminals are arranged in the vicinity of the side edge portion on the substrate having a wiring pattern corresponding to each connection terminal, A plurality of connection wirings are formed by ejecting the liquid material from the plurality of nozzles during one scanning period of the ejection head using an ejection head in which nozzles are arrayed at predetermined intervals as the ejection head. You can also. According to this mounting method, the conductive layers that connect the plurality of connection terminals and the plurality of wiring patterns, respectively, can be collectively formed in one scanning period of the ejection head, and the connection wiring can be efficiently formed. .

本発明の電子デバイスの実装方法では、前記アライメントマークとして、平面視略十字状であって、その一線分部が前記吐出ヘッドの進行方向と平行であるアライメントマークを形成することが好ましい。このような実装方法とすれば、第２の位置調整工程で上記アライメントマークを基準として吐出ヘッドの位置合わせを行うことで、基板上に既設の第１導電層に対して容易かつ正確に位置合わせすることができるので、第２導電層を正確に第１導電層の上に積層することができる。   In the electronic device mounting method of the present invention, it is preferable to form an alignment mark having a substantially cross shape in a plan view and having a line segment parallel to the traveling direction of the ejection head. With such a mounting method, the ejection head is aligned with the alignment mark as a reference in the second position adjustment step, so that it can be easily and accurately aligned with the first conductive layer already provided on the substrate. Therefore, the second conductive layer can be accurately stacked on the first conductive layer.

本発明の電子デバイスの実装方法では、前記接続配線を形成する工程に先立って、前記基板上に載置された電子デバイスの能動面と、前記基板の実装面との段差を緩和するためのスロープ材を形成するスロープ材形成工程を含むことが好ましい。このような実装方法とすることで、電子デバイスと基板の実装面との間の段差が緩和され、液滴吐出法を用いて形成される接続配線が前記段差によって断線するのを効果的に防止することができ、信頼性に優れた接続配線、及び実装構造を得ることができる。   In the electronic device mounting method of the present invention, prior to the step of forming the connection wiring, a slope for relaxing a step between the active surface of the electronic device placed on the substrate and the mounting surface of the substrate. It is preferable to include a slope material forming step for forming the material. By adopting such a mounting method, the step between the electronic device and the mounting surface of the substrate is relaxed, and the connection wiring formed using the droplet discharge method is effectively prevented from being disconnected by the step. Thus, a connection wiring and a mounting structure with excellent reliability can be obtained.

本発明の回路基板は、先に記載の本発明の実装方法を用いて得られたことを特徴とする。この構成によれば、高い信頼性をもって電子デバイスが実装された回路基板を得ることができる。   The circuit board of the present invention is obtained by using the mounting method of the present invention described above. According to this configuration, it is possible to obtain a circuit board on which an electronic device is mounted with high reliability.

本発明の電子機器は、先に記載の本発明の回路基板を備えたことを特徴とする。この構成によれば、薄型に電子デバイスが実装された回路基板を具備したことで、薄型化、小型化を実現した電子機器を得ることができる。   An electronic apparatus according to the present invention includes the circuit board according to the present invention described above. According to this configuration, by providing the circuit board on which the electronic device is thinly mounted, it is possible to obtain an electronic device that is thin and small.

以下、本発明の実施の形態について図面を参照して説明するが、本発明の技術範囲は以下の実施の形態に限定されるものではない。   Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, the technical scope of the present invention is not limited to the following embodiments.

（回路基板）
図１（ａ）は、本発明に係る電子デバイスの実装方法を用いて製造できる電子デバイス実装体である回路基板の平面構成図であり、図１（ｂ）は、（ａ）に示すＡ−Ａ’線に沿う断面構成図である。 (Circuit board)
Fig.1 (a) is a plane block diagram of the circuit board which is an electronic device mounting body which can be manufactured using the mounting method of the electronic device which concerns on this invention, FIG.1 (b) is A- shown to (a). It is a section lineblock diagram which meets an A 'line.

図１に示す回路基板２０は、その一面側（（ｂ）図上面側）に、チップ部品（電子デバイス）１０をフェースアップボンディングし、チップ部品１０の接続端子と回路基板２０上の配線パターンとを電気的に接続した構成を備えている。本実施形態の場合、チップ部品１０は、半導体集積回路チップであり、回路基板２０と反対側面が、半導体集積回路１２ａが形成された能動面となっている。   The circuit board 20 shown in FIG. 1 has a chip component (electronic device) 10 face-up bonded to one surface side ((b) upper surface side) of the circuit board 20, and connection terminals of the chip component 10 and wiring patterns on the circuit board 20 Are electrically connected. In the present embodiment, the chip component 10 is a semiconductor integrated circuit chip, and the side surface opposite to the circuit board 20 is an active surface on which the semiconductor integrated circuit 12a is formed.

なお、本発明の実装方法を適用して実装できるチップ部品１０としては、図１に示したものに限らず、一面側に外部接続端子を具備した電子デバイスを広く用いることができる。すなわち、チップ部品１０は、集積回路を具備しない半導体部品等の能動部品であってもよく、受動部品（抵抗器、キャパシタ、インダクタ等）であってもよい。   The chip component 10 that can be mounted by applying the mounting method of the present invention is not limited to the one shown in FIG. 1, and an electronic device having an external connection terminal on one side can be widely used. That is, the chip component 10 may be an active component such as a semiconductor component that does not include an integrated circuit, or may be a passive component (such as a resistor, a capacitor, or an inductor).

チップ部品１０の能動面１２には、各辺端部に沿って複数の接続端子１４が配列形成されており、これらの接続端子１４…は、半導体集積回路１２ａから引き出された図示略の配線と電気的に接続されている。本実施形態では平面視矩形状のチップの周縁部に接続端子１４…が配列されている場合を示しているが、例えば、複数の接続端子１４は、能動面の二辺端部に沿って配列されていてもよく、能動面１２の中央部に１又は複数の接続端子１４が配置されていてもよい。   On the active surface 12 of the chip component 10, a plurality of connection terminals 14 are arrayed along each side edge, and these connection terminals 14... Are connected to unillustrated wiring drawn from the semiconductor integrated circuit 12 a. Electrically connected. In the present embodiment, the case where the connection terminals 14 are arranged at the peripheral edge of the rectangular chip in plan view is shown. For example, the plurality of connection terminals 14 are arranged along the two side edges of the active surface. One or a plurality of connection terminals 14 may be arranged in the central portion of the active surface 12.

図１（ｂ）に示すようにチップ部品１０の能動面１２を覆うようにパッシベーション膜１６が形成されている。パッシベーション膜１６は絶縁材料からなる薄膜であり、例えばＳｉＯ２やＳｉＮ等の向き絶縁材料を用いて形成される。あるいは、前記無機絶縁材料を用いて形成した絶縁膜上に、さらにポリイミド等の有機絶縁材料（樹脂材料）を用いた絶縁膜を積層してもよい。パッシベーション膜１６には、接続端子１４の少なくとも一部（例えば中央部）を露出させる開口が形成されている。すなわち、パッシベーション膜１６は、接続端子１４の少なくとも中央部を避けて形成されている。接続端子１４の端部にパッシベーション膜１６が乗り上げていてもよい。またパッシベーション膜１６は、前記接続端子１４上の領域を避けて能動面１２の表面を覆うように形成することが好ましい。さらにパッシべーション膜１６は、チップ部品１０の側面ないし裏面側まで延設されていてもよい。 A passivation film 16 is formed so as to cover the active surface 12 of the chip component 10 as shown in FIG. The passivation film 16 is a thin film made of an insulating material, and is formed using a direction insulating material such as SiO 2 or SiN. Alternatively, an insulating film using an organic insulating material (resin material) such as polyimide may be stacked on the insulating film formed using the inorganic insulating material. The passivation film 16 is formed with an opening that exposes at least a part (for example, a central portion) of the connection terminal 14. That is, the passivation film 16 is formed so as to avoid at least the central portion of the connection terminal 14. A passivation film 16 may run on the end of the connection terminal 14. The passivation film 16 is preferably formed so as to cover the surface of the active surface 12 while avoiding the region on the connection terminal 14. Further, the passivation film 16 may be extended to the side surface or the back surface side of the chip component 10.

本実施形態の場合、チップ部品１０の裏面（能動面１２と反対側のチップ面）には接続端子は形成されていないが、この裏面に電極が設けられている構成であっても構わない。また当該裏面に前記電極を設けた場合には、当該電極を介して半導体集積回路１２ａと回路基板２０上の配線パターンとを電気的に接続することができる。   In the case of the present embodiment, the connection terminal is not formed on the back surface (chip surface opposite to the active surface 12) of the chip component 10, but a configuration in which electrodes are provided on this back surface may be employed. When the electrode is provided on the back surface, the semiconductor integrated circuit 12a and the wiring pattern on the circuit board 20 can be electrically connected via the electrode.

上記構成を具備したチップ部品１０は、実装面（（ｂ）図上側面）に配線パターン２２が形成された回路基板２０上に実装されている。配線パターン２２は、回路基板２０に設けられた配線のうち、チップ実装面に露出されているものであって、チップ部品１０と配線パターン２２との電気的接続のための接続配線３４が設けられている。配線パターン２２は、チップ部品１０の近傍に拡幅部（ランド）を有していてもよい。   The chip component 10 having the above configuration is mounted on a circuit board 20 in which a wiring pattern 22 is formed on a mounting surface (a side surface in FIG. 5B). The wiring pattern 22 is exposed on the chip mounting surface among the wirings provided on the circuit board 20, and a connection wiring 34 for electrical connection between the chip component 10 and the wiring pattern 22 is provided. ing. The wiring pattern 22 may have a widened portion (land) in the vicinity of the chip component 10.

本実施形態の回路基板２０は、図１（ｂ）に示すように、絶縁層を介して複数層の配線層が積層された多層基板であり、その裏面側（（ｂ）図下側面）に露出する配線を具備した両面基板である。また回路基板２０は、内部に延在する導体パターン２８を含んでいる。この回路基板としては、部品内蔵型の配線基板であってもよく、例えば、基板２０の内部に抵抗器、キャパシタ、インダクタ等の受動部品又は集積回路部品等の能動部品が埋め込まれ、内蔵の導体パターン２８に電気的に接続されている構成が採用できる。   As shown in FIG. 1B, the circuit board 20 of the present embodiment is a multi-layer board in which a plurality of wiring layers are laminated via an insulating layer, and on the back surface side (the lower side surface in FIG. 1B). It is a double-sided board with exposed wiring. The circuit board 20 includes a conductor pattern 28 extending inside. The circuit board may be a component built-in type wiring board. For example, a passive component such as a resistor, a capacitor, or an inductor, or an active component such as an integrated circuit component is embedded in the substrate 20, and a built-in conductor. A configuration electrically connected to the pattern 28 can be employed.

チップ部品１０は、回路基板２０に対して、その裏面（能動面と反対側）を向けた状態で載置されており、チップ部品１０と回路基板２０との間には、接着層２９が介在している。接着層２９としては、導電性の接着剤と、絶縁性の接着剤のいずれも用いることができ、導電性の接着剤を用いれば、チップ実装領域の配線パターンとチップ部品１０の裏面に設けられた電極との導電接続に利用することができる。絶縁性の接着剤としては、ＤＡＦ（ダイアタッチフィルム）を用いることができる。また、接着層２９には絶縁マトリクス中に導電粒子が分散された異方性導電ペースト（ＡＣＰ）や、異方性導電フィルム（ＡＣＦ）を用いることもできる。   The chip component 10 is placed with the back surface (opposite side of the active surface) facing the circuit board 20, and an adhesive layer 29 is interposed between the chip component 10 and the circuit board 20. is doing. As the adhesive layer 29, either a conductive adhesive or an insulating adhesive can be used. If a conductive adhesive is used, the adhesive layer 29 is provided on the wiring pattern in the chip mounting area and the back surface of the chip component 10. It can be used for conductive connection with other electrodes. As the insulating adhesive, DAF (die attach film) can be used. Alternatively, the adhesive layer 29 may be an anisotropic conductive paste (ACP) in which conductive particles are dispersed in an insulating matrix or an anisotropic conductive film (ACF).

回路基板２０上に載置されたチップ部品１０を取り囲むように、チップ部品１０の能動面１２と回路基板２０の実装面との段差を緩和する斜面部を具備したスロープ材３０が設けられている。スロープ材３０は、電気的に絶縁性を有する材料（例えば樹脂）によって形成されており、接着層２９と同一又は異なる材料で形成することができる。本実施形態の場合、チップ部品１０を取り囲むように配線パターン２２が配置されているので、スロープ材３０がチップ部品１０を取り囲むように形成されているが、チップ部品１０の一部の辺端部にのみ近接して配線パターン２２が形成されている場合には、その辺端部に隣接する部分にのみスロープ材３０を設ければよい。   A slope member 30 having a slope portion for relaxing a step between the active surface 12 of the chip component 10 and the mounting surface of the circuit board 20 is provided so as to surround the chip component 10 placed on the circuit board 20. . The slope member 30 is made of an electrically insulating material (for example, resin) and can be made of the same or different material as the adhesive layer 29. In the case of this embodiment, since the wiring pattern 22 is arranged so as to surround the chip component 10, the slope material 30 is formed so as to surround the chip component 10. In the case where the wiring pattern 22 is formed in close proximity to only the slope material 30, the slope material 30 may be provided only in the portion adjacent to the side edge portion.

スロープ材３０は、チップ部品１０の側面に接触するようにして形成されており、スロープ材３０表面の斜面部をもってチップ部品１０の能動面１２（パッシべーション膜１６表面）から回路基板２０の実装面まで段差無く連続するようになっている。スロープ材３０の高さは、チップ部品１０の能動面１２と略同一の高さとすることが好ましいが、後述する接続配線３４の断線等を防止できる程度にチップ部品１０側方の段差を緩和できればよい。また、スロープ材３０は、接続端子１４を覆わない限度で能動面１２の周縁部に一部掛かるように形成されていてもよい。   The slope member 30 is formed so as to be in contact with the side surface of the chip component 10, and the circuit board 20 is mounted from the active surface 12 (passivation film 16 surface) of the chip component 10 with the slope portion of the surface of the slope member 30. It continues to the surface without any step. The height of the slope member 30 is preferably substantially the same as that of the active surface 12 of the chip component 10, but if the step on the side of the chip component 10 can be relaxed to such an extent that disconnection of the connection wiring 34 described later can be prevented. Good. Further, the slope member 30 may be formed so as to partially lie on the periphery of the active surface 12 as long as the connection terminal 14 is not covered.

チップ部品１０の各接続端子１４は、接続配線３４を介して対応する配線パターン２２に接続されている。具体的には、接続配線３４は、接続端子１４上からパッシベーション膜１６上及びスロープ材３０上を通って配線パターン２２に至るよう形成されている。このように、チップ部品１０の側方に設けられたスロープ材３０の斜面部を介して異なる高さの端子と配線とを接続しているので、接続配線３４の断線を防止できるとともに、ワイヤボンディングのようにワイヤを引き回す空間を要せず、薄型の回路基板となっている。   Each connection terminal 14 of the chip component 10 is connected to a corresponding wiring pattern 22 via a connection wiring 34. Specifically, the connection wiring 34 is formed so as to reach the wiring pattern 22 from the connection terminal 14 through the passivation film 16 and the slope material 30. As described above, since the terminals and the wirings having different heights are connected via the slope portions of the slope member 30 provided on the side of the chip component 10, it is possible to prevent the connection wiring 34 from being disconnected and to perform wire bonding. Thus, a thin circuit board is required without requiring a space for routing the wires.

回路基板２０の裏面側には、複数の外部端子３６が形成されている。この外部端子３６は、実装面側の配線パターン２２上に設けてもよい。外部端子３６は、導電性を有する金属（例えば合金）であって、溶融させて電気的な接続を図る、いわゆるろう材により形成してもよい。ろう材は、軟ろう（soft solder）又は硬ろう（hard solder）のいずれであってもよく、スズー銀（Ｓｎ―Ａｇ）系、スズ−ビスマス（Ｓｎ−Ｂｉ）系、スズ−亜鉛（Ｓｎ−Ｚｎ）系、あるいはスズ−銅（Ｓｎ−Ｃｕ）系の合金や、これらの合金に銀、ビスマス、亜鉛、銅などを添加した合金からなる鉛を含まないはんだ（以下、鉛フリーはんだという。）を使用してもよい。   A plurality of external terminals 36 are formed on the back side of the circuit board 20. The external terminals 36 may be provided on the wiring pattern 22 on the mounting surface side. The external terminal 36 is a metal having conductivity (for example, an alloy), and may be formed of a so-called brazing material that is melted for electrical connection. The brazing material may be either soft solder or hard solder, such as tin-silver (Sn-Ag), tin-bismuth (Sn-Bi), tin-zinc (Sn-). Zn) -based or tin-copper (Sn-Cu) -based alloys, and alloys containing these alloys with addition of silver, bismuth, zinc, copper, etc., which do not contain lead (hereinafter referred to as lead-free solder). May be used.

回路基板２０は、図１（ｂ）に示すような外部端子３６を有するＢＧＡ（Ball Grid Array）型のパッケージやＣＳＰ（Chip Size Package）などの形態で構成することができ、外部端子３６を設けずに、配線パターン２２の一部が外部との電気的接続部を成すＬＧＡ（Land Grid Array)型のパッケージとして構成してもよい。
なお、回路基板２０上に実装されたチップ部品１０は、封止材によって封止されていてもよい。封止材を設ける場合には、少なくとも接続配線３４と接続端子１４との電気的接続部と、接続配線３４と配線パターン２２との電気的接続部とを気密に封止する。また封止材によってチップ部品１０全体を封止した構造であってもよい。 The circuit board 20 can be configured in the form of a BGA (Ball Grid Array) type package or CSP (Chip Size Package) having the external terminals 36 as shown in FIG. Alternatively, a part of the wiring pattern 22 may be configured as an LGA (Land Grid Array) type package in which an electrical connection with the outside is formed.
The chip component 10 mounted on the circuit board 20 may be sealed with a sealing material. When the sealing material is provided, at least the electrical connection portion between the connection wiring 34 and the connection terminal 14 and the electrical connection portion between the connection wiring 34 and the wiring pattern 22 are hermetically sealed. Moreover, the structure which sealed the chip component 10 whole with the sealing material may be sufficient.

（電子デバイスの実装方法／第１の実施形態）
以下、図２から図５を参照して本発明に係る電子デバイスの実装方法について説明する。
図２（ａ）〜（ｄ）は、上記実施形態の回路基板２０におけるチップ部品（電子デバイス）１０の実装工程を説明する図である。 (Electronic Device Mounting Method / First Embodiment)
Hereinafter, an electronic device mounting method according to the present invention will be described with reference to FIGS.
2A to 2D are views for explaining a mounting process of the chip component (electronic device) 10 on the circuit board 20 of the embodiment.

本実施形態の実装方法は、回路基板２０上にチップ部品１０を載置する載置工程（図２（ａ））と、チップ部品１０の周囲にスロープ材３０を形成するスロープ材形成工程（図２（ｂ））と、接続配線３４を形成する接続配線形成工程（図２（ｃ））と、外部端子３６を形成する外部端子形成工程（図２（ｄ））と、を有している。さらに本実施形態の実装方法では、接続配線工程において、液滴吐出法（液相法）を用いて接続配線３４を形成するようになっている。   The mounting method of the present embodiment includes a mounting step (FIG. 2A) for mounting the chip component 10 on the circuit board 20, and a slope material forming step (FIG. 2) for forming the slope material 30 around the chip component 10. 2 (b)), a connection wiring formation step for forming the connection wiring 34 (FIG. 2C), and an external terminal formation step for forming the external terminals 36 (FIG. 2D). . Further, in the mounting method of the present embodiment, the connection wiring 34 is formed using a droplet discharge method (liquid phase method) in the connection wiring step.

＜載置工程＞
以下、図面を参照して実装方法の各工程について詳細に説明する。
まず、図２（ａ）に示すように、所定の配線パターン２２や導体パターン２８が形成された回路基板２０上に、接着層２９を介してチップ部品１０を載置する。チップ部品１０の基板上への載置は、真空チャック等によりチップ部品１０を吸着支持して搬送し、回路基板２０上の実装位置に配置する方法が採用でき、場合によっては手作業で配置してもよい。チップ部品１０の裏面又は回路基板２０上に、図２（ａ）に示す接着層２９を形成するための接着剤を塗布した状態でチップ部品１０は回路基板２０上に載置される。接着層２９には、先に記載のように、ＤＡＦや樹脂製接着剤を用いることができるが、接着層２９を介して回路基板２０にチップ部品１０を接着させた状態でチップ部品１０の位置調整を行う場合、チップ部品１０の移動が容易になるよう、未硬化の樹脂製接着剤を用いることが好ましい。
またこのとき、上記真空チャック等によって載置したチップ部品１０を水平方向に動かして、チップ部品１０の複数の接続端子１４と、それらの各々に対応する複数の配線パターン２２との位置合わせを行ってもよい。 <Installation process>
Hereinafter, each step of the mounting method will be described in detail with reference to the drawings.
First, as shown in FIG. 2A, the chip component 10 is placed on the circuit board 20 on which the predetermined wiring pattern 22 and the conductor pattern 28 are formed via the adhesive layer 29. For mounting the chip component 10 on the substrate, a method can be adopted in which the chip component 10 is sucked and supported by a vacuum chuck or the like and transported and placed at a mounting position on the circuit board 20. May be. The chip component 10 is placed on the circuit board 20 in a state where an adhesive for forming the adhesive layer 29 shown in FIG. 2A is applied to the back surface of the chip component 10 or the circuit board 20. As described above, DAF or resin adhesive can be used for the adhesive layer 29, but the position of the chip component 10 in a state where the chip component 10 is adhered to the circuit board 20 via the adhesive layer 29. When the adjustment is performed, it is preferable to use an uncured resin adhesive so that the chip component 10 can be easily moved.
At this time, the chip component 10 placed by the vacuum chuck or the like is moved in the horizontal direction to align the plurality of connection terminals 14 of the chip component 10 with the plurality of wiring patterns 22 corresponding to each of them. May be.

＜スロープ材形成工程＞
チップ部品１０を回路基板２０上に載置したならば、次に、図２（ｂ）に示すように、チップ部品１０の側面部に当接するスロープ材３０を形成する。このスロープ材３０は、例えばポリイミド樹脂、シリコーン変性ポリイミド樹脂、エポキシ樹脂、シリコーン変性エポキシ樹脂、ベンゾシクロブテン（ＢＣＢ；benzocyclobutene）、ポリベンゾオキサゾール（ＰＢＯ；polybenzoxazole）等の樹脂材料を、ディスペンサ等の液体材料塗布手段を用いて回路基板２０上に塗布することで形成することができる。あるいは、ドライフィルムを固着することにより形成してもよい。スロープ材３０は、図示のように、チップ部品１０の側面から外側に向かって薄くなるように形成し、その表面に傾斜面を形成する。スロープ材３０の一部がチップ部品１０のパッシべーション膜１６に乗り上げていてもよい。 <Slope material formation process>
When the chip component 10 is placed on the circuit board 20, next, as shown in FIG. 2B, a slope material 30 that contacts the side surface of the chip component 10 is formed. The slope material 30 is made of a resin material such as a polyimide resin, a silicone-modified polyimide resin, an epoxy resin, a silicone-modified epoxy resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or a liquid such as a dispenser. It can form by apply | coating on the circuit board 20 using a material application | coating means. Or you may form by sticking a dry film. As shown in the figure, the slope member 30 is formed so as to become thinner from the side surface of the chip component 10 toward the outside, and an inclined surface is formed on the surface thereof. A part of the slope material 30 may ride on the passivation film 16 of the chip component 10.

＜接続配線形成工程＞
次に、図２（ｃ）に示すように、接続配線３４を形成する。接続配線３４は、パッシべーション膜１６の開口部に露出された接続端子１４の上面からスロープ材３０の斜面上を通って配線パターン２２上に至るように形成する。本実施形態では、この接続配線３４の形成に際して、導電性微粒子を媒質に分散させた液体材料を吐出ヘッドにより選択配置する液滴吐出法を用いる。まず、接続配線３４の形成に用いる液滴吐出装置、及び液体材料について図３を参照して説明する。 <Connection wiring formation process>
Next, as shown in FIG. 2C, the connection wiring 34 is formed. The connection wiring 34 is formed so as to reach the wiring pattern 22 from the upper surface of the connection terminal 14 exposed at the opening of the passivation film 16 through the slope of the slope material 30. In the present embodiment, when the connection wiring 34 is formed, a droplet discharge method is used in which a liquid material in which conductive fine particles are dispersed in a medium is selectively arranged by an discharge head. First, a droplet discharge device and a liquid material used for forming the connection wiring 34 will be described with reference to FIG.

［液滴吐出装置］
図３（ａ）は、本実施形態で用いる液滴吐出装置ＩＪの概略構成を示す斜視図である。
液滴吐出装置ＩＪは、液滴吐出ヘッド３０１と、Ｘ軸方向駆動軸３０４と、Ｙ軸方向ガイド軸３０５と、制御装置ＣＯＮＴと、ステージ３０７と、クリーニング機構３０８と、基台３０９と、ヒータ３１５とを備えている。
ステージ３０７は、この液滴吐出装置ＩＪによりインク（液体材料）を設けられる基板２０を支持するものであって、基板２０を基準位置に固定する不図示の固定機構を備えている。 [Droplet discharge device]
FIG. 3A is a perspective view showing a schematic configuration of a droplet discharge device IJ used in the present embodiment.
The droplet discharge device IJ includes a droplet discharge head 301, an X-axis direction drive shaft 304, a Y-axis direction guide shaft 305, a control device CONT, a stage 307, a cleaning mechanism 308, a base 309, and a heater. 315.
The stage 307 supports the substrate 20 on which ink (liquid material) is provided by the droplet discharge device IJ, and includes a fixing mechanism (not shown) that fixes the substrate 20 to a reference position.

液滴吐出ヘッド３０１は、複数の吐出ノズルを備えたマルチノズルタイプの液滴吐出ヘッドであり、長手方向とＹ軸方向とを一致させている。複数の吐出ノズルは、液滴吐出ヘッド３０１の下面にＹ軸方向に並んで一定間隔で設けられている。液滴吐出ヘッド３０１の吐出ノズルからは、ステージ３０７に支持されている基板２０に対して、上述した導電性微粒子を含むインクが吐出される。   The droplet discharge head 301 is a multi-nozzle type droplet discharge head provided with a plurality of discharge nozzles, and the longitudinal direction and the Y-axis direction are made to coincide. The plurality of ejection nozzles are provided on the lower surface of the droplet ejection head 301 in the Y axis direction at regular intervals. From the discharge nozzle of the droplet discharge head 301, the ink containing the conductive fine particles described above is discharged onto the substrate 20 supported by the stage 307.

Ｘ軸方向駆動軸３０４には、Ｘ軸方向駆動モータ３０２が接続されている。Ｘ軸方向駆動モータ３０２はステッピングモータ等であり、制御装置ＣＯＮＴからＸ軸方向の駆動信号が供給されると、Ｘ軸方向駆動軸３０４を回転させる。Ｘ軸方向駆動軸３０４が回転すると、液滴吐出ヘッド３０１はＸ軸方向に移動する。
Ｙ軸方向ガイド軸３０５は、基台３０９に対して動かないように固定されている。ステージ３０７は、Ｙ軸方向駆動モータ３０３を備えている。Ｙ軸方向駆動モータ３０３はステッピングモータ等であり、制御装置ＣＯＮＴからＹ軸方向の駆動信号が供給されると、ステージ３０７をＹ軸方向に移動する。 An X-axis direction drive motor 302 is connected to the X-axis direction drive shaft 304. The X-axis direction drive motor 302 is a stepping motor or the like, and rotates the X-axis direction drive shaft 304 when a drive signal in the X-axis direction is supplied from the control device CONT. When the X-axis direction drive shaft 304 rotates, the droplet discharge head 301 moves in the X-axis direction.
The Y-axis direction guide shaft 305 is fixed so as not to move with respect to the base 309. The stage 307 includes a Y-axis direction drive motor 303. The Y-axis direction drive motor 303 is a stepping motor or the like, and moves the stage 307 in the Y-axis direction when a drive signal in the Y-axis direction is supplied from the control device CONT.

制御装置ＣＯＮＴは、液滴吐出ヘッド３０１に液滴の吐出制御用の電圧を供給する。また、Ｘ軸方向駆動モータ３０２に液滴吐出ヘッド３０１のＸ軸方向の移動を制御する駆動パルス信号を、Ｙ軸方向駆動モータ３０３にステージ３０７のＹ軸方向の移動を制御する駆動パルス信号を供給する。
クリーニング機構３０８は、液滴吐出ヘッド３０１をクリーニングするものである。クリーニング機構３０８には、図示しないＹ軸方向の駆動モータが備えられている。このＹ軸方向の駆動モータの駆動により、クリーニング機構は、Ｙ軸方向ガイド軸３０５に沿って移動する。クリーニング機構３０８の移動も制御装置ＣＯＮＴにより制御される。
ヒータ３１５は、ここではランプアニールにより基板２０を熱処理する手段であり、基板２０上に塗布された液体材料に含まれる溶媒の蒸発及び乾燥を行う。このヒータ３１５の電源の投入及び遮断も制御装置ＣＯＮＴにより制御される。 The control device CONT supplies a droplet discharge control voltage to the droplet discharge head 301. Further, the X-axis direction drive motor 302 has a drive pulse signal for controlling the movement of the droplet discharge head 301 in the X-axis direction, and the Y-axis direction drive motor 303 has a drive pulse signal for controlling the movement of the stage 307 in the Y-axis direction. Supply.
The cleaning mechanism 308 is for cleaning the droplet discharge head 301. The cleaning mechanism 308 includes a Y-axis direction drive motor (not shown). The cleaning mechanism moves along the Y-axis direction guide shaft 305 by driving the Y-axis direction drive motor. The movement of the cleaning mechanism 308 is also controlled by the control device CONT.
Here, the heater 315 is a means for heat-treating the substrate 20 by lamp annealing, and performs evaporation and drying of the solvent contained in the liquid material applied on the substrate 20. The heater 315 is also turned on and off by the control device CONT.

液滴吐出装置ＩＪは、液滴吐出ヘッド３０１と基板２０を支持するステージ３０７とを相対的に走査しつつ基板２０に対して液滴を吐出する。ここで、以下の説明において、Ｘ軸方向を走査方向、Ｘ軸方向と直交するＹ軸方向を非走査方向とする。したがって、液滴吐出ヘッド３０１の吐出ノズルは、非走査方向であるＹ軸方向に一定間隔で並んで設けられている。なお、図３（ａ）では、液滴吐出ヘッド３０１は、基板２０の進行方向に対し直角に配置されているが、液滴吐出ヘッド３０１の角度を調整し、基板２０の進行方向に対して交差させるようにしてもよい。このようにすれば、液滴吐出ヘッド３０１の角度を調整することで、ノズル間のピッチを調節することができる。また、基板２０とノズル面との距離を任意に調節できるようにしてもよい。   The droplet discharge device IJ discharges droplets onto the substrate 20 while relatively scanning the droplet discharge head 301 and the stage 307 that supports the substrate 20. Here, in the following description, the X-axis direction is a scanning direction, and the Y-axis direction orthogonal to the X-axis direction is a non-scanning direction. Accordingly, the discharge nozzles of the droplet discharge head 301 are provided side by side at regular intervals in the Y-axis direction that is the non-scanning direction. In FIG. 3A, the droplet discharge head 301 is arranged at a right angle to the traveling direction of the substrate 20, but the angle of the droplet discharge head 301 is adjusted to the traveling direction of the substrate 20. You may make it cross. In this way, the pitch between the nozzles can be adjusted by adjusting the angle of the droplet discharge head 301. Further, the distance between the substrate 20 and the nozzle surface may be arbitrarily adjusted.

図３（ｂ）は、ピエゾ方式による液体材料の吐出原理を説明するための液滴吐出ヘッドの概略構成図である。図３（ｂ）において、液体材料（インク；機能液）を収容する液体室３２１に隣接してピエゾ素子３２２が設置されている。液体室３２１には、液体材料を収容する材料タンクを含む液体材料供給系３２３を介して液体材料が供給される。ピエゾ素子３２２は駆動回路３２４に接続されており、この駆動回路３２４を介してピエゾ素子３２２に電圧を印加し、ピエゾ素子３２２を変形させて液体室３２１を弾性変形させる。そして、この弾性変形時の内容積の変化によってノズル３２５から液体材料が吐出されるようになっている。この場合、印加電圧の値を変化させることにより、ピエゾ素子３２２の歪み量を制御することができる。また、印加電圧の周波数を変化させることにより、ピエゾ素子３２２の歪み速度を制御することができる。ピエゾ方式による液滴吐出は材料に熱を加えないため、材料の組成に影響を与えにくいという利点を有する。   FIG. 3B is a schematic configuration diagram of a droplet discharge head for explaining the principle of discharging a liquid material by a piezo method. In FIG. 3B, a piezo element 322 is disposed adjacent to a liquid chamber 321 that stores a liquid material (ink; functional liquid). The liquid material is supplied to the liquid chamber 321 via a liquid material supply system 323 including a material tank that stores the liquid material. The piezo element 322 is connected to a drive circuit 324, and a voltage is applied to the piezo element 322 via the drive circuit 324 to deform the piezo element 322 and elastically deform the liquid chamber 321. And the liquid material is discharged from the nozzle 325 by the change of the internal volume at the time of this elastic deformation. In this case, the amount of distortion of the piezo element 322 can be controlled by changing the value of the applied voltage. In addition, the strain rate of the piezo element 322 can be controlled by changing the frequency of the applied voltage. Since the droplet discharge by the piezo method does not apply heat to the material, it has an advantage of hardly affecting the composition of the material.

［インク（液体材料）］
次に、本実施形態に係る製造方法で用いられる、液滴吐出ヘッド３０１からの吐出に好適なインク（液体材料）について説明する。本実施形態で用いる接続配線形成用のインク（液体材料）は、導電性微粒子を分散媒に分散させた分散液、若しくはその前駆体からなるものである。導電性微粒子として、例えば金、銀、銅、パラジウム、ニオブ及びニッケル等を含有する金属微粒子の他、これらの前駆体、合金、酸化物、並びに導電性ポリマーやインジウム錫酸化物等の微粒子などが用いられる。これらの導電性微粒子は、分散性を向上させるために表面に有機物などをコーティングして使うこともできる。導電性微粒子の粒径は１ｎｍ〜０．１μｍ程度であることが好ましい。０．１μｍより大きいと、後述する液体吐出ヘッド３０１のノズルに目詰まりが生じるおそれがあるだけでなく、得られる膜の緻密性が悪化する可能性がある。また、１ｎｍより小さいと、導電性微粒子に対するコーティング剤の体積比が大きくなり、得られる膜中の有機物の割合が過多となる。 [Ink (liquid material)]
Next, ink (liquid material) suitable for ejection from the droplet ejection head 301 used in the manufacturing method according to the present embodiment will be described. The connection wiring forming ink (liquid material) used in the present embodiment is made of a dispersion obtained by dispersing conductive fine particles in a dispersion medium, or a precursor thereof. Examples of the conductive fine particles include metal fine particles containing, for example, gold, silver, copper, palladium, niobium and nickel, as well as precursors, alloys, oxides thereof, and fine particles such as conductive polymers and indium tin oxide. Used. These conductive fine particles can be used by coating the surface with an organic substance or the like in order to improve dispersibility. The particle diameter of the conductive fine particles is preferably about 1 nm to 0.1 μm. If it is larger than 0.1 μm, there is a possibility that clogging may occur in the nozzles of the liquid discharge head 301 described later, and the denseness of the resulting film may be deteriorated. On the other hand, if it is smaller than 1 nm, the volume ratio of the coating agent to the conductive fine particles becomes large, and the ratio of the organic matter in the obtained film becomes excessive.

分散媒としては、上記の導電性微粒子を分散できるもので、凝集を起こさないものであれば特に限定されない。例えば、水の他に、メタノール、エタノール、プロパノール、ブタノールなどのアルコール類、ｎ−ヘプタン、ｎ−オクタン、デカン、ドデカン、テトラデカン、トルエン、キシレン、シメン、デュレン、インデン、ジペンテン、テトラヒドロナフタレン、デカヒドロナフタレン、シクロヘキシルベンゼンなどの炭化水素系化合物、またエチレングリコールジメチルエーテル、エチレングリコールジエチルエーテル、エチレングリコールメチルエチルエーテル、ジエチレングリコールジメチルエーテル、ジエチレングリコールジエチルエーテル、ジエチレングリコールメチルエチルエーテル、１，２−ジメトキシエタン、ビス（２−メトキシエチル）エーテル、ｐ−ジオキサンなどのエーテル系化合物、さらにプロピレンカーボネート、γ−ブチロラクトン、Ｎ−メチル−２−ピロリドン、ジメチルホルムアミド、ジメチルスルホキシド、シクロヘキサノンなどの極性化合物を例示できる。これらのうち、微粒子の分散性と分散液の安定性、また液滴吐出法（インクジェット法）への適用の容易さの点で、水、アルコール類、炭化水素系化合物、エーテル系化合物が好ましく、より好ましい分散媒としては、水、炭化水素系化合物を挙げることができる。   The dispersion medium is not particularly limited as long as it can disperse the conductive fine particles and does not cause aggregation. For example, in addition to water, alcohols such as methanol, ethanol, propanol, butanol, n-heptane, n-octane, decane, dodecane, tetradecane, toluene, xylene, cymene, durene, indene, dipentene, tetrahydronaphthalene, decahydro Hydrocarbon compounds such as naphthalene and cyclohexylbenzene, ethylene glycol dimethyl ether, ethylene glycol diethyl ether, ethylene glycol methyl ethyl ether, diethylene glycol dimethyl ether, diethylene glycol diethyl ether, diethylene glycol methyl ethyl ether, 1,2-dimethoxyethane, bis (2- Methoxyethyl) ether, ether compounds such as p-dioxane, propylene carbonate, γ- Butyrolactone, N- methyl-2-pyrrolidone, dimethylformamide, dimethyl sulfoxide, can be exemplified polar compounds such as cyclohexanone. Of these, water, alcohols, hydrocarbon compounds, and ether compounds are preferred from the viewpoints of fine particle dispersibility and dispersion stability, and ease of application to the droplet discharge method (inkjet method). More preferred dispersion media include water and hydrocarbon compounds.

上記導電性微粒子の分散液の表面張力は０．０２Ｎ／ｍ〜０．０７Ｎ／ｍの範囲内であることが好ましい。インクジェット法にて液体を吐出する際、表面張力が０．０２Ｎ／ｍ未満であると、インク組成物のノズル面に対する濡れ性が増大するため飛行曲りが生じやすくなり、０．０７Ｎ／ｍを超えるとノズル先端でのメニスカスの形状が安定しないため吐出量や、吐出タイミングの制御が困難になる。表面張力を調整するため、上記分散液には、基板との接触角を大きく低下させない範囲で、フッ素系、シリコーン系、ノニオン系などの表面張力調節剤を微量添加するとよい。ノニオン系表面張力調節剤は、液体の基板への濡れ性を向上させ、膜のレベリング性を改良し、膜の微細な凹凸の発生などの防止に役立つものである。上記表面張力調節剤は、必要に応じて、アルコール、エーテル、エステル、ケトン等の有機化合物を含んでもよい。   The surface tension of the conductive fine particle dispersion is preferably in the range of 0.02 N / m to 0.07 N / m. When the liquid is ejected by the ink jet method, if the surface tension is less than 0.02 N / m, the wettability of the ink composition to the nozzle surface increases, and thus flight bending tends to occur, exceeding 0.07 N / m. Since the meniscus shape at the nozzle tip is not stable, it becomes difficult to control the discharge amount and the discharge timing. In order to adjust the surface tension, a small amount of a surface tension regulator such as a fluorine-based, silicone-based, or nonionic-based material may be added to the dispersion within a range that does not significantly reduce the contact angle with the substrate. The nonionic surface tension modifier improves the wettability of the liquid to the substrate, improves the leveling property of the film, and helps prevent the occurrence of fine irregularities in the film. The surface tension modifier may contain an organic compound such as alcohol, ether, ester, or ketone, if necessary.

上記分散液の粘度は１ｍＰａ・ｓ〜５０ｍＰａ・ｓであることが好ましい。インクジェット法を用いて液体材料を液滴として吐出する際、粘度が１ｍＰａ・ｓより小さい場合にはノズル周辺部がインクの流出により汚染されやすく、また粘度が５０ｍＰａ・ｓより大きい場合は、ノズル孔での目詰まり頻度が高くなり円滑な液滴の吐出が困難となるだけでなく、液滴の吐出量が減少する。   The viscosity of the dispersion is preferably 1 mPa · s to 50 mPa · s. When a liquid material is ejected as droplets using the inkjet method, if the viscosity is less than 1 mPa · s, the nozzle periphery is easily contaminated by the outflow of the ink, and if the viscosity is greater than 50 mPa · s, the nozzle hole The clogging frequency in the case becomes high, and not only is it difficult to smoothly discharge droplets, but also the amount of droplets discharged is reduced.

［接続配線の形成］
図４は、上述した液滴吐出装置ＩＪを用いて接続配線３４を形成する際の平面構成図である。図４では、図面を見易くするためチップ部品１０の図示Ｘ方向に延びる辺端（図示上下端の辺端）にのみスロープ材３０を表示している。 [Formation of connection wiring]
FIG. 4 is a plan configuration diagram when the connection wiring 34 is formed using the above-described droplet discharge device IJ. In FIG. 4, the slope member 30 is displayed only on the side end (the side end of the upper and lower ends in the drawing) of the chip component 10 that extends in the X direction in the drawing in order to make the drawing easy to see.

｛第１の位置調整工程｝
液滴吐出装置ＩＪを用いて接続配線３４を形成するには、まず、図４に示すように、吐出ヘッド３０１とチップ部品１０と回路基板２０とを、所定の位置関係となるように配置する。具体的には、接続端子１４１と、配線パターン２２１と、それらを接続する配線を形成するためのノズル３２５とが、図示Ｙ方向でほぼ一直線上に並ぶように位置合わせする。この位置合わせは、図２（ｃ）に示すカメラ（光学測定手段）１１１，１１２を介して取得したチップ部品１０の位置情報に基づき、液滴吐出装置ＩＪのステージ３０７を移動させることで行う。 {First position adjustment step}
In order to form the connection wiring 34 using the droplet discharge device IJ, first, as shown in FIG. 4, the discharge head 301, the chip component 10, and the circuit board 20 are arranged in a predetermined positional relationship. . Specifically, the connection terminals 141, the wiring patterns 221, and the nozzles 325 for forming the wirings connecting them are aligned so as to be aligned substantially in the Y direction in the figure. This alignment is performed by moving the stage 307 of the droplet discharge device IJ based on the positional information of the chip component 10 acquired via the cameras (optical measurement means) 111 and 112 shown in FIG.

カメラ１１１，１１２は、図３では図示を省略しているが、液滴吐出装置ＩＪに備えられたものであり、図２（ｃ）に示すように液滴吐出装置ＩＪの制御装置ＣＯＮＴに接続されている。そして、制御装置ＣＯＮＴにより制御されて回路基板２０上の平面画像を取得し、取得した画像を制御装置ＣＯＮＴに送信するようになっている。制御装置ＣＯＮＴでは、入力された画像に所定の処理を施して回路基板２０及びチップ部品１０の位置情報を算出し、得られた位置情報に基づきステージ３０７を移動させて吐出ヘッド３０１と回路基板２０との位置合わせを行う。   Although not shown in FIG. 3, the cameras 111 and 112 are provided in the droplet discharge device IJ and are connected to the control device CONT of the droplet discharge device IJ as shown in FIG. Has been. The planar image on the circuit board 20 is acquired under the control of the control device CONT, and the acquired image is transmitted to the control device CONT. In the control device CONT, the input image is subjected to predetermined processing to calculate the position information of the circuit board 20 and the chip component 10, and the stage 307 is moved based on the obtained position information to discharge the ejection head 301 and the circuit board 20. Align with.

本実施形態では、まず、カメラ１１１，１１２による画像取得に際して、図４に示すように、カメラ１１１の撮像視野ＳＣ１をチップ部品１０の接続端子１４１の角部に合わせ、カメラ１１２の撮像視野ＳＣ２をチップ部品１０の接続端子１４２の角部に合わせる。そして、取得した画像を処理することで、接続端子１４１，１４２の図示上下方向に延びる辺端が吐出ヘッド３０１の進行方向であるＹ方向に沿うように位置調整する。   In the present embodiment, first, when acquiring images by the cameras 111 and 112, as shown in FIG. 4, the imaging field SC1 of the camera 111 is aligned with the corner of the connection terminal 141 of the chip component 10, and the imaging field SC2 of the camera 112 is set. Align with the corner of the connection terminal 142 of the chip component 10. Then, by processing the acquired image, the positions of the side edges of the connection terminals 141 and 142 extending in the vertical direction in the drawing are adjusted so as to be along the Y direction that is the traveling direction of the ejection head 301.

｛第１導電層形成工程｝
図４に示すように吐出ヘッド３０１とチップ部品１０とを配置したならば、次いで、吐出ヘッド３０１と回路基板２０とを相対的に移動させつつ所定のタイミングでノズル３２５から液体材料を吐出することで、接続端子１４と配線パターン２２とを接続するように線状に液体材料を配置する。本実施形態の場合、上記液体材料の吐出を複数回繰り返して行うことで、所定厚さの導電層が積層された構造を具備した接続配線３４を形成するようになっており、図４には接続配線３４の最下層を構成する第１導電層３４１を形成した状態を示している。なお、図４では、接続端子１４１と配線パターン２２１、及び接続端子１４２と配線パターン２２２をそれぞれ接続する第１導電層３４１のみを示しているが、実際の配線形成工程では、各接続端子１４と、それらに対応する配線パターン２２とを接続する第１導電層３４１が描画される。 {First conductive layer forming step}
When the ejection head 301 and the chip component 10 are arranged as shown in FIG. 4, the liquid material is then ejected from the nozzle 325 at a predetermined timing while the ejection head 301 and the circuit board 20 are relatively moved. Thus, the liquid material is arranged in a line so as to connect the connection terminal 14 and the wiring pattern 22. In the case of this embodiment, by repeating the discharge of the liquid material a plurality of times, the connection wiring 34 having a structure in which a conductive layer having a predetermined thickness is laminated is formed. A state in which the first conductive layer 341 constituting the lowermost layer of the connection wiring 34 is formed is shown. 4 shows only the first conductive layer 341 that connects the connection terminal 141 and the wiring pattern 221, and the connection terminal 142 and the wiring pattern 222, respectively, but in the actual wiring formation process, The first conductive layer 341 that connects the wiring patterns 22 corresponding to them is drawn.

この第１導電層３４１を形成する液体材料の配置に際して、本実施形態の実装方法では、接続配線形成用の液体材料を用いてチップ部品１０上に平面視略十字状のアライメントマーク１５１，１５２を描画形成する。これらのアライメントマーク１５１，１５２は、複数の導電層を積層してなる接続配線３４を形成する際の第２層以降の導電層の形成に用いるために形成する。図４に示すように、アライメントマーク１５１，１５２の一方の線分部は図示Ｙ方向に延びて形成されており、他方の線分部はそれと直交する図示Ｘ方向に延びて形成されている。なお、アライメントマーク１５１，１５２は、回路基板２０上に形成してもよい。   In disposing the liquid material forming the first conductive layer 341, in the mounting method according to the present embodiment, the alignment marks 151 and 152 having a substantially cross shape in plan view are formed on the chip component 10 using the liquid material for forming the connection wiring. Draw and form. These alignment marks 151 and 152 are formed for use in forming the second and subsequent conductive layers when the connection wiring 34 formed by laminating a plurality of conductive layers is formed. As shown in FIG. 4, one line segment of the alignment marks 151, 152 is formed to extend in the Y direction in the figure, and the other line segment is formed to extend in the X direction, which is orthogonal thereto. The alignment marks 151 and 152 may be formed on the circuit board 20.

先に記載のように吐出ヘッド３０１は複数のノズル３２５を備えたマルチヘッドタイプの液滴吐出ヘッドであるから、複数のノズル３２５のピッチと、配線パターン２２及び接続端子１４のピッチを合わせて図示のように配置することで、図示Ｙ方向に延びる複数の導電層３４１（接続配線３４）を一度に形成することができる。ノズル３２５のピッチと配線パターン２２のピッチがずれている場合には、例えば吐出ヘッド３０１をヘッド進行方向（Ｙ方向）に対して所定角度傾けて配置することでヘッド進行方向におけるノズル３２５のピッチを調整し、配線パターン２２のピッチに合わせることができる。   As described above, since the ejection head 301 is a multi-head type droplet ejection head having a plurality of nozzles 325, the pitch of the plurality of nozzles 325 and the pitch of the wiring pattern 22 and the connection terminal 14 are shown in the drawing. By arranging in this manner, a plurality of conductive layers 341 (connection wirings 34) extending in the Y direction in the figure can be formed at a time. When the pitch of the nozzles 325 and the pitch of the wiring pattern 22 are deviated, for example, by disposing the ejection head 301 at a predetermined angle with respect to the head moving direction (Y direction), the pitch of the nozzles 325 in the head moving direction is set. It can be adjusted to match the pitch of the wiring pattern 22.

吐出ヘッド３０１を用いて液体材料を配置したならば、回路基板２０上に配された液体材料に含まれる分散媒の除去を目的として乾燥処理を行う。この乾燥処理は、例えば基板２０を加熱する通常のホットプレート、電気炉などによる処理の他、ランプアニールによって行うこともできる。ランプアニールに使用する光の光源としては、特に限定されないが、赤外線ランプ、キセノンランプ、ＹＡＧレーザー、アルゴンレーザー、炭酸ガスレーザー、ＸｅＦ、ＸｅＣｌ、ＸｅＢｒ、ＫｒＦ、ＫｒＣｌ、ＡｒＦ、ＡｒＣｌなどのエキシマレーザーなどを光源として使用することができる。これらの光源は一般には、出力１０Ｗ以上５０００Ｗ以下の範囲のものが用いられるが、本実施形態では１００Ｗ以上１０００Ｗ以下の範囲で十分である。   If the liquid material is disposed using the ejection head 301, a drying process is performed for the purpose of removing the dispersion medium contained in the liquid material disposed on the circuit board 20. This drying process can be performed by lamp annealing, for example, in addition to a process using a normal hot plate or an electric furnace for heating the substrate 20. The light source used for lamp annealing is not particularly limited, but excimer laser such as infrared lamp, xenon lamp, YAG laser, argon laser, carbon dioxide laser, XeF, XeCl, XeBr, KrF, KrCl, ArF, ArCl, etc. Can be used as a light source. In general, these light sources have an output in the range of 10 W to 5000 W, but in the present embodiment, a range of 100 W to 1000 W is sufficient.

上記乾燥処理に続いて、回路基板２０上の乾燥膜（導電性微粒子の集合体）の導電性を向上させることを目的として、加熱処理又は光照射処理による焼成工程を実施する。この焼成工程により、分散媒の除去がより確実に成される。また前記乾燥体に金属有機塩が含まれている場合、熱分解により金属に変成することができる。さらに、導電性微粒子がコーティング材に覆われている場合、その除去も行うことができる。
上記加熱処理及び／又は光照射処理は通常大気中で行われるが、必要に応じて、窒素、アルゴン、ヘリウムなどの不活性ガス雰囲気中で行うこともできる。熱処理及び／又は光処理の処理温度は、分散媒の沸点（蒸気圧）、雰囲気ガスの種類や圧力、微粒子の分散性や酸化性等の熱的挙動、金属有機塩の熱および化学的な分解挙動、さらには基材の耐熱温度等を考慮して適宜決定される。 Subsequent to the drying treatment, a firing step by heat treatment or light irradiation treatment is performed for the purpose of improving the conductivity of the dry film (aggregate of conductive fine particles) on the circuit board 20. By this firing step, the dispersion medium is more reliably removed. Further, when a metal organic salt is contained in the dried body, it can be transformed into a metal by thermal decomposition. Further, when the conductive fine particles are covered with the coating material, the removal can also be performed.
The heat treatment and / or light irradiation treatment is usually performed in the air, but can be performed in an inert gas atmosphere such as nitrogen, argon, helium, or the like, if necessary. The heat treatment and / or light treatment temperatures are the boiling point (vapor pressure) of the dispersion medium, the type and pressure of the atmospheric gas, the thermal behavior such as the dispersibility and oxidation of the fine particles, the heat and chemical decomposition of the metal organic salt It is appropriately determined in consideration of the behavior and the heat-resistant temperature of the substrate.

｛第２の位置調整工程｝
以上の工程により第１導電層３４１を回路基板２０上に形成したならば、続いて、第１導電層３４１上に重ねて液体材料を配置し、第２導電層を形成するために、再度吐出ヘッド３０１と回路基板２０（接続端子１４、配線パターン２２）との位置合わせを行う。この第２の位置調整工程においても、図２（ｃ）に示したカメラ１１１，１１２を用いた位置調整を行うが、その位置合わせ基準として、第１導電層形成工程でチップ部品１０上に形成したアライメントマーク１５１，１５２を用いる。 {Second position adjustment step}
If the first conductive layer 341 is formed on the circuit board 20 by the above steps, the liquid material is then placed on the first conductive layer 341 and discharged again to form the second conductive layer. The head 301 and the circuit board 20 (the connection terminals 14 and the wiring pattern 22) are aligned. Also in this second position adjustment step, position adjustment using the cameras 111 and 112 shown in FIG. 2C is performed. The alignment marks 151 and 152 that have been used are used.

ここで図５（ａ）は、接続端子１４１と撮像視野ＳＣ１との位置関係を示す説明図であり、（ｂ）は接続端子１４２と撮像視野ＳＣ２との位置関係を示す説明図である。これらの図に示すように、先の第１の位置調整工程では、接続端子１４１，１４２上には何も形成されていないため、それらの角部に撮像視野を合わせて位置合わせ基準として用いることができるが、第１導電層形成工程を経た接続端子１４１，１４２上には、既に第１導電層３４１が形成されているので、第２の位置調整工程でこれら接続端子１４１，１４２の平面画像を取得しても、第１の位置調整工程で取得した画像とは全く異なるものである。そのため、これらの接続端子１４１，１４２を基準に位置合わせを行なおうとしても接続端子の認識が極めて困難であり、十分な位置精度は望めない。そこで、本実施形態の実装方法では、第１導電層形成工程にて第１導電層３４１とともに形成したアライメントマーク１５１，１５２に対してそれぞれカメラ１１１，１１２の撮像視野ＳＣ１，ＳＣ２を合わせ、吐出ヘッド３０１とチップ部品１０との位置合わせを行う。   Here, FIG. 5A is an explanatory diagram illustrating a positional relationship between the connection terminal 141 and the imaging field SC1, and FIG. 5B is an explanatory diagram illustrating a positional relationship between the connection terminal 142 and the imaging field SC2. As shown in these drawings, in the previous first position adjustment process, nothing is formed on the connection terminals 141 and 142, so the imaging field of view is aligned with the corners and used as an alignment reference. However, since the first conductive layer 341 has already been formed on the connection terminals 141 and 142 that have undergone the first conductive layer formation step, a planar image of the connection terminals 141 and 142 in the second position adjustment step. Is completely different from the image acquired in the first position adjustment process. For this reason, even if the alignment is performed with reference to these connection terminals 141 and 142, it is extremely difficult to recognize the connection terminals, and sufficient positional accuracy cannot be expected. Therefore, in the mounting method of the present embodiment, the imaging fields SC1 and SC2 of the cameras 111 and 112 are aligned with the alignment marks 151 and 152 formed together with the first conductive layer 341 in the first conductive layer formation step, respectively, and the ejection head. 301 and the chip component 10 are aligned.

このような実装方法とすることで、位置合わせ基準の変化による位置精度の低下を防止することができ、高精度に第２導電層を形成することが可能になる。また、アライメントマーク１５１，１５２は、第１導電層３４１に対して位置合わせされた状態で形成されているので、第１導電層３４１上に重ねて形成される第２導電層の形成には、回路基板２０やチップ部品１０上に予め形成されているアライメントマークや部材を基準に位置合わせするよりも精度を高めやすくなる。   By adopting such a mounting method, it is possible to prevent a decrease in position accuracy due to a change in alignment reference, and it is possible to form the second conductive layer with high accuracy. In addition, since the alignment marks 151 and 152 are formed in a state of being aligned with the first conductive layer 341, the formation of the second conductive layer that is formed on the first conductive layer 341 includes: It becomes easier to improve the accuracy than alignment based on alignment marks or members formed in advance on the circuit board 20 or the chip component 10.

上記第１導電層３４１上に第２導電層を形成するための液体材料を配置したならば、先の第１導電層形成工程と同様、乾燥工程及び焼成工程を行うことで、液体材料を乾燥固化し、固体の第２導電層を得る。その後、必要な積層数だけ上記導電層形成工程を繰り返すことで複数の導電層が積層されてなる接続配線３４を形成する（図１参照）。   If the liquid material for forming the second conductive layer is disposed on the first conductive layer 341, the liquid material is dried by performing the drying step and the firing step in the same manner as the first conductive layer forming step. Solidify to obtain a solid second conductive layer. Thereafter, the above-mentioned conductive layer forming step is repeated as many times as necessary to form the connection wiring 34 in which a plurality of conductive layers are stacked (see FIG. 1).

なお、本実施形態では、１層の導電層を形成するごとに乾燥工程と焼成工程とを行う手順にて各導電層を形成しているが、例えば上記焼成工程を、配線形成工程の最後に一括して行うこともできる。具体的には、第１導電層３４１を形成するための液体材料を配置した後、乾燥工程を行い、得られた乾燥膜上に第２導電層を形成するための液体材料を配置し、乾燥させる。その後順次液体材料の配置と乾燥とを繰り返して積層膜を形成し、その後一括して焼成を行うこともできる。   In this embodiment, each conductive layer is formed by a procedure of performing a drying step and a firing step every time one conductive layer is formed. For example, the firing step is performed at the end of the wiring formation step. It can also be done in a batch. Specifically, after disposing a liquid material for forming the first conductive layer 341, a drying process is performed, and a liquid material for forming the second conductive layer is disposed on the obtained dry film, followed by drying. Let Thereafter, the arrangement and drying of the liquid material are sequentially repeated to form a laminated film, and then baking can be performed collectively.

＜外部端子形成工程＞
次に、図２（ｄ）に示すように、回路基板２０の裏面側に露出された導体パターン２８に対して、鉛フリーはんだ等のろう材を用いて外部接続端子３６を形成する。この外部接続端子３６は、フローはんだ付け法等の公知のはんだ付け法を用いて形成することができる。 <External terminal formation process>
Next, as shown in FIG. 2D, external connection terminals 36 are formed on the conductor pattern 28 exposed on the back side of the circuit board 20 using a brazing material such as lead-free solder. The external connection terminal 36 can be formed using a known soldering method such as a flow soldering method.

以上の工程により、チップ部品１０を回路基板２０上に実装することができる。なお、実装したチップ部品１０上にはトランスファ・モールドやポッティングによって封止材を形成してもよい。   Through the above steps, the chip component 10 can be mounted on the circuit board 20. Note that a sealing material may be formed on the mounted chip component 10 by transfer molding or potting.

本実施の形態によれば、接続端子１４と配線パターン２２とを電気的に接続する接続配線３４を、液滴吐出法を用いて形成しているので、ワイヤボンディングやフェースダウンボンディングで行われるような超音波振動の付与や加圧を避けることができる。したがって、基板２０に対する耐熱性の要求を減らし、チップ部品１０のストレスの発生を減らすことができる。また接続配線３４は、複数の導電層を積層してなる構造を具備しているので、液滴の着弾位置ずれに起因する断線等の不良が生じ難く、高信頼性かつ低抵抗の配線となっている。   According to the present embodiment, since the connection wiring 34 that electrically connects the connection terminal 14 and the wiring pattern 22 is formed using the droplet discharge method, it is performed by wire bonding or face-down bonding. Application of ultrasonic vibration and pressurization can be avoided. Therefore, the heat resistance requirement for the substrate 20 can be reduced, and the occurrence of stress on the chip component 10 can be reduced. In addition, since the connection wiring 34 has a structure in which a plurality of conductive layers are stacked, defects such as disconnection due to a deviation in the landing position of the liquid droplet hardly occur, and the connection wiring 34 is a highly reliable and low resistance wiring. ing.

また、接続配線３４は、チップ部品１０及びスロープ材３０の表面に密着した状態で形成されるので、ワイヤボンディングのようにワイヤを引き回す空間は不要であり、薄型の電子デバイス実装体を得ることができ、係る電子デバイス実装体によれば、これを備える電子機器の薄型化、小型化に寄与し得るものとなる。また、基板２０として汎用基板を使用し、チップ部品１０の構成（接続端子１４の配列等）に応じて接続配線３４を引き回すこともできる。   In addition, since the connection wiring 34 is formed in close contact with the surfaces of the chip component 10 and the slope member 30, a space for routing the wire as in wire bonding is unnecessary, and a thin electronic device mounting body can be obtained. In addition, according to such an electronic device mounting body, it is possible to contribute to the reduction in thickness and size of an electronic apparatus including the electronic device mounting body. Further, a general-purpose substrate can be used as the substrate 20, and the connection wiring 34 can be routed according to the configuration of the chip component 10 (such as the arrangement of the connection terminals 14).

（第２の実施形態）
図６から図９は、本発明に係る電子デバイスの実装方法の第２の実施形態を説明するための回路基板の平面構成図である。先の第１の実施形態では、第１の位置調整工程において、チップ部品１０上に設けられた接続端子１４１，１４２の角部を位置合わせの基準に利用していたが、図６に示すように、チップ部品１０及び回路基板２０上に、予めアライメントマーク１６１，１６２、１７１，１７２が形成されている場合、これらのアライメントマークを基準にして吐出ヘッド３０１の位置調整を行うこともできる。 (Second Embodiment)
6 to 9 are plan configuration diagrams of a circuit board for explaining a second embodiment of the electronic device mounting method according to the present invention. In the first embodiment, the corners of the connection terminals 141 and 142 provided on the chip component 10 are used as the alignment reference in the first position adjustment step, but as shown in FIG. In addition, when the alignment marks 161, 162, 171, 172 are formed in advance on the chip component 10 and the circuit board 20, the position of the ejection head 301 can be adjusted based on these alignment marks.

ここで、チップ部品１０の接続端子１４と回路基板２０の配線パターン２２とを接続する接続配線を形成する場合、吐出ヘッド３０１の進行方向に対して接続端子１４と配線パターン２２とを正確に位置合わせする必要があり、図６に示すようにチップ部品１０と回路基板２０とが正確に位置合わせされている場合には、アライメントマーク１６１，１６２、あるいはアライメントマーク１７１，１７２のいずれかに吐出ヘッド３０１を位置合わせすることで、正確に接続配線３４（第１導電層３４１）を形成することができる。   Here, when the connection wiring for connecting the connection terminal 14 of the chip component 10 and the wiring pattern 22 of the circuit board 20 is formed, the connection terminal 14 and the wiring pattern 22 are accurately positioned with respect to the traveling direction of the ejection head 301. When the chip component 10 and the circuit board 20 are accurately aligned as shown in FIG. 6, the ejection head is placed on either the alignment mark 161, 162 or the alignment mark 171, 172. By aligning 301, the connection wiring 34 (first conductive layer 341) can be accurately formed.

しかしながら、図７又は図８に示すように、チップ部品１０を回路基板２０上に載置した際に、チップ部品１０が回路基板２０に対して傾いて配置されている場合、チップ部品１０又は回路基板２０のアライメントマークを利用したのでは、正確に接続配線３４を形成することができなくなる。
例えば図７に示すように、回路基板２０上のアライメントマーク１７１，１７２を基準として吐出ヘッド３０１の位置合わせを行った状態で第１導電層３４１を形成すると、第１導電層３４１は配線パターン２２上には正確に配置されるものの、接続端子１４から外れた位置に描画されてしまう。その一方で、図８に示すようにチップ部品１０上のアライメントマーク１６１，１６２を基準として位置合わせを行った状態で第１導電層３４１を形成すると、接続端子１４上には正確に配置されるが、接続端子に対応する配線パターン２２上に配置されなくなる。 However, as shown in FIG. 7 or FIG. 8, when the chip component 10 is placed on the circuit board 20 and the chip component 10 is inclined with respect to the circuit board 20, the chip component 10 or the circuit If the alignment mark on the substrate 20 is used, the connection wiring 34 cannot be formed accurately.
For example, as shown in FIG. 7, when the first conductive layer 341 is formed in a state in which the ejection head 301 is aligned with reference to the alignment marks 171 and 172 on the circuit board 20, the first conductive layer 341 becomes the wiring pattern 22. Although it is accurately arranged on the top, it is drawn at a position deviated from the connection terminal 14. On the other hand, when the first conductive layer 341 is formed with the alignment marks 161 and 162 on the chip component 10 as a reference as shown in FIG. 8, the first conductive layer 341 is accurately arranged on the connection terminal 14. Is not disposed on the wiring pattern 22 corresponding to the connection terminal.

そこで本実施形態は、このように回路基板２０上にチップ部品１０を載置した際に、チップ部品１０に位置ずれが生じていたとしても、正確に接続配線３４を形成することができる電子デバイスの実装方法を提供するものである。以下、図９を参照して本実施形態の実装方法について説明する。   Therefore, in the present embodiment, when the chip component 10 is placed on the circuit board 20 as described above, the electronic device can accurately form the connection wiring 34 even if the chip component 10 is misaligned. Is provided. Hereinafter, the mounting method of the present embodiment will be described with reference to FIG.

図９は、本実施形態の実装方法を示す説明図である。本実装方法においても、回路基板２０上にチップ部品１０を載置する載置工程と、チップ部品１０の側壁部に当接するスロープ材を形成するスロープ材形成工程とは、図２に示した先の第１実施形態と同様であるが、上記載置工程では、図９に示すように、チップ部品１０と回路基板２０とが互いにずれた位置に配置されていてもよい。   FIG. 9 is an explanatory diagram showing a mounting method according to the present embodiment. Also in the present mounting method, the placing process of placing the chip component 10 on the circuit board 20 and the slope material forming process of forming the slope material that contacts the side wall portion of the chip component 10 are the same as those shown in FIG. However, as shown in FIG. 9, the chip component 10 and the circuit board 20 may be arranged at positions shifted from each other in the above placement step.

上記スロープ材３０を形成したならば、次に、吐出ヘッド３０１とチップ部品１０及び回路基板２０との位置合わせを行う。具体的には、チップ部品１０上に配列された接続端子１４のうち、例えば接続端子１４１，１４２と、それらに接続されるべき回路基板２０上の配線パターン２２１，２２２とを用いて吐出ヘッド３０１の位置合わせを行う。つまり、図２（ｃ）に示したカメラ１１１，１１２を用いて、接続端子１４１と配線パターン２２１、及び接続端子１４２と配線パターン２２２の平面画像を取得し、所定の画像処理と位置情報処理とによって、接続端子１４１の中心と、配線パターン２２１の幅方向の中心部とを結ぶ直線、及び接続端子１４２の中心と、配線パターン２２２の幅方向の中心部とを結ぶ直線に対して、吐出ヘッド３０１の進行方向を平行に位置合わせする。好ましくは、接続端子１４１又は１４２の中心を、吐出ヘッド３０１のノズル３２５が走査時に通過するように位置合わせする。   If the slope material 30 is formed, next, the ejection head 301 is aligned with the chip component 10 and the circuit board 20. Specifically, among the connection terminals 14 arranged on the chip component 10, for example, the discharge head 301 using the connection terminals 141 and 142 and the wiring patterns 221 and 222 on the circuit board 20 to be connected to them. Perform position alignment. That is, using the cameras 111 and 112 shown in FIG. 2C, planar images of the connection terminal 141 and the wiring pattern 221, and the connection terminal 142 and the wiring pattern 222 are acquired, and predetermined image processing and position information processing are performed. Thus, the ejection head is applied to a straight line connecting the center of the connection terminal 141 and the center portion of the wiring pattern 221 in the width direction and a straight line connecting the center of the connection terminal 142 and the center portion of the wiring pattern 222 in the width direction. The traveling direction of 301 is aligned in parallel. Preferably, the center of the connection terminal 141 or 142 is aligned so that the nozzle 325 of the ejection head 301 passes during scanning.

そして、上述したように位置合わせした状態で、吐出ヘッド３０１と回路基板２０とを相対的に移動させつつ、所定のタイミングで吐出ヘッド３０１のノズル３２５から液体材料を吐出して配置し、当該液体材料を乾燥、焼成することで、図９に示すように、接続端子１４とそれに対応する配線パターン２２とを接続する第１導電層３４１（接続配線）３４を正確に形成することができる。   The liquid material is ejected from the nozzle 325 of the ejection head 301 at a predetermined timing while the ejection head 301 and the circuit board 20 are relatively moved in the aligned state as described above. By drying and firing the material, as shown in FIG. 9, the first conductive layer 341 (connection wiring) 34 that connects the connection terminal 14 and the corresponding wiring pattern 22 can be accurately formed.

ところで、本実施形態の実装方法では、接続配線３４として複数の導電層を積層した構造のものを形成するため、以上の方法により第１導電層３４１を形成した後、さらに第１導電道３４１上に重ねて第２導電層を形成することになる。しかし、第１導電層３４１の形成に先立つ位置調整で基準に用いた接続端子１４及び配線パターン２２の上には、既に第１導電層３４１が形成されているため、第２導電層の形成時には、接続端子と配線パターンとを位置合わせ基準として用いることはできない。そこで、先の第１実施形態と同様に、本実施形態においても、第１導電層３４１を形成する際に、同時に回路基板２０上に平面視略十字状のアライメントマーク１５５，１５６を形成しておく。アライメントマーク１５５，１５６は、チップ部品１０上に形成してもよい。   By the way, in the mounting method according to the present embodiment, since the connection wiring 34 has a structure in which a plurality of conductive layers are stacked, the first conductive layer 341 is formed by the above method, and then further on the first conductive path 341. A second conductive layer is formed so as to overlap. However, since the first conductive layer 341 has already been formed on the connection terminal 14 and the wiring pattern 22 used as a reference in the position adjustment prior to the formation of the first conductive layer 341, when the second conductive layer is formed, The connection terminal and the wiring pattern cannot be used as the alignment reference. Therefore, as in the first embodiment, in this embodiment, when the first conductive layer 341 is formed, alignment marks 155 and 156 having a substantially cross shape in plan view are formed on the circuit board 20 at the same time. deep. The alignment marks 155 and 156 may be formed on the chip component 10.

第２導電層の形成時に、第１導電層３４１とともに形成したアライメントマーク１５５，１５６を位置合わせ基準に用いて吐出ヘッド３０１の位置合わせを行うことで、基板上に既設の第１導電層３４１に対して正確に吐出ヘッド３０１を位置合わせすることができ、第１導電層３４１上に正確に液体材料を配置することができる。これにより、正確な位置に正確な形状の接続配線３４を形成できるようになる。   When forming the second conductive layer, the ejection head 301 is aligned using the alignment marks 155 and 156 formed together with the first conductive layer 341 as the alignment reference, so that the first conductive layer 341 already provided on the substrate is aligned. In contrast, the ejection head 301 can be accurately positioned, and the liquid material can be accurately disposed on the first conductive layer 341. Thereby, it is possible to form the connection wiring 34 having an accurate shape at an accurate position.

このように第２実施形態に係る実装方法によれば、回路基板２０上に載置されるチップ部品１０の位置がずれている場合にも、正確に接続配線３４を形成することができるので、簡便な構造の実装装置を用いた場合にも、高歩留まりに電子デバイスの実装を行うことができる。また、チップ部品１０及び回路基板２０上のアライメントマーク１６１，１６２及びアライメントマーク１７１，１７２は必ずしも必要ないため、チップ部品１０及び回路基板２０の平面領域を配線等に有効に利用でき、集積度の向上に寄与する。   Thus, according to the mounting method according to the second embodiment, even when the position of the chip component 10 placed on the circuit board 20 is misaligned, the connection wiring 34 can be accurately formed. Even when a mounting apparatus having a simple structure is used, electronic devices can be mounted with a high yield. In addition, since the alignment marks 161, 162 and the alignment marks 171, 172 on the chip component 10 and the circuit board 20 are not necessarily required, the planar area of the chip component 10 and the circuit board 20 can be effectively used for wiring and the like. Contributes to improvement.

（電子機器）
図１０（ａ）は、本発明に係る電子機器の一例を示す斜視図である。この図に示す携帯電話１３００は、筐体の内部或いは表示部１３０１に、前述の方法を用いて得られる回路基板を備えている。図中、符号１３０２は操作ボタン１３０２、符号１３０３は受話口、符号１３０４は送話口を示している。
図１０（ｂ）は、（ａ）に示す表示部１３０１の斜視構成図である。表示部１３０１は、液晶表示装置や有機ＥＬ表示装置からなる表示パネル１３１１の一辺端に、電子デバイス１３１２を実装した回路基板１３１３を接続してなる構成を備えている。そして、この回路基板１３１３には、本発明の実装方法を用いて電子デバイスを実装された回路基板が好適に用いられており、回路基板上に薄型に電子デバイスが実装されているので、携帯電話１３００の薄型化、小型化を実現することができる。 (Electronics)
FIG. 10A is a perspective view showing an example of an electronic apparatus according to the present invention. A cellular phone 1300 shown in this figure includes a circuit board obtained by using the above-described method, in the housing or in the display portion 1301. In the figure, reference numeral 1302 denotes an operation button 1302, reference numeral 1303 denotes a mouthpiece, and reference numeral 1304 denotes a mouthpiece.
FIG. 10B is a perspective configuration diagram of the display unit 1301 shown in FIG. The display unit 1301 has a configuration in which a circuit board 1313 on which an electronic device 1312 is mounted is connected to one end of a display panel 1311 made of a liquid crystal display device or an organic EL display device. The circuit board 1313 is preferably a circuit board on which an electronic device is mounted using the mounting method of the present invention, and the electronic device is mounted thinly on the circuit board. 1300 can be made thinner and smaller.

前記実施の形態の回路基板は、前記携帯電話に限らず、電子ブック、パーソナルコンピュータ、ディジタルスチルカメラ、液晶テレビ、ビューファインダ型あるいはモニタ直視型のビデオテープレコーダ、カーナビゲーション装置、ページャ、電子手帳、電卓、ワードプロセッサ、ワークステーション、テレビ電話、ＰＯＳ端末、タッチパネルを備えた機器等々、種々の電子機器に適用することができる。いずれの電子機器においても、本発明の半導体装置を適用することで、薄型化、小型化を実現することができる。   The circuit board of the embodiment is not limited to the mobile phone, but an electronic book, a personal computer, a digital still camera, a liquid crystal television, a viewfinder type or a monitor direct-view type video tape recorder, a car navigation device, a pager, an electronic notebook, The present invention can be applied to various electronic devices such as a calculator, a word processor, a workstation, a video phone, a POS terminal, and a device equipped with a touch panel. In any electronic apparatus, the semiconductor device of the present invention can be applied to achieve a reduction in thickness and size.

実施形態に係る回路基板の平面構成図（ａ）及び断面構成図（ｂ）。FIG. 2A is a plan view of a circuit board according to an embodiment, and FIG. 第１実施形態の電子デバイスの実装方法を説明するための工程図。Process drawing for demonstrating the mounting method of the electronic device of 1st Embodiment. 液滴吐出装置の斜視構成図（ａ）及び吐出ヘッドの概略図（ｂ）。FIG. 2 is a perspective configuration diagram (a) of a droplet discharge device and a schematic diagram (b) of a discharge head. 第１実施形態に係る実装方法を説明するための回路基板の平面構成図。The plane block diagram of the circuit board for demonstrating the mounting method which concerns on 1st Embodiment. 位置調整工程を説明するために接続端子を拡大して示す図。The figure which expands and shows a connection terminal in order to demonstrate a position adjustment process. 第２実施形態に係る実装方法を説明するための回路基板の平面構成図。The plane block diagram of the circuit board for demonstrating the mounting method which concerns on 2nd Embodiment. 第２実施形態に係る実装方法を説明するための回路基板の平面構成図。The plane block diagram of the circuit board for demonstrating the mounting method which concerns on 2nd Embodiment. 第２実施形態に係る実装方法を説明するための回路基板の平面構成図。The plane block diagram of the circuit board for demonstrating the mounting method which concerns on 2nd Embodiment. 第２実施形態に係る実装方法を説明するための回路基板の平面構成図。The plane block diagram of the circuit board for demonstrating the mounting method which concerns on 2nd Embodiment. 電子機器の一例を示す斜視構成図（ａ）及び表示部の斜視構成図（ｂ）。The perspective block diagram (a) which shows an example of an electronic device, and the perspective block diagram (b) of a display part.

符号の説明Explanation of symbols

１０ チップ部品（電子デバイス）、１４，１４１，１４２ 接続端子、２０ 回路基板（基板）、２２，２２１，２２２ 配線パターン、２８ 導体パターン、３０ スロープ材、３４ 接続配線、３４１ 第１導電層、３６ 外部端子、１１１，１１２ カメラ（光学測定手段）、ＣＯＮＴ 制御装置、ＳＣ１，ＳＣ２ 撮像視野。

10 chip parts (electronic device), 14, 141, 142 connection terminal, 20 circuit board (substrate), 22, 221, 222 wiring pattern, 28 conductor pattern, 30 slope material, 34 connection wiring, 341 first conductive layer, 36 External terminal, 111, 112 camera (optical measuring means), CONT control device, SC1, SC2 imaging field of view.

Claims (8)

接続端子を具備した電子デバイスを、配線パターンを有する基板に実装する際に、前記接続端子と前記配線パターンとを電気的に接続する接続配線を、吐出ヘッドから接続配線形成用の液体材料を吐出する液滴吐出法により形成する電子デバイスの実装方法であって、
前記接続配線を形成する工程が、
前記接続端子を基準にして前記吐出ヘッドの位置合わせを行う第１の位置調整工程と、
前記電子デバイス及び前記基板上に前記液体材料を選択配置することで、前記接続端子と前記配線パターンとの間を接続する第１導電層を形成する第１導電層形成工程と、
前記液体材料を用いて前記電子デバイス上又は前記基板上にアライメントマークを形成するアライメントマーク形成工程と、
前記アライメントマークを基準に前記吐出ヘッドの位置合わせを行う第２の位置調整工程と、
前記第１導電層上に、前記液体材料を選択配置することで第２導電層を形成する第２導電層形成工程と、
を含む工程であることを特徴とする電子デバイスの実装方法。 When an electronic device having a connection terminal is mounted on a substrate having a wiring pattern, a connection wiring for electrically connecting the connection terminal and the wiring pattern is discharged from a discharge head from a liquid material for forming the connection wiring. A method for mounting an electronic device formed by a droplet discharge method,
Forming the connection wiring comprises:
A first position adjusting step for aligning the ejection head with reference to the connection terminal;
A first conductive layer forming step of forming a first conductive layer that connects between the connection terminal and the wiring pattern by selectively arranging the liquid material on the electronic device and the substrate;
An alignment mark forming step of forming an alignment mark on the electronic device or the substrate using the liquid material;
A second position adjusting step for aligning the ejection head with reference to the alignment mark;
A second conductive layer forming step of forming a second conductive layer by selectively disposing the liquid material on the first conductive layer;
A method for mounting an electronic device, comprising: 接続端子を具備した電子デバイスを、配線パターンを有する基板に実装する際に、前記接続端子と前記配線パターンとを電気的に接続する接続配線を、吐出ヘッドから接続配線形成用の液体材料を吐出する液滴吐出法により形成する電子デバイスの実装方法であって、
前記接続配線を形成する工程が、
前記接続端子と前記配線パターンとを結ぶ線に、前記吐出ヘッドの進行方向を一致させるように前記吐出ヘッドの位置合わせを行う第１の位置調整工程と、
前記電子デバイス及び基板上に前記液体材料を選択配置することで、前記接続端子と前記配線パターンとの間を接続する第１導電層を形成する第１導電層形成工程と、
前記液体材料を用いて前記電子デバイス上又は前記基板上にアライメントマークを形成するアライメントマーク形成工程と、
前記アライメントマークを基準に前記吐出ヘッドの位置合わせを行う第２の位置調整工程と、
前記第１導電層上に、さらに前記液体材料を選択配置することで第２導電層を形成する第２導電層形成工程と、
を含む工程であることを特徴とする電子デバイスの実装方法。 When an electronic device having a connection terminal is mounted on a substrate having a wiring pattern, a connection wiring for electrically connecting the connection terminal and the wiring pattern is discharged from a discharge head from a liquid material for forming the connection wiring. A method for mounting an electronic device formed by a droplet discharge method,
Forming the connection wiring comprises:
A first position adjusting step for aligning the ejection head with a line connecting the connection terminal and the wiring pattern so as to match the traveling direction of the ejection head;
A first conductive layer forming step of forming a first conductive layer for connecting between the connection terminal and the wiring pattern by selectively arranging the liquid material on the electronic device and the substrate;
An alignment mark forming step of forming an alignment mark on the electronic device or the substrate using the liquid material;
A second position adjusting step for aligning the ejection head with reference to the alignment mark;
A second conductive layer forming step of forming a second conductive layer by selectively disposing the liquid material on the first conductive layer;
A method for mounting an electronic device, comprising: 前記第２導電層形成工程の後に、
前記第２導電層上にさらに前記液体材料を選択配置することで３層以上の導電層の積層構造を具備した前記接続配線を形成することを特徴とする請求項１又は２に記載の電子デバイスの実装方法。 After the second conductive layer forming step,
3. The electronic device according to claim 1, wherein the connection wiring having a laminated structure of three or more conductive layers is formed by selectively disposing the liquid material on the second conductive layer. 4. How to implement 辺端部近傍に複数の前記接続端子が配列形成されてなる前記電子デバイスを、前記各接続端子に対応する配線パターンを具備した前記基板に実装するに際して、
前記吐出ヘッドとして、所定間隔でノズルが配列形成された吐出ヘッドを用い、
前記吐出ヘッドの一走査期間に前記複数のノズルから前記液体材料を吐出することで、複数の前記接続配線を形成することを特徴とする請求項１から３のいずれか１項に記載の電子デバイスの実装方法。 When mounting the electronic device in which a plurality of the connection terminals are arranged in the vicinity of a side edge portion on the substrate having a wiring pattern corresponding to each connection terminal,
As the ejection head, an ejection head in which nozzles are arranged at predetermined intervals is used.
4. The electronic device according to claim 1, wherein the plurality of connection wirings are formed by discharging the liquid material from the plurality of nozzles during one scanning period of the discharge head. 5. How to implement 前記アライメントマークとして、平面視略十字状であって、その一線分部が前記吐出ヘッドの進行方向と平行であるアライメントマークを形成することを特徴とする請求項１から４のいずれか１項に記載の電子デバイスの実装方法。   5. The alignment mark according to claim 1, wherein the alignment mark has a substantially cross shape in a plan view, and a line segment portion of the alignment mark is parallel to a traveling direction of the ejection head. 6. The mounting method of the electronic device of description. 前記接続配線を形成する工程に先立って、
前記基板上に載置された電子デバイスの能動面と、前記基板の実装面との段差を緩和するためのスロープ材を形成するスロープ材形成工程を含むことを特徴とする請求項１から５のいずれか１項に記載の電子デバイスの実装方法。 Prior to the step of forming the connection wiring,
6. A slope material forming step of forming a slope material for relaxing a step between an active surface of an electronic device placed on the substrate and a mounting surface of the substrate. The electronic device mounting method according to any one of the preceding claims. 請求項１から６のいずれか１項に記載の実装方法を用いて得られたことを特徴とする回路基板。   A circuit board obtained by using the mounting method according to claim 1. 請求項７に記載の回路基板を備えたことを特徴とする電子機器。
An electronic apparatus comprising the circuit board according to claim 7.
JP2004325074A 2004-11-09 2004-11-09 Packaging method of electronic device, circuit board, and electronic equipment Withdrawn JP2006135236A (en)

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JP2009038331A (en) * 2007-07-11 2009-02-19 Sony Corp Method of electrically connecting element to wiring, method of producing light-emitting element assembly, and light-emitting element assembly
US7838410B2 (en) 2007-07-11 2010-11-23 Sony Corporation Method of electrically connecting element to wiring, method of producing light-emitting element assembly, and light-emitting element assembly
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