JP2003218066A - Polishing method for semiconductor wafer - Google Patents

Polishing method for semiconductor wafer

Info

Publication number
JP2003218066A
JP2003218066A JP2002018016A JP2002018016A JP2003218066A JP 2003218066 A JP2003218066 A JP 2003218066A JP 2002018016 A JP2002018016 A JP 2002018016A JP 2002018016 A JP2002018016 A JP 2002018016A JP 2003218066 A JP2003218066 A JP 2003218066A
Authority
JP
Japan
Prior art keywords
polishing
wafer
abrasive
etching solution
semiconductor wafer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002018016A
Other languages
Japanese (ja)
Inventor
Toru Taniguchi
徹 谷口
Fumihiko Yoshida
文彦 吉田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumco Corp
Original Assignee
Sumitomo Mitsubishi Silicon Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Mitsubishi Silicon Corp filed Critical Sumitomo Mitsubishi Silicon Corp
Priority to JP2002018016A priority Critical patent/JP2003218066A/en
Publication of JP2003218066A publication Critical patent/JP2003218066A/en
Pending legal-status Critical Current

Links

Landscapes

  • Grinding And Polishing Of Tertiary Curved Surfaces And Surfaces With Complex Shapes (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a polishing method for semiconductor wafers for maintaining the cleanliness of wafers, without causing marks due to polishing abrasive on the surface of the wafers. <P>SOLUTION: In the polishing method for semiconductor wafers, a polishing roller 14 where polishing cloth is extended on the surface to made to face a chamfer surface 10 of a semiconductor wafer 10, and the polishing roller is rotated, while an abrasive 13 is being supplied, to come into contact with the chamfer surface of the wafer, thus allowing the chamfered surface to be subjected to mirror-surface polishing. Such a characteristic configuration can be achieved by setting the abrasive to be an etching liquid. <P>COPYRIGHT: (C)2003,JPO

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【発明の属する技術分野】本発明は、面取り鏡面研磨
(Polishing Corner Rounding;PCR)工程において
チャック跡の形成を防止した半導体ウェーハの研磨方法
に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for polishing a semiconductor wafer in which chuck marks are prevented from being formed in a chamfering mirror polishing (PCR) process.

【0002】[0002]

【従来の技術】一般に半導体シリコンウェーハの製造工
程は、先ず引上げたシリコン単結晶インゴットをスライ
スして得られたウェーハを、面取り、機械研磨(ラッピ
ング)、エッチング、PCR、鏡面研磨(ポリッシン
グ)及び洗浄する工程から構成され、高精度の平坦度を
有するウェーハとして生産される。これらの工程は目的
により、その一部の工程が入替えられたり、複数回繰返
されたり、或いは熱処理、研削等他の工程が付加、置換
されたりして種々の工程が行われる。
2. Description of the Related Art Generally, a semiconductor silicon wafer is manufactured by chamfering, mechanical polishing (lapping), etching, PCR, mirror polishing (polishing) and cleaning of a wafer obtained by slicing a pulled silicon single crystal ingot. And is manufactured as a wafer having a highly accurate flatness. Depending on the purpose, some of these steps are replaced with each other, repeated a plurality of times, or other steps such as heat treatment and grinding are added or replaced to perform various steps.

【0003】従来このPCR工程は、ウェーハをチャッ
クに吸着保持させ、この状態で表面に研磨布が展張され
た鼓状の研磨ローラを回転させ、研磨砥粒を含むスラリ
ーからなる研磨剤を供給しながらこの回転中の研磨ロー
ラの研磨作用面にウェーハ面取り面を接触させることに
より、この面取り面を鏡面研磨していた。
In the conventional PCR process, a wafer is sucked and held by a chuck, and in this state, a drum-shaped polishing roller having a polishing cloth spread on its surface is rotated to supply an abrasive agent made of a slurry containing abrasive grains. However, the chamfered surface is mirror-polished by bringing the chamfered surface of the wafer into contact with the polishing action surface of the rotating polishing roller.

【0004】[0004]

【発明が解決しようとする課題】しかし、上記従来の方
法では、図4に示すように、スラリーに含まれる研磨砥
粒がチャックのウェーハ接触面に凝固し、ウェーハとチ
ャックとの接触によりこの凝固物がウェーハ表面に傷を
付けて、ウェーハ1の表面にチャック跡2を残す問題が
あった。また、研磨砥粒を含むスラリーを研磨剤として
使用することによって、スラリー中に溶解している遷移
金属等の不純物金属がウェーハに吸着し、その後研磨装
置を駆動する際に生じる圧力や温度を駆動力としてウェ
ーハ中に拡散してウェーハの清浄度が低下してしまう問
題もあった。
However, in the above-mentioned conventional method, as shown in FIG. 4, the abrasive grains contained in the slurry are solidified on the wafer contact surface of the chuck, and the solidification is caused by the contact between the wafer and the chuck. There is a problem that the object scratches the wafer surface and leaves the chuck mark 2 on the surface of the wafer 1. In addition, by using a slurry containing abrasive grains as a polishing agent, impurity metals such as transition metals dissolved in the slurry are adsorbed on the wafer, and the pressure and temperature generated when the polishing machine is subsequently driven are driven. There is also a problem that the cleanliness of the wafer is lowered due to diffusion into the wafer as a force.

【0005】本発明の目的は、研磨砥粒を起因とする傷
をウェーハ表面に生じない半導体ウェーハの研磨方法を
提供することにある。本発明の別の目的は、ウェーハの
清浄度を維持し得る半導体ウェーハの研磨方法を提供す
ることにある。
An object of the present invention is to provide a method for polishing a semiconductor wafer which does not cause scratches on the surface of the wafer due to abrasive grains. Another object of the present invention is to provide a method for polishing a semiconductor wafer capable of maintaining the cleanliness of the wafer.

【0006】[0006]

【課題を解決するための手段】請求項1に係る発明は、
図1に示すように、表面に研磨布が展張された研磨ロー
ラ14を半導体ウェーハ10の面取り面10aと対向さ
せ、研磨剤13を供給しながら研磨ローラ14を回転さ
せてウェーハ10の面取り面10aに接触させることに
より面取り面10aを鏡面研磨する半導体ウェーハの研
磨方法の改良である。この特徴ある構成は、研磨剤13
がエッチング液からなるところにある。
The invention according to claim 1 is
As shown in FIG. 1, a polishing roller 14 having a polishing cloth spread on the surface thereof is opposed to the chamfered surface 10a of the semiconductor wafer 10, and the polishing roller 14 is rotated while supplying the polishing agent 13 to rotate the chamfered surface 10a of the wafer 10. This is an improvement of the polishing method for a semiconductor wafer, in which the chamfered surface 10a is mirror-polished by contacting with the. This characteristic constitution is that the polishing agent 13
Is composed of an etching solution.

【0007】請求項1に係る発明では、従来研磨砥粒を
含むスラリーからなる研磨剤を使用していたときにチャ
ックのウェーハ接触面に形成されていた研磨砥粒の凝固
物を生じることがない。従って、ウェーハ表面に凝固物
を起因とする傷を生じることがなく、ウェーハ表面にチ
ャック跡が形成されない。また、従来研磨砥粒を含むス
ラリーに溶解している遷移金属による汚染を抑制できる
ため、ウェーハ表面の清浄度を維持することができる。
According to the first aspect of the present invention, the solidification product of the polishing abrasive grains formed on the wafer contact surface of the chuck is not generated when the conventional abrasive containing the slurry containing the polishing abrasive grains is used. . Therefore, scratches caused by the solidified matter are not generated on the wafer surface, and chuck marks are not formed on the wafer surface. In addition, since it is possible to suppress the contamination by the transition metal that is conventionally dissolved in the slurry containing the abrasive grains, the cleanliness of the wafer surface can be maintained.

【0008】[0008]

【発明の実施の形態】次に本発明の実施の形態を図面に
基づいて説明する。本発明の研磨方法はPCR工程によ
り施される方法であり、このPCR工程の前に以下の工
程を経ることによりウェーハ加工される。
DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, embodiments of the present invention will be described with reference to the drawings. The polishing method of the present invention is a method performed by a PCR step, and a wafer is processed by performing the following steps before this PCR step.

【0009】先ず、育成されたシリコン単結晶インゴッ
トは、先端部及び終端部を切断してブロック状とし、イ
ンゴットの直径を均一にするためにインゴットの外径を
研削してブロック体とする。特定の結晶方位を示すため
に、このブロック体にオリエンテーションフラットやオ
リエンテーションノッチを施す。オリエンテーションフ
ラットやノッチはデバイスプロセスにおけるマスク合わ
せ等の位置の基準に使用される。このプロセスの後、ブ
ロック体は棒軸方向に対して所定角度をもってブレード
により複数枚のウェーハにスライスされる。スライスさ
れたウェーハは、ウェーハの周辺部の欠けやチップを防
止するためにウェーハ周辺に面取り加工する。この面取
りを施すことにより、例えば面取りされていないシリコ
ンウェーハ表面上にエピタキシャル成長するときに周辺
部に異常成長が起こり環状に盛り上がるクラウン現象を
抑制することができる。
First, the grown silicon single crystal ingot is cut into a block shape by cutting the tip and the end, and the outer diameter of the ingot is ground into a block body to make the diameter of the ingot uniform. Orientation flats and orientation notches are applied to this block body to show a specific crystal orientation. Orientation flats and notches are used as reference positions for mask alignment in the device process. After this process, the block body is sliced into a plurality of wafers by a blade at a predetermined angle with respect to the rod axis direction. The sliced wafer is chamfered around the wafer in order to prevent chips and chips at the peripheral portion of the wafer. By carrying out this chamfering, for example, when epitaxially growing on a surface of a silicon wafer which is not chamfered, it is possible to suppress the crown phenomenon in which abnormal growth occurs in the peripheral portion and rises annularly.

【0010】次いで、スライスや面取り等の機械加工に
よりウェーハ表裏面に生じた加工変質層を機械研磨(ラ
ッピング)してウェーハ表面の平坦度とウェーハの平行
度を高める。ラッピングを施したウェーハは洗浄されて
次工程へと送られる。次に、エッチングを施すことによ
り、ウェーハ表裏面の加工変質層を取除く。エッチング
におけるエッチング液は酸エッチング液でもアルカリエ
ッチング液でもよく特に限定されない。
Next, the work-affected layer formed on the front and back surfaces of the wafer by mechanical processing such as slicing or chamfering is mechanically polished (lapping) to increase the flatness of the wafer surface and the parallelism of the wafer. The lapped wafer is cleaned and sent to the next step. Next, etching is performed to remove the work-affected layer on the front and back surfaces of the wafer. The etching solution for etching may be an acid etching solution or an alkaline etching solution and is not particularly limited.

【0011】エッチングを終えたウェーハは、PCR工
程を施すことにより、ウェーハ面取り面を鏡面研磨す
る。図1に面取り鏡面研磨装置を示す。面取り鏡面研磨
装置は、上下よりウェーハ10を挟み込み、ウェーハを
水平回転させる上及び下チャック11,12と、研磨剤
13を供給する配管13aと、ウェーハ面取り面を鏡面
研磨する研磨ローラ14から構成される。
The wafer after etching is subjected to a PCR process so that the chamfered surface of the wafer is mirror-polished. FIG. 1 shows a chamfered mirror polishing device. The chamfered mirror polishing apparatus is composed of upper and lower chucks 11 and 12 for sandwiching a wafer 10 from above and below and horizontally rotating the wafer, a pipe 13a for supplying a polishing agent 13, and a polishing roller 14 for polishing the wafer chamfered surface to a mirror surface. It

【0012】上及び下チャック11,12にはそれぞれ
支軸11a、12aが設けられ、更に図示しない回転モ
ータが接続される。上及び下チャック11,12はウェ
ーハ径より小径に構成され、ウェーハ10を上下より挟
み込むことにより、ウェーハの面取り面10aのみが露
出する程度の大きさを有する。研磨ローラ14は鼓状に
形成され、その表面に研磨布が展張される。研磨布には
ポリエステルフェルト、ラミネート等が使用される。研
磨ローラ14には支軸14aが設けられ、図示しない回
転モータにより回転し、ウェーハの面取り面と研磨ロー
ラ14表面が対向するように配置される。配管13aは
ウェーハ面取り面に研磨剤13を供給する位置に設けら
れる。
Support shafts 11a and 12a are provided on the upper and lower chucks 11 and 12, respectively, and a rotary motor (not shown) is further connected thereto. The upper and lower chucks 11 and 12 are formed to have a diameter smaller than the wafer diameter, and have a size such that only the chamfered surface 10a of the wafer is exposed by sandwiching the wafer 10 from above and below. The polishing roller 14 is formed in a drum shape, and a polishing cloth is spread on the surface thereof. Polyester felt, laminate, etc. are used for the polishing cloth. The polishing roller 14 is provided with a support shaft 14a, which is rotated by a rotation motor (not shown) so that the chamfered surface of the wafer and the surface of the polishing roller 14 face each other. The pipe 13a is provided at a position where the polishing agent 13 is supplied to the chamfered surface of the wafer.

【0013】本発明の特徴ある構成は、研磨剤13がエ
ッチング液からなるところにある。研磨剤に使用される
エッチング液はシリコンをエッチングする能力を有する
アルカリエッチング溶液が挙げられ、このアルカリエッ
チング溶液は水酸化カリウム、水酸化ナトリウム、アミ
ン化合物、水酸化テトラメチルアンモニウムがそれぞれ
選択される。アルカリエッチング液のpHは9〜11で
ある。好ましいpHは9.5〜10.5である。エッチ
ング液のpHが下限値未満であると、研磨レートが小さ
くなり、鏡面研磨に時間がかかるため、スループットが
低下する。上限値を越えるとウェーハが面粗れを起こし
やすくなる不具合を生じる。
A characteristic feature of the present invention is that the abrasive 13 is composed of an etching solution. Examples of the etching solution used for the polishing agent include an alkali etching solution having an ability to etch silicon, and potassium hydroxide, sodium hydroxide, an amine compound, and tetramethylammonium hydroxide are selected as the alkali etching solution. The pH of the alkaline etching solution is 9-11. The preferred pH is 9.5 to 10.5. If the pH of the etching solution is less than the lower limit value, the polishing rate becomes small, and mirror polishing takes time, resulting in a decrease in throughput. If the upper limit is exceeded, the surface roughness of the wafer is likely to occur.

【0014】加工装置の構造や大きさにより前後する
が、研磨剤の供給量は、200〜1500ml/分であ
る。下限値未満ではウェーハ表面に傷が発生し易く、割
れや欠け等を生じるおそれもある。上限値を越えると研
磨剤によってウェーハ表面が浸食される不具合がある。
研磨ローラの回転速度は特に限定されないが、通常は1
00〜1000rpmである。回転速度が下限値未満で
あると研磨レートが低下し、上限値を越えると、研磨む
らが起きる。研磨ローラをウェーハ面取り面に接触させ
る際の研磨圧力は特に限定されないが、1〜2kgであ
る。下限値未満では研磨レートが低下し、上限値を越え
るとウェーハ表面に傷が発生し易く、割れや欠け等を生
じるおそれもある。
Although it depends on the structure and size of the processing apparatus, the supply amount of the abrasive is 200 to 1500 ml / min. If it is less than the lower limit, scratches are likely to occur on the wafer surface, and cracks or chips may occur. If it exceeds the upper limit, there is a problem that the wafer surface is eroded by the polishing agent.
The rotation speed of the polishing roller is not particularly limited, but is usually 1
It is from 00 to 1000 rpm. If the rotation speed is less than the lower limit value, the polishing rate decreases, and if it exceeds the upper limit value, uneven polishing occurs. The polishing pressure when the polishing roller is brought into contact with the chamfered surface of the wafer is not particularly limited, but is 1 to 2 kg. If it is less than the lower limit, the polishing rate is lowered, and if it is more than the upper limit, scratches are likely to occur on the wafer surface, and cracks or chips may occur.

【0015】本発明の研磨剤にはエッチング液の他に更
に研磨砥粒を含んでもよく、このときの研磨砥粒の含有
量は研磨剤100重量%に対して1重量%以下の割合で
ある。上記範囲内程度の微量の研磨砥粒であれば、研磨
剤に含まれる研磨砥粒が凝固し、ウェーハ表面に傷を生
じるおそれもなく、更に研磨レートを高めることができ
る。
The abrasive of the present invention may further contain abrasive grains in addition to the etching liquid. The content of the abrasive grains at this time is 1% by weight or less relative to 100% by weight of the abrasive. . If the amount of the polishing abrasive grains is within the above range, the polishing abrasive grains contained in the polishing agent will not solidify and scratch the wafer surface, and the polishing rate can be further increased.

【0016】この面取り鏡面研磨装置によりウェーハを
研磨する場合には、ウェーハ10を上及び下チャック1
1,12により挟み込み、図示しない回転モータにより
水平回転させる。配管13aより研磨液13を滴下しな
がら研磨ローラ14を回転させてウェーハの面取り面に
接触させることにより面取り面を鏡面研磨する。エッチ
ング液からなる研磨剤を用いて面取り面鏡面研磨を施す
ことにより、従来研磨砥粒を起因とするチャックのウェ
ーハ接触面に形成されていた凝固物の基となる研磨砥粒
が含まれないため、ウェーハとチャックとの接触によっ
てもウェーハ表面に傷が形成されない。
When polishing a wafer with this chamfered mirror polishing apparatus, the wafer 10 is moved to the upper and lower chucks 1
It is sandwiched by 1 and 12 and horizontally rotated by a rotation motor (not shown). The chamfered surface is mirror-polished by rotating the polishing roller 14 while contacting the chamfered surface of the wafer while dropping the polishing liquid 13 from the pipe 13a. By performing chamfered surface mirror polishing using an abrasive composed of an etching solution, the polishing abrasive grains that are the base of the solidified product that was formed on the wafer contact surface of the chuck due to the conventional polishing abrasive grains are not included. No scratches are formed on the wafer surface even when the wafer and the chuck are in contact with each other.

【0017】次に、PCR加工を終えたウェーハ表面に
機械的ないし物理的研磨と化学的研磨とを組合わせた鏡
面研磨を施すことにより、光学的光沢をもち加工歪みの
ない鏡面ウェーハを形成する。表面鏡面研磨を終えたウ
ェーハは洗浄され、デバイス製造プロセスへと送られ
る。
Next, the PCR-finished wafer surface is subjected to mirror-polishing, which is a combination of mechanical or physical polishing and chemical polishing, to form a mirror-polished wafer having optical gloss and no processing distortion. . The wafer after the surface mirror polishing is cleaned and sent to a device manufacturing process.

【0018】なお、本実施の形態では、上及び下チャッ
クに限らず、どちらかの片面チャックでも良い。また、
研磨ローラを鼓状としたが、図2に示すようなリング状
の研磨ローラでも良い。この研磨ローラ20は内周面が
研磨作用面となり、この作用面の全周にわたって面取り
用の溝21が刻まれた面取り用研磨ローラである。符号
22はチャック、23は支軸、24は回転モータをそれ
ぞれ示す。
In the present embodiment, not only the upper and lower chucks but either one-sided chuck may be used. Also,
Although the polishing roller has a drum shape, it may be a ring-shaped polishing roller as shown in FIG. The polishing roller 20 is a polishing roller for chamfering, the inner peripheral surface of which serves as a polishing working surface, and a groove 21 for chamfering is engraved over the entire circumference of this working surface. Reference numeral 22 is a chuck, 23 is a support shaft, and 24 is a rotary motor.

【0019】[0019]

【実施例】次に本発明の実施例を比較例とともに説明す
る。 <実施例>先ず、面取り、ラッピング及びエッチングを
終えたウェーハを用意した。次いで、研磨剤として2w
t%のピペラジンと0.2wt%のKOH及び0.1w
t%のキレート剤をそれぞれ混合し、更に水で20倍に
希釈して調製した。次に、このウェーハをPCR加工機
(不二越機械社製、SCP−200)のチャックに保持
し、研磨剤をPCR加工面近傍に滴下しながらウェーハ
面取り面をPCR加工した。
EXAMPLES Next, examples of the present invention will be described together with comparative examples. <Example> First, a wafer after chamfering, lapping and etching was prepared. Then, 2w as an abrasive
t% piperazine, 0.2 wt% KOH and 0.1 w
It was prepared by mixing each t% chelating agent and further diluting it 20 times with water. Next, this wafer was held on a chuck of a PCR processing machine (SCP-200 manufactured by Fujikoshi Machinery Co., Ltd.), and the chamfered surface of the wafer was subjected to PCR processing while dripping an abrasive near the PCR processing surface.

【0020】<比較例>エッジミラーIV(スピードファ
ム社製)を水で20倍に希釈したものを砥粒が含まれた
研磨剤として用いた以外は実施例と同様にしてウェーハ
のPCR加工を行った。
Comparative Example A wafer was subjected to PCR processing in the same manner as in Example except that an edge mirror IV (manufactured by Speedfam) diluted 20 times with water was used as an abrasive containing abrasive grains. went.

【0021】<比較試験及び評価>実施例及び比較例で
PCR加工を終えたウェーハをそれぞれアルカリ洗浄し
た。洗浄を終えたウェーハをハロゲン灯の下で目視によ
り外観不良検査を行った。合否判定は、チャック跡と認
識されるものを不合格と判断した。検査結果を図3に示
す。
<Comparison Test and Evaluation> The wafers subjected to the PCR processing in the examples and the comparison examples were washed with alkali. The appearance of the cleaned wafer was visually inspected under a halogen lamp. In the pass / fail judgment, those recognized as chuck marks were judged to be unacceptable. The inspection result is shown in FIG.

【0022】図3より明らかなように、従来より使用さ
れている砥粒が含まれている研磨剤を使用した比較例で
は、ウェーハ表面にチャックとの接触箇所の跡が残るも
のが多く、87%が外観不良として不合格と判断され
た。これに対して無砥粒研磨剤を使用した実施例では、
チャック跡と認識される傷は殆ど認められず、4%のみ
が外観不良として不合格と判断されたのみで、外観不良
率が大幅に低減されたことが判る。
As is clear from FIG. 3, in the comparative examples using the abrasives containing the abrasive grains which have been conventionally used, many marks of contact points with the chuck remain on the wafer surface. % Was judged to be unacceptable due to poor appearance. On the other hand, in the example using the abrasive-free abrasive,
It was found that scratches recognized as chuck marks were scarcely recognized, and only 4% was judged to be unacceptable as a defective appearance, and the defective appearance rate was significantly reduced.

【0023】[0023]

【発明の効果】以上述べたように、本発明の半導体ウェ
ーハの研磨方法は、表面に研磨布が展張された研磨ロー
ラを半導体ウェーハの面取り面と対向させ、研磨剤を供
給しながら研磨ローラを回転させてウェーハの面取り面
に接触させることにより面取り面を鏡面研磨する方法の
改良であり、研磨剤がエッチング液からなることを特徴
とする。研磨砥粒を含むスラリーを使用していないた
め、ウェーハとチャックとの接触部に研磨砥粒が凝固し
た凝固物が形成されることなく、ウェーハ表面にこの凝
固物を起因とする傷を生じない。また研磨砥粒を含むス
ラリーを使用していないため、遷移金属等の不純物金属
に汚染されることがなく、ウェーハの清浄度を維持する
ことができる。
As described above, according to the method for polishing a semiconductor wafer of the present invention, the polishing roller having a polishing cloth spread on the surface is opposed to the chamfered surface of the semiconductor wafer, and the polishing roller is supplied while supplying the polishing agent. This is an improvement in a method of mirror-polishing a chamfered surface by rotating the chamfered surface so that the chamfered surface is brought into contact with the chamfered surface, and the polishing agent is an etching solution. Since the slurry containing the abrasive grains is not used, the solidified substance of the abrasive grains is not formed at the contact portion between the wafer and the chuck, and the scratches caused by the solidified substance on the wafer surface are not generated. . Further, since the slurry containing polishing abrasive grains is not used, the cleanliness of the wafer can be maintained without being contaminated by impurity metals such as transition metals.

【図面の簡単な説明】[Brief description of drawings]

【図1】PCR工程に使用される面取り鏡面研磨装置の
断面構成図。
FIG. 1 is a cross-sectional configuration diagram of a chamfered mirror polishing device used in a PCR process.

【図2】別の面取り鏡面研磨装置の斜視図。FIG. 2 is a perspective view of another chamfered mirror polishing device.

【図3】実施例及び比較例のPCR処理後における外観
不良率を示す図。
FIG. 3 is a diagram showing a defective appearance rate after PCR processing in Examples and Comparative Examples.

【図4】従来のPCR工程を施すことにより表面にチャ
ック跡が形成されたウェーハの平面図。
FIG. 4 is a plan view of a wafer having chuck marks formed on its surface by performing a conventional PCR process.

【符号の説明】[Explanation of symbols]

10 ウェーハ 10a 面取り面 13 研磨剤 14,20 研磨ローラ 10 wafers 10a Chamfer 13 Abrasive 14,20 Polishing roller

Claims (4)

【特許請求の範囲】[Claims] 【請求項1】 表面に研磨布が展張された研磨ローラ(1
4,20)を半導体ウェーハ(10)の面取り面(10a)と対向さ
せ、研磨剤(13)を供給しながら前記研磨ローラ(14,20)
を回転させて前記ウェーハ(10)の面取り面(10a)に接触
させることにより前記面取り面(10a)を鏡面研磨する半
導体ウェーハの研磨方法において、 前記研磨剤(13)がエッチング液からなることを特徴とす
る半導体ウェーハの研磨方法。
1. A polishing roller (1) having a polishing cloth spread on the surface thereof.
4,20) is opposed to the chamfered surface (10a) of the semiconductor wafer (10), the polishing roller (14,20) while supplying the polishing agent (13).
In the method for polishing a semiconductor wafer in which the chamfered surface (10a) of the wafer (10) is brought into contact with the chamfered surface (10a) by mirror polishing, the polishing agent (13) is composed of an etching solution. A characteristic method for polishing a semiconductor wafer.
【請求項2】 エッチング液がアルカリエッチング溶液
であって、前記アルカリエッチング溶液が水酸化カリウ
ム、水酸化ナトリウム、アミン化合物又は水酸化テトラ
メチルアンモニウムを含む請求項1記載の研磨方法。
2. The polishing method according to claim 1, wherein the etching solution is an alkali etching solution, and the alkali etching solution contains potassium hydroxide, sodium hydroxide, an amine compound or tetramethylammonium hydroxide.
【請求項3】 アルカリエッチング液のpHが9〜11
である請求項1又は2記載の研磨方法。
3. The pH of the alkaline etching solution is 9-11.
The polishing method according to claim 1 or 2.
【請求項4】 研磨剤(13)がエッチング液の他に更に研
磨砥粒を含み、前記研磨砥粒の含有量が研磨剤100重
量%に対して1重量%以下の割合である請求項1ないし
3いずれか記載の研磨方法。
4. The abrasive (13) further contains abrasive grains in addition to the etching liquid, and the content of the abrasive grains is 1% by weight or less relative to 100% by weight of the abrasive. 4. The polishing method according to any one of 3 to 3.
JP2002018016A 2002-01-28 2002-01-28 Polishing method for semiconductor wafer Pending JP2003218066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2002018016A JP2003218066A (en) 2002-01-28 2002-01-28 Polishing method for semiconductor wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002018016A JP2003218066A (en) 2002-01-28 2002-01-28 Polishing method for semiconductor wafer

Publications (1)

Publication Number Publication Date
JP2003218066A true JP2003218066A (en) 2003-07-31

Family

ID=27653503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002018016A Pending JP2003218066A (en) 2002-01-28 2002-01-28 Polishing method for semiconductor wafer

Country Status (1)

Country Link
JP (1) JP2003218066A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011091143A (en) * 2009-10-21 2011-05-06 Sumco Corp Method of manufacturing silicon epitaxial wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011091143A (en) * 2009-10-21 2011-05-06 Sumco Corp Method of manufacturing silicon epitaxial wafer

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