JP2003091270A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2003091270A5 JP2003091270A5 JP2002139086A JP2002139086A JP2003091270A5 JP 2003091270 A5 JP2003091270 A5 JP 2003091270A5 JP 2002139086 A JP2002139086 A JP 2002139086A JP 2002139086 A JP2002139086 A JP 2002139086A JP 2003091270 A5 JP2003091270 A5 JP 2003091270A5
- Authority
- JP
- Japan
- Prior art keywords
- image signal
- correction
- circuit
- phase
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 238000012937 correction Methods 0.000 claims 42
- 238000012545 processing Methods 0.000 claims 16
- 238000011161 development Methods 0.000 claims 15
- 238000006243 chemical reaction Methods 0.000 claims 6
- 238000000034 method Methods 0.000 claims 4
- 238000012546 transfer Methods 0.000 claims 3
Claims (14)
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置に用いる画像処理回路であって、
入力画像信号を補正して補正済画像信号を生成する補正手段と、
前記補正済画像信号を複数の系統に分割するとともに時間軸伸張して、複数系統に相展開された相展開画像信号を生成する生成手段と、
前記データ線を複数本毎にまとめたブロック毎に各データ線に対応する相展開画像信号を供給する手段とを備え、
前記補正手段は前記ブロックに供給される前記相展開画像信号に発生する前記系統毎の誤差に基づいて生成された補正データを輝度レベル毎に分けて記憶する補正テーブルを備え、当該補正テーブルから補正データを読み出して補正信号を生成し、当該補正信号に基づき前記入力画像信号を補正して前記補正済画像信号を生成すること、
を特徴とする画像処理回路。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
An image processing circuit used in an electro-optical device having a pixel electrode provided corresponding to the switching element,
Correction means for correcting the input image signal to generate a corrected image signal;
Generating means for dividing the corrected image signal into a plurality of systems and extending the time axis to generate a phase expanded image signal phase expanded into a plurality of systems;
Means for supplying a phase development image signal corresponding to each data line for each block in which the data lines are grouped into a plurality of lines,
The correction unit includes a correction table that stores correction data generated based on the error for each system generated in the phase development image signal supplied to the block for each luminance level, and performs correction from the correction table. Reading the data to generate a correction signal, correcting the input image signal based on the correction signal to generate the corrected image signal;
An image processing circuit.
前記輝度レベル判定回路は前記入力画像信号の輝度レベルと、基準レベルとを比較して判定信号を出力し、
前記補間回路は前記判定信号に基づいて、前記補正テーブルの中から複数の補正テーブルを選択して、当該選択された補正テーブルから前記補正データを読出し、当該読み出した補正データを補間することで、前記補正信号を生成することを特徴とする請求項1に記載の画像処理回路。The correction means includes a plurality of correction tables each corresponding to a luminance level, a luminance level determination circuit, and an interpolation circuit,
The luminance level determination circuit compares the luminance level of the input image signal with a reference level and outputs a determination signal;
The interpolation circuit selects a plurality of correction tables from the correction table based on the determination signal, reads the correction data from the selected correction table, and interpolates the read correction data, The image processing circuit according to claim 1, wherein the correction signal is generated.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置に用いる画像処理回路であって、
入力画像信号を補正して補正済画像信号を生成する補正回路と、
前記補正済画像信号を複数の系統に分割するとともに時間軸伸張して、複数系統に相展開された相展開画像信号を生成する相展開回路と、
前記相展開画像信号の基準電位に対する電圧レベルを所定周期で反転させる反転回路と、
前記データ線を複数本毎にまとめたブロック毎に各データ線に対応する相展開画像信号を供給する手段と、
を備え、
前記補正回路は前記相展開回路から前記反転回路までのの伝達特性によって前記相展開画像信号に生じる誤差を補正することで、前記補正済画像信号を生成すること、
を特徴とする画像処理回路。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
An image processing circuit used in an electro-optical device having a pixel electrode provided corresponding to the switching element,
A correction circuit for correcting the input image signal to generate a corrected image signal;
A phase expansion circuit that divides the corrected image signal into a plurality of systems and expands the time axis to generate a phase expanded image signal that is phase expanded into a plurality of systems;
An inverting circuit for inverting a voltage level with respect to a reference potential of the phase development image signal at a predetermined period;
Means for supplying a phase development image signal corresponding to each data line for each block in which the data lines are grouped into a plurality of lines;
With
The correction circuit generates the corrected image signal by correcting an error generated in the phase development image signal by a transfer characteristic from the phase development circuit to the inversion circuit;
An image processing circuit.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置に用いる画像処理回路であって、
入力画像信号を補正して補正済画像信号を生成する補正回路と、
前記補正済画像信号を複数の系統に分割するとともに時間軸伸張して、複数系統に相展開された相展開画像信号を生成する相展開回路と、
前記相展開画像信号をデジタル信号からアナログ信号に変換するD/A変換回路と、
を備え、
前記補正回路は前記D/A変換回路によって前記相展開画像信号に生じる誤差を補正することで、前記補正済画像信号を生成すること、
を特徴とする画像処理回路。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
An image processing circuit used in an electro-optical device having a pixel electrode provided corresponding to the switching element,
A correction circuit for correcting the input image signal to generate a corrected image signal;
A phase expansion circuit that divides the corrected image signal into a plurality of systems and expands the time axis to generate a phase expanded image signal phase expanded into a plurality of systems;
A D / A conversion circuit for converting the phase development image signal from a digital signal to an analog signal;
With
The correction circuit generates the corrected image signal by correcting an error generated in the phase development image signal by the D / A conversion circuit;
An image processing circuit.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置に用いる画像処理回路であって、
入力画像信号を補正データに基づいて補正して補正済画像信号を生成する補正手段と、
を備え、
前記補正手段は前記補正データを輝度レベル毎に分けて記憶する補正テーブルを備え、当該補正テーブルから補正データを読み出して、当該読み出した補正データに基づいて前記入力画像信号を補正して、前記補正済画像信号を生成すること、
を特徴とする画像処理回路。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
An image processing circuit used in an electro-optical device having a pixel electrode provided corresponding to the switching element,
Correction means for correcting the input image signal based on the correction data to generate a corrected image signal;
With
The correction means includes a correction table that stores the correction data for each luminance level, reads the correction data from the correction table, corrects the input image signal based on the read correction data, and corrects the correction. Generating a finished image signal,
An image processing circuit.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置に用いる画像処理回路であって、
前記入力画像信号をデジタル信号からアナログ信号に変換するD/A変換回路と、
前記D/A変換回路によって前記アナログ信号に生じる誤差を補正する補正回路と、
を備えたことを特徴とする画像処理回路。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
An image processing circuit used in an electro-optical device having a pixel electrode provided corresponding to the switching element,
A D / A conversion circuit for converting the input image signal from a digital signal to an analog signal;
A correction circuit for correcting an error generated in the analog signal by the D / A conversion circuit;
An image processing circuit comprising:
走査線とデータ線の交点に対応して設けられたスイッチング素子と、前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置。An image processing circuit according to any one of claims 1 to 10,
An electro-optical device having a switching element provided corresponding to an intersection of a scanning line and a data line, and a pixel electrode provided corresponding to the switching element.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置の駆動方法であって、
入力画像信号を補正して補正済画像信号を生成するステップと、
前記補正済画像信号を複数の系統に分割するとともに時間軸伸張して、複数系統に相展開された相展開画像信号を生成するステップと、
前記相展開画像信号の基準電位に対する電圧レベルを所定周期で反転させるステップと、
前記データ線を複数本毎にまとめたブロック毎に各データ線に対応する相展開画像信号を供給するステップと、
を備え、
前記補正済み画像信号を生成するステップは前記相展開回路から前記反転回路までのの伝達特性によって前記相展開画像信号に生じる誤差を補正することで、前記補正済画像信号を生成すること、
を特徴とする電気光学装置の駆動方法。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
A driving method of an electro-optical device having a pixel electrode provided corresponding to the switching element,
Correcting the input image signal to generate a corrected image signal;
Dividing the corrected image signal into a plurality of systems and extending the time axis to generate a phase expanded image signal phase expanded into a plurality of systems;
Inverting a voltage level with respect to a reference potential of the phase development image signal at a predetermined period;
Supplying a phase development image signal corresponding to each data line for each block in which the data lines are grouped into a plurality of lines;
With
The step of generating the corrected image signal generates the corrected image signal by correcting an error generated in the phase expanded image signal by a transfer characteristic from the phase expanding circuit to the inverting circuit.
A method for driving an electro-optical device.
前記スイッチング素子に対応して設けられた画素電極とを有する電気光学装置の駆動方法であって、
入力画像信号を補正して補正済画像信号を生成するステップと、
前記補正済画像信号を複数の系統に分割するとともに時間軸伸張して、複数系統に相展開された相展開画像信号を生成するステップと、
前記相展開画像信号をデジタル信号からアナログ信号に変換するステップと、
を備え、
前記補正済み画像信号を生成するステップは前記D/A変換回路によって前記相展開画像信号に生じる誤差を補正することで、前記補正済画像信号を生成すること、
を特徴とする電気光学装置の駆動方法。Switching elements provided corresponding to the intersections of the scanning lines and the data lines;
A driving method of an electro-optical device having a pixel electrode provided corresponding to the switching element,
Correcting the input image signal to generate a corrected image signal;
Dividing the corrected image signal into a plurality of systems and extending the time axis to generate a phase expanded image signal phase expanded into a plurality of systems;
Converting the phase development image signal from a digital signal to an analog signal;
With
The step of generating the corrected image signal includes generating the corrected image signal by correcting an error generated in the phase development image signal by the D / A conversion circuit.
A method for driving an electro-optical device.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2002139086A JP2003091270A (en) | 2001-07-09 | 2002-05-14 | Method for driving electro-optical device, image processing circuit, electronic equipment, and method for generating correction data |
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2001208476 | 2001-07-09 | ||
JP2001-208476 | 2001-07-09 | ||
JP2002139086A JP2003091270A (en) | 2001-07-09 | 2002-05-14 | Method for driving electro-optical device, image processing circuit, electronic equipment, and method for generating correction data |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2003091270A JP2003091270A (en) | 2003-03-28 |
JP2003091270A5 true JP2003091270A5 (en) | 2005-09-29 |
Family
ID=26618399
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2002139086A Withdrawn JP2003091270A (en) | 2001-07-09 | 2002-05-14 | Method for driving electro-optical device, image processing circuit, electronic equipment, and method for generating correction data |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2003091270A (en) |
Families Citing this family (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4103886B2 (en) | 2003-12-10 | 2008-06-18 | セイコーエプソン株式会社 | Image signal correction method, correction circuit, electro-optical device, and electronic apparatus |
JP4400593B2 (en) | 2006-05-19 | 2010-01-20 | セイコーエプソン株式会社 | Electro-optical device, driving method thereof, and electronic apparatus |
JP5638181B2 (en) * | 2007-11-09 | 2014-12-10 | セイコーエプソン株式会社 | Driving device and method, electro-optical device, and electronic apparatus |
JP6239288B2 (en) * | 2013-07-11 | 2017-11-29 | シナプティクス・ジャパン合同会社 | LCD driver IC |
-
2002
- 2002-05-14 JP JP2002139086A patent/JP2003091270A/en not_active Withdrawn
Similar Documents
Publication | Publication Date | Title |
---|---|---|
KR100553014B1 (en) | Liquid crystal display | |
WO2000045367A1 (en) | Image display | |
JP2004165749A (en) | Gamma correction voltage generating apparatus, gamma correction apparatus, and display device | |
JP2009086076A (en) | Display device | |
US6219020B1 (en) | Liquid crystal display control device | |
JP2004266750A (en) | Method and device of shading correction and digital camera | |
JP2003091270A5 (en) | ||
JP2004140702A (en) | Image signal processor, gamma correcting method and display | |
JP3552996B2 (en) | Gamma correction device | |
JP4728744B2 (en) | Image processing device | |
KR100276958B1 (en) | Waveform Generator | |
JPH10341451A (en) | Brightness irregularity correction device | |
JP2819980B2 (en) | Signal generator for CCD camera signal processing circuit test | |
JP2006154378A (en) | Image display controller | |
JP2001357394A (en) | System for generating color non-uniformity correction data and picture display device | |
JP5507992B2 (en) | Display control apparatus and control method thereof | |
JPH0527701A (en) | Video signal correcting circuit | |
JP2006318315A (en) | Image processing pipeline circuit | |
JP2011154106A (en) | Gradation voltage generation circuit and display drive circuit | |
JPS6343950B2 (en) | ||
JPS5890863A (en) | Image converter | |
JPH06230768A (en) | Image memory device | |
JPS6348054A (en) | Picture information inputting device | |
JPH05304603A (en) | Picture signal processor | |
JP2011171835A (en) | Display device and processing method |