JP2000150577A - Wiring substrate and manufacture thereof, semiconductor device, and electronic part using the same and manufacture thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a connection structure and manufacture of an electronic part and a chip member capable of preventing a faulty electric connection between materials having different coefficients of linear expansion. SOLUTION: In a package 1 comprising a semiconductor chip 14, a wiring substrate 11, and a resin layer 13 between them, the semiconductor chip 14 being electrically connected to the wiring substrate 11 via a bump, a dummy bump 19 and a dummy paste arranged at a portion, which is near a corner of the semiconductor chip 14 and easily deformed by a difference in the coefficient of linear expansion between the resin layer 13 and the wiring substrate 11, can reduce the quantity of the resin in the resin layer 13 between the wiring substrates 11 and 11.

Description

DETAILED DESCRIPTION OF THE INVENTION

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a wiring board on which various chip members having bumps are mounted with a resin interposed therebetween, a method of manufacturing the same, a semiconductor device, an electric component using the same, and a method of manufacturing the same.

[0002]

2. Description of the Related Art FIG. 11 is a view showing a conventional method of mounting a chip 3 on a substrate 2. Circuit electrodes 4 are provided on the upper surface of the substrate 2, and a thermosetting film 5 is attached to the upper surface of the substrate 2. Here, the chip 3 connected to the circuit electrode 4 includes the circuit electrode 4
A bump 6 made of a conductive material such as solder or gold is attached to the lower surface facing the (thermosetting film 5).
The bump 6 is connected to an electrode 7 provided on the chip 3 side.

Then, the chip 3 is heated and the bumps 6 are formed.
Is pressed into the inside of the thermosetting film 5, and is further brought into contact with the circuit electrode 4 and heated to an appropriate temperature, whereby the mounting is performed by the flip-chip method and the mounting package 1 is formed. The thermosetting film 4
Even when 5 is an anisotropic conductive thermosetting paste, mounting is performed in the same manner.

[0004]

By the way, the thermosetting resin linearly expands due to a temperature change after mounting. For this reason, the resin of the material of the thermosetting film 5 provided between the substrate 2 and the chip 3 expands due to a temperature change and the dimensional distance increases.

That is, with such a temperature change, since the linear coefficient of thermal expansion of the thermosetting film 5 and that of the substrate 2 are different, residual stress is generated in the mounting package 1 which was initially flat, and the mounting package 1 is warped. Will occur.

When such a warp occurs in the mounting package 1, the bump 6 and the circuit electrode 4 are in a non-adhesive state, thereby causing a failure in electrical connection.

Here, the above-mentioned warpage is largely generated mainly at the four corners of the chip 3, and in order to improve the connection strength against a shearing force due to an impact, the four corners are formed as shown in FIG.
As shown in FIG. 1, the mounting package 1 is formed by pressing with a resin coating 9.

However, in this case, since a separate step of forming the resin coating 9 must be provided, it is troublesome, costly, and not preferable.

Therefore, there is a demand for a configuration that can easily maintain the electrical contact state of the mounting package without providing any extra steps. Further, a space for performing the resin coating 9 is required on the substrate, which hinders the manufacture of a higher-density circuit board.

The present invention has been made in view of the above circumstances, and has as its object to provide a wiring board capable of preventing defective electrical connection, a method of manufacturing the same, a semiconductor device, an electric component using the same, and a method of manufacturing the same. It seeks to provide a way.

[0011]

According to a first aspect of the present invention, there is provided a semiconductor device having an electrode for input / output of a circuit and an electrical connection with the electrode of the semiconductor device. And a thermosetting or thermoplastic anisotropic conductive member or a resin sealing member provided between the semiconductor device and the wiring substrate, and at an outer corner of the semiconductor device. An electrical component, wherein an amount of the anisotropic conductive member or the resin sealing member is smaller than an amount of the conductive member at a position other than a position corresponding to the electrode.

According to a second aspect of the present invention, there is provided a semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, the semiconductor device and the wiring board. A thermosetting or thermoplastic anisotropic conductive member or a resin sealing member provided therebetween, and the degree of volume change of the anisotropic conductive member or the resin sealing member of the semiconductor device. The amount of the conductive member in a region larger than the other region other than the region corresponding to the electrode is smaller than the amount of the conductive member in the other region other than the region corresponding to the electrode. It is a characteristic electrical component.

According to a third aspect of the present invention, an electrode,
Alternatively, the semiconductor device is provided with at least one of wiring patterns that can be connected to bumps that electrically connect the wiring on the wiring board and the semiconductor device.

The invention according to claim 4 is the semiconductor device according to claim 3, wherein the wiring pattern is a ground wiring.

According to a fifth aspect of the present invention, a bump made of a conductive material is provided on an electrode provided at a corner or a wiring pattern connecting a bump on a wiring board and a bump for electrically connecting the wiring to the semiconductor device. The semiconductor device according to claim 3, wherein the semiconductor device is provided.

According to a sixth aspect of the present invention, when a semiconductor device is provided, a portion facing a corner of the semiconductor device is provided.
A wiring substrate provided with a wiring or a wiring pattern in which a bump for electrically connecting the wiring to the semiconductor device is provided.

According to a seventh aspect of the present invention, when a semiconductor device is provided, a portion facing a corner of the semiconductor device is provided.
A member having a smaller thermal expansion coefficient than a thermosetting or thermoplastic anisotropic conductive member is bonded to the wiring, or a wiring pattern in which the wiring and the bump electrically connecting the semiconductor are bonded. A wiring board characterized by the above.

The invention according to claim 8 is a semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, the semiconductor device and the wiring board. A thermosetting or thermoplastic anisotropic conductive member provided between the electrodes, wherein the wiring on the wiring board to which the electrodes are joined is formed in a concave shape with respect to the surface formed by the wiring board. An electric component characterized in that:

According to a ninth aspect of the present invention, when a semiconductor device is provided, an electrode of the semiconductor device or a wiring pattern in which a bump for electrically connecting a wiring to the semiconductor device is electrically connected. The wiring board is characterized in that the portion that is formed is concave.

According to a tenth aspect of the present invention, there is provided a wiring board for electrically connecting a semiconductor device having electrodes for input / output of a circuit to the electrodes of the semiconductor device, and a thermosetting or thermoplastic anisotropic conductive material. In the method for manufacturing an electric component to be joined with a member or a resin sealing member, the amount of the anisotropic conductive member or the resin sealing member at an outer corner of the semiconductor device is other than a position corresponding to the electrode. A method for manufacturing an electrical component, wherein the amount is smaller than the amount of the conductive member at other positions.

According to an eleventh aspect of the present invention, there is provided a semiconductor device having electrodes for input / output of a circuit, wherein a wiring board electrically connected to the electrodes of the semiconductor device is formed by thermosetting or thermoplastic anisotropy. In the method for manufacturing an electric component to be joined via a conductive member or a resin sealing member, in the semiconductor device, a degree of volume change of the anisotropic conductive member or the resin sealing member is other than a region corresponding to the electrode. An electric component, wherein an amount of the conductive member at a position larger than another region is smaller than an amount of the conductive member in another region other than the region corresponding to the electrode.

According to a twelfth aspect of the present invention, the conductive member is provided on at least one of the electrode provided at the corner or the wiring pattern to which the bump on the wiring board and the semiconductor device are electrically connected. The method for manufacturing an electric component according to claim 10 or 11, wherein a bump made of:

According to a thirteenth aspect of the present invention, when a semiconductor device is provided, a wiring or a bump for electrically connecting the wiring to the semiconductor device is bonded to a portion facing the corner of the semiconductor device. A method of manufacturing a wiring board, characterized in that at least one of the wiring patterns to be provided is provided.

According to a fourteenth aspect of the present invention, in the case where a semiconductor device is provided, a wiring or a bump for electrically connecting the wiring and the semiconductor device is provided at a portion facing a corner of the semiconductor device. Is a method of manufacturing a wiring board, characterized in that a member having a smaller thermal expansion coefficient than a thermosetting or thermoplastic anisotropic conductive member is bonded to at least one of the wiring patterns to be bonded.

According to a fifteenth aspect of the present invention, there is provided a semiconductor device having electrodes for input / output of a circuit, wherein a wiring board electrically connected to the electrodes of the semiconductor device is connected to a thermosetting or thermoplastic anisotropic material. In a method of manufacturing an electric component to be joined via a conductive member or a resin sealing member, the wiring on the wiring board to which the electrodes are joined is formed in a concave shape with respect to a surface formed by the wiring board. This is a method for manufacturing an electric component.

According to a sixteenth aspect of the present invention, when a semiconductor device is provided, at least one of an electrode of the semiconductor device or a wiring pattern to which a bump for electrically connecting a wiring and the semiconductor device is bonded is electrically connected. A method for manufacturing a wiring board, characterized in that a part to be electrically connected is formed in a concave shape.

[0027]

DESCRIPTION OF THE PREFERRED EMBODIMENTS One embodiment of the present invention will be described below with reference to FIGS.

In the connection structure of the mounting package 10 as a kind of electric component shown in FIG. 1, a circuit wiring 12 is provided on an upper surface of a wiring board 11, and the upper surface side of the circuit wiring 12 (the side facing the chip). Is a resin sealing member and is covered with a film made of a thermosetting resin (hereinafter, this is referred to as a resin layer 13). In addition, this thermosetting resin is, for example, ACF (Anisotropic Con
active film, anisotropic conductive film) or A
CP (Anisotropic Conductive)
Paste, anisotropic conductive paste).

The semiconductor chip 14 is adhered to the resin layer 13. The semiconductor chip 14 is an IC chip,
Bare chip, BGA (Ball Grid Arra)
y), PGA (Pin Grid Array), MC
Various types of chips such as M (Multi Chip Module) and other electronic components, and an electrode 15 which is a circuit pattern is provided on a surface of the semiconductor chip 14 facing the wiring board 11. A bump 16 is provided on a surface of the electrode 15 facing the circuit wiring 12. The material of the bump 16 is solder or gold,
A conductive member such as silver, copper or an alloy thereof, or a conductive plastic ball.
2 is bonded.

Here, a concave portion 17 is formed on the upper surface side of the wiring substrate 11 facing the bump 16. Wirings 18 having a predetermined thickness are formed on the inner wall surface of the recess 17. The wiring 18 is formed entirely so that the inner wall surface of the recess 17 is not exposed.

For this reason, the bumps 16 are not
7, the wiring 18 provided on the bottom wall surface of the recess 17
It is formed with its protruding length so that it can contact with.

A dummy bump 19 provided with a conductive material such as solder as the material of the bump 16 is attached to the semiconductor chip 14. The dummy bumps 19 are provided at the four corners of the semiconductor chip 14, where they are likely to undergo linear expansion deformation due to the difference in linear expansion coefficient between the wiring board 11 and the resin layer 13. Then, the dummy bump 19 is provided so as to be in contact with the dummy paste 20 facing the dummy bump 19.

The dummy bumps 19 are formed, for example, in a rectangular shape. Therefore, when the dummy bumps 19 come into contact with the wiring board 11, they are provided so as to come into contact with a large area.

Note that the dummy bumps 19 are
It is not necessarily required to be formed in a rectangular shape as shown in FIG. 5A, and may be formed in a substantially hemispherical shape or a substantially pyramid shape as shown in FIGS. 5B and 5C, for example.

A dummy paste 20 is provided on the wiring board 11 at a position facing the dummy bump 19. As shown in FIG. 6B, the dummy paste 20 is provided so that a portion facing the semiconductor chip 14 has a curved shape (or a substantially spherical shape). For this reason, when adhering to the dummy bump 19, the amount of pushing the resin layer 13 is reduced, but the stress generated at the tip of the dummy paste 20 is also reduced.

Similar to the dummy bump 19, the shape of the dummy paste 20 is, for example, rectangular as shown in FIGS. The surface may be formed in a curved shape.

The dummy paste 20 is a thermosetting paste and its material has a linear expansion coefficient of ACF or AC.
The material contains a material lower than P, such as gold, silver, copper, or aluminum.

Table 1 shows the respective linear expansion coefficients of ACF, silver, copper and aluminum.

[0039]

[Table 1]

The productivity of the dummy bumps 19 or the dummy pastes 20 is improved by using the same material as the bumps 16. Therefore, the semiconductor chip 14
It is preferable to provide a dummy electrode so that the dummy bump 19 or the dummy paste 20 can easily adhere to the dummy electrode.

The dummy paste 20 is applied to the wiring board 11.
May be formed instead of providing the dummy wiring 21. In this case, unlike the circuit wiring 12, the dummy wiring 21 does not have any conductivity.

As described above, in the four corner portions of the semiconductor chip 14, where the linear expansion deformation is likely due to the difference in the linear expansion coefficient between the wiring board 11 and the resin layer 13, the dummy bump 19, the concave portion 17, Although the dummy paste 20 is provided, it may be provided not only at the four corners but also at any other portion where linear expansion deformation is likely.

In the case of providing at four corners, as shown in FIG. 4, even a configuration in which only one is provided at the four corners,
Alternatively, a configuration provided at a plurality of locations may be used. In addition, as a result, the four corners are most likely to be warped, and therefore, the dummy bumps 19 and the dummy pastes 20 are often provided in these corners.

Here, an example of mounting the semiconductor chip 14 on the wiring board 11 is shown in FIG. In this figure,
A recess 17 is provided at a position corresponding to the outer peripheral edge of the semiconductor chip 14.
And a wiring 18 are formed, and the bump 16 is inserted into the concave portion 17. In addition, the wiring board 1 is located on the outer peripheral edge of the semiconductor chip 14 rather than the recess 17 and on the four corners of the semiconductor chip 14.
This is a configuration in which dummy bumps 19 and dummy pastes 20 are provided at locations where linear expansion deformation easily occurs due to the difference between the linear expansion coefficient of the resin layer 13 and the resin layer 13.

The above-described dummy bumps 19 and dummy pastes 20 are not necessarily limited to the dummy, but may be actually electrically connected to form a part of the electronic circuit (that is, a configuration that does not become a dummy). Absent.

A method of manufacturing the mounting package 10 having the above-described configuration will be described with reference to the flowchart of FIG.

First, the recess 17 is formed in the wiring board 11. After the recess 17 is formed, a mask (resist) 22 is formed on the wiring board 11 to cover the circuit wiring 12, and a part of the mask 22 is removed by exposing the circuit wiring 12, and the wiring board 11 is etched. When immersed in the liquid for a predetermined time, the concave portion 17 is formed (Step 1).

After the formation of the concave portion 17, a mask 22 is formed on the wiring substrate 11, and the electrode 15 (circuit pattern) is formed by ashing (step 2).

After the electrodes 15 are formed on the wiring board 11, the upper surface is covered with a mask 22 as shown in FIG. 7, and only the four corners of the semiconductor chip 14 are exposed to the mask 22, and thereafter the etching is performed. To expose the wiring board 11 in a hole shape only in this portion. Then, a conductive material is buried in the hole-like portion by ashing to form a dummy wiring 21 (step 3). Here, after forming the dummy wiring 21, the mask 22 is removed, and the entire wiring substrate 11 is exposed.

When the dummy wiring 21 is not formed, a dummy paste 20 is formed in a predetermined shape on the upper surface of the wiring board 11 and applied.

Then, as shown in FIG. 8, a wiring 18 is formed in the recess 17 (step 4). First, the wiring board 11
Is formed on the surface of the mask 22, and the wiring 18 is deposited from the upper surface of the mask 22. Thereafter, a mask 22 is formed again substantially at the center of the concave portion 17, and the mask 22 of the concave portion 17 is formed.
The wiring 18 is formed by vapor deposition between the inner wall surface of the recess 17 and the mask 22 formed in the recess 17 is removed. Thus, the wiring 18 having a predetermined thickness with respect to the inner wall surface of the concave portion 17 is formed.

After the formation of the dummy wiring 21 (dummy paste 20) on the upper surface of the wiring substrate 11 is completed, an ACF is attached to form the resin layer 13 on the wiring substrate 11 (Step 5). Then, the bump 16 and the dummy bump 19 are bonded through the ACF. Prior to this bonding, bumps 16 are mounted on the electrodes 15 of the semiconductor chip 14 (step 6), and dummy bumps 19 are also mounted on the semiconductor chip 14 after or simultaneously with the mounting of the bumps 16 (step 7). ).

The bumps 16 and the dummy bumps 19 are formed on the electrodes or the dummy electrodes by plating, vapor deposition,
It can be formed by an electroplating method, a stud bump method, a solder paste printing method, a solder ball supply method, a solder tape punching method, or the like.

After the formation of the bumps 16 and the dummy bumps 19, a check is made to determine whether or not the bumps 16 have been formed at predetermined positions (step 8).

After these bumps 16 and dummy bumps 19 are formed, the semiconductor chip 14 is removed from the resin layer 13 of the ACF.
(Step 9). After the temporary compression bonding, the semiconductor chip 14 is inspected for a positional deviation with respect to the wiring board 11 (step 10). After correcting the positional deviation by the positional deviation inspection, the final bonding is performed (step 11). When performing the final pressure bonding, the bumps 16 and the dummy bumps are heated to a predetermined temperature, and after the heating, a predetermined pressure is applied to adhere the semiconductor chip 14 to the resin layer 13 and the bumps 16 It is soldered to the wiring 18.

Then, a final misalignment inspection is performed (step 12), and the mounting package 10 is completed or the process is shifted to subsequent steps.

According to the mounting package 10 and the method of manufacturing the mounting package 10 described above, the linear expansion deformation is caused by the difference between the linear expansion coefficients of the wiring board 11 and the resin layer 13 at the four corners of the semiconductor chip 14. Since the dummy bumps 19 are provided at easy locations and the dummy pastes 20 are further provided on the wiring board 11, these bite into the resin layer 13, so that the amount of resin in the resin layer 13 can be reduced accordingly. it can. That is, the resin layer 13 is thinly provided by each of the above-described resin reduction means.

By reducing (thinning) the resin, it is possible to prevent the mounting package 10 from being warped due to a difference in the coefficient of linear expansion between the wiring board 11 and the resin layer 13, and to secure the flatness without warping. A good mounting package 10 can be provided.

By forming the dummy bumps 19 in a substantially rectangular shape, the dummy bumps 19 can be opposed to the wiring board 11 in a large area. Can be reduced.

When the dummy bumps 19 are formed in a substantially hemispherical shape other than the rectangular shape, the dummy bumps 19 can be cut into the dummy paste 20 facing the dummy bumps 19 to increase the bonding area. That is, when an electrode plate is present on the semiconductor chip 14 side with respect to the dummy bumps 19 and the dummy bumps 19 are actually electrically connected to form a part of an electronic circuit, the degree of electrical connection can be increased. .

When the dummy bump 19 is formed in a substantially pyramid shape, the tip of the dummy bump 19 is formed in a pointed shape, so that the stress applied thereto can be reduced. For this reason, the dummy bumps 19 can be reliably cut into the resin layer 13 and the amount of resin can be reduced.

The dummy paste 20 is applied to the wiring board 11.
Is provided, the amount of resin can be reduced in cooperation with the dummy bumps 19. At the same time, since the dummy paste 20 is provided on the wiring board 11 side, it is possible to reduce the amount of resin from the wiring board 11 side.

Even when the dummy wiring 21 is used instead of the dummy paste 20, the same function and effect can be obtained, and when necessary, it can serve as an electric circuit as a ground wiring member.

A recess 17 is formed in a portion of the wiring board 11 facing the bump 16, and the bump 1 is formed in the recess 17.
6, the semiconductor chip 14 and the wiring board 11
Even when a shearing force is generated during this time, it is possible to withstand this shearing force. Further, even if the mounting package 10 is warped due to the bump 16 entering the concave portion 17,
Electrical contact with the wiring 18 can be maintained.
For this reason, when manufacturing the mounting package 10, the occurrence of defects can be reduced.

Also, for example, as in the case of forming the dummy bump 19, the bump 16 can be formed and the dummy bump 19 can be formed in the same process. Therefore, it is not necessary to form a resin coating, and it is possible to produce the resin reducing means at low cost when producing the resin reducing means. This reduction in cost is the same for the dummy wiring 21.

Further, since the semiconductor chip 14 is provided with the dummy bumps 19, the dummy pastes 20, and the dummy wirings as resin reducing means, the semiconductor chip 1
4 is mounted on the wiring board 11, the difference in the coefficient of linear expansion between the wiring board 11 and the resin layer 13 causes the mounting package 1
0 can be prevented from being warped.

Although the embodiment of the present invention has been described above, the present invention can be modified in other ways. Hereinafter, each embodiment of the modified example will be described with reference to FIGS. 9 (a) to 9 (f). Will be explained.

Each of the modifications has a configuration in which the resin reducing means, the configuration in which the concave portion 17 does not exist, or a combination thereof is included in the configuration described in the above embodiment. Conceptually, the wiring board 11 and the resin layer 1 are located at the four corners of the semiconductor chip 14.
3. A structure provided with a resin reducing means for reducing the amount of resin in the resin layer 13 at a position where linear expansion deformation easily occurs due to a difference in linear expansion coefficient of 3, or provided with at least one of the concave portions 17 for resisting shearing force It has become.

First, FIG. 9A shows a configuration in which only the dummy bumps 19 are provided on the semiconductor chip 14 as resin reduction means. The dummy bumps 19 are formed in a rectangular shape, and are provided on the wiring board 1 of the semiconductor chip 14.
1 and the four corners of the resin layer 13, which are provided at locations where linear expansion deformation is likely due to a difference in linear expansion coefficient. Further, when the wiring board 11 and the semiconductor chip 14 are joined, the dummy board 19 is provided such that the opposing surface on the projecting side of the dummy bump 19 contacts the opposing surface of the wiring board 11 with the semiconductor chip 14 in a large area.

Next, in FIG. 9B, only the dummy paste 20 is used as a resin reducing means at the four corners of the semiconductor chip 14 of the wiring board 11 due to the difference in linear expansion coefficient between the wiring board 11 and the resin layer 13. This is a configuration provided at a location where linear expansion deformation easily occurs. In the dummy paste 20, a portion facing the semiconductor chip 14 is provided in a shape protruding into a curved surface (or a substantially spherical shape).
That is, in this shape, although the amount of pushing the resin layer 13 is smaller than in the case of FIG.
The configuration is such that the stress generated at the tip of the dummy paste 20 is also reduced.

In place of the dummy paste 20,
Only the dummy wiring 21 is used as the resin reducing means.
May be provided. Also in this case, the wiring board 11
The amount of resin existing in the resin layer 13 from the side can be reduced.

In FIG. 9C, the wiring board 1
A recess 17 is formed in the wiring board 11 in order to resist a shearing force acting on the joint between the semiconductor chip 14 and the semiconductor chip 14, and a wiring 20 having a predetermined thickness is formed on an inner peripheral wall surface of the recess 17. is there.

In this case, the concave portion 1 having the wiring 20
In FIG. 7, the bumps 16 shown in FIG. 9C are formed longer than the bumps 16 of FIGS. 9A and 9B described above.
The tip of the bump 16 is provided so as to fit in the recess 17.

The bumps 16 come into contact with the wirings 20 and become electrically conductive. When the bumps 16 enter, even if a shearing force is generated between the wiring board 11 and the semiconductor chip 14. , A structure that can withstand this.

The above is the simplified basic configuration of each aspect, and the following configuration is an example of a combination thereof, which will be described with reference to FIG.

FIG. 10A shows the dummy bump 19 shown in FIG. 9A and the dummy paste 2 shown in FIG. 9B.
0 are combined, and they are pressed and joined at positions facing each other.

FIG. 10 (b) shows a combination of the dummy paste 20 shown in FIG. 9 (b), the concave portion 17, the wiring 20 and the bump 16 shown in FIG. 9 (c).

FIG. 10C shows the dummy bump 19 shown in FIG. 9A, the concave portion 17 shown in FIG.
0 and the bump 16 are combined.

Here, when manufacturing the mounting package 10 shown in each of these aspects, the flow chart shown in FIG. That is, steps 1, 3 and 4 do not exist in FIG. 9A, steps 1, 4 and 7 do not exist in FIG. 9B, and steps 3 and 7 do not exist in FIG. Do not exist
Steps 1 and 4 do not exist in FIG. 10A, and step 7 does not exist in FIG.
In (c), step 3 does not exist, and the mounting packages 10 are respectively formed.

The effects described in these embodiments are as follows.
The same parts as those in the embodiment shown in FIG. 1 have the same functions and effects. In addition, the common operational effects in the configuration described in each of these aspects include the mounting package 10
It is possible to prevent warpage or to absorb even when shearing force acts, thereby maintaining good electrical contact.

Although the embodiments have been described above as modified embodiments, the present invention can be variously modified.

Mounting package 1 described in the above embodiment
The circuit board which is an electric component using “0” is applicable to various electronic devices such as a mobile phone, a pager (registered trademark), a portable notebook personal computer, and a portable information terminal device.

In addition, various modifications are possible without changing the gist of the present invention.

[0084]

As described above, according to the present invention,
Since the resin reducing means is interposed between the chip member and the substrate, the amount of resin in the resin layer can be reduced. For this reason, by providing the resin reducing means in the vicinity of the corner of the chip member and in a portion which is easily subjected to linear expansion deformation due to a difference in linear expansion coefficient between the resin layer and the substrate, the linear expansion coefficient between the resin layer and the substrate is reduced. It is possible to prevent the warpage of the connection structure of the electronic component caused by the difference.

By preventing this warpage, it is possible to maintain good electrical contact inside the mounting package.

Also, by forming a concave portion in the substrate,
Even when a shearing force acts on the bonding between the chip member and the substrate, a concave portion is formed in the substrate, and the bump enters the concave portion, so that it is possible to withstand the shearing force. Further, even if the bonding structure of the electronic member is warped, the bumps enter the concave portions, so that the electrical contact state can be maintained.

[Brief description of the drawings]

FIG. 1 is a partial cross-sectional view showing a configuration of a mounting package according to an embodiment of the present invention.

FIG. 2 is a diagram showing an example of mounting a chip according to the embodiment on a substrate.

FIG. 3 is a flowchart showing a method of manufacturing the mounting package according to the embodiment of the present invention;

FIG. 4 is an exemplary view showing an arrangement state of dummy bumps (or dummy pastes and dummy wirings) according to the embodiment;

FIG. 5 is a side view showing the shape of the dummy bump according to the embodiment.

FIG. 6 is a side view showing the shapes of the dummy paste and the dummy wiring according to the embodiment.

FIG. 7 is a view showing a state where dummy wirings are formed at four corners of the substrate according to the embodiment;

FIG. 8 is a diagram showing a state in which a concave portion and a wiring are formed in the substrate according to the embodiment.

FIG. 9 shows various aspects (variations) of the mounting package of the present invention.
FIGS. 7A and 7B are diagrams showing a basic mode of (a), a mode in which only dummy bumps are provided, (b), a mode in which only dummy paste (dummy wiring) is provided, and (c), a mode in which only concave portions are provided. .

10A and 10B are diagrams showing a combination of various aspects (modifications) of the mounting package of the present invention, wherein FIG. 10A is a combination of FIGS. 9A and 9B, and FIG. 9 (b) and 9 (c) show a combination, and FIG. 9 (c) shows a combination of FIGS. 9 (a) and 9 (c).

FIG. 11 is a view showing a mounting method for mounting a chip having a conventional bump.

FIG. 12 is a diagram showing a mounting method for mounting a chip on a substrate having a conventional paste.

FIG. 13 is a view showing a method of forming a mounting package by pressing with a conventional resin coating.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 10 ... Mounting package 11 ... Substrate 12 ... Circuit wiring 13 ... Resin layer 14 ... Chip 16 ... Bump 17 ... Depression 18 ... Wiring 19 ... Dummy bump 20 ... Dummy paste 21 ... Dummy wiring

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[Procedure amendment]

[Submission date] January 31, 2000 (200.1.3
1)

[Procedure amendment 1]

[Document name to be amended] Statement

[Correction target item name] Claims

[Correction method] Change

[Correction contents]

[Claims]

[Procedure amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0011

[Correction method] Change

[Correction contents]

[0011]

In order to achieve the above object, the purpose to solve the above-mentioned problems
To achieve this, the electrical component of the present invention is configured as follows
Have been. (1) A semiconductor device having electrodes for input / output of a circuit
And a wiring electrically connected to the electrode of the semiconductor device.
A wire substrate, provided between the semiconductor device and the wiring board.
Thermosetting or thermoplastic anisotropic conductive member
In the outer corner of the semiconductor device, the wiring board side
And has a lower coefficient of thermal expansion than the anisotropic conductive member.
A dummy bump made of a material is provided, and
Is the wiring board joined to the electrodes via bumps
The upper wiring is the bump formed on the surface formed by the wiring board.
Characterized in that the cross section with which the
You. (2) Semiconductor device having electrodes for input / output of circuit
And a wiring electrically connected to the electrode of the semiconductor device.
A wire substrate, provided between the semiconductor device and the wiring board.
Thermosetting or thermoplastic anisotropic conductive member
In the outer corner of the wiring board, the wiring board side
From the anisotropic conductive member, and has a lower coefficient of thermal expansion than the anisotropic conductive member.
A dummy paste made of a hard material is provided.
The board has the wiring connected to the electrode via a bump.
The wiring on the board is
The cross-section where the pump engages is rectangular.
And

[Procedure amendment 3]

[Document name to be amended] Statement

[Correction target item name]

[Correction method] Change

[Correction contents]

As described above, according to the present invention, a half
Heat curing around the outer corner of the conductor device or wiring board
The anisotropic conductive member to easily position and linear expansion deformation due to the difference of sex or thermoplastic anisotropic conductive member and the linear expansion coefficient of the wiring board
Dummy bumps made of a material having a lower coefficient of thermal expansion than
By providing a dummy paste, thermosetting or heat
It is possible to reduce the warpage of the connection structure of the electronic component caused by the difference in the linear expansion coefficient between the plastic anisotropic conductive member and the wiring board.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 008

[Correction method] Change

[Correction contents]

In addition, by forming a wiring having a rectangular cross section on the wiring board, even if a shearing force acts on the junction between the semiconductor device and the wiring board, the wiring penetrates the wiring to resist the shearing force. it can. Further, even if the bonding structure of the electronic member is warped, the electrical contact state can be maintained by the bump entering the wiring having a rectangular cross section .
As described above, the warpage of the connection structure for electronic components is reduced,
Even if warpage occurs, maintain the connection between the electrode and the wiring
As a result, the reliability of electronic components can be improved.
it can.

Claims (16)

[Claims] 1. A semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, and heat provided between the semiconductor device and the wiring board. A curable or thermoplastic anisotropic conductive member or a resin sealing member, wherein the amount of the anisotropic conductive member or the resin sealing member at an outer corner of the semiconductor device corresponds to the electrode An electric component, wherein the amount is smaller than the amount of the conductive member at a position other than the position where the conductive member is located. 2. A semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, and heat provided between the semiconductor device and the wiring board. A curable or thermoplastic anisotropic conductive member or a resin sealing member; and the degree of volume change of the anisotropic conductive member or the resin sealing member of the semiconductor device corresponds to the electrode. An electrical component, wherein the amount of the conductive member in a region larger than the region other than the region is smaller than the amount of the conductive member in a region other than the region corresponding to the electrode. 3. The method according to claim 1, wherein the corner is provided with at least one of an electrode and a wiring pattern to which a bump for electrically connecting a wiring on a wiring board and the semiconductor device can be bonded. Semiconductor device. 4. The semiconductor device according to claim 3, wherein the wiring pattern is a ground wiring. 5. A bump formed of a conductive member is provided on an electrode provided at a corner or a wiring pattern connecting a bump on an interconnect substrate and a bump electrically connecting the semiconductor device. The semiconductor device according to claim 3 or 4, wherein 6. When a semiconductor device is provided, a wiring or a wiring pattern to which a bump for electrically connecting the wiring and the semiconductor device is joined is provided in a portion facing a corner of the semiconductor device. A wiring board, characterized in that: 7. When a semiconductor device is provided, heat is applied to a wiring or a wiring pattern to which a bump for electrically connecting the wiring and the semiconductor is bonded to a portion facing a corner of the semiconductor device. A wiring substrate, wherein a member having a smaller coefficient of thermal expansion than a curable or thermoplastic anisotropic conductive member is joined. 8. A semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, and heat provided between the semiconductor device and the wiring board. A curable or thermoplastic anisotropic conductive member, wherein the wiring on the wiring board to which the electrodes are joined is formed in a concave shape with respect to a surface formed by the wiring board. And electrical components. 9. When a semiconductor device is provided, an electrode of the semiconductor device or a portion where a wiring pattern that connects a bump that electrically connects a wiring and the semiconductor device is electrically connected has a concave shape. A wiring board, characterized in that: 10. A wiring board for electrically connecting a semiconductor device having electrodes for input / output of a circuit to said electrodes of said semiconductor device, and a thermosetting or thermoplastic anisotropic conductive member or resin sealing member. In the method for manufacturing an electric component to be joined via the semiconductor device, the amount of the anisotropic conductive member or the resin sealing member at the outer corner of the semiconductor device is different from the conductive amount at a position other than the position corresponding to the electrode. A method for manufacturing an electric component, characterized in that the amount is smaller than the number of members. 11. A semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, and a thermosetting or thermoplastic anisotropic conductive member or resin sealing. In the method for manufacturing an electric component to be joined with a member, a degree of a volume change of the anisotropic conductive member or the resin sealing member of the semiconductor device is smaller than a region other than a region corresponding to the electrode. An amount of the conductive member at a position which is larger than the amount of the conductive member in a region other than a region corresponding to the electrode. 12. A bump made of a conductive material is provided on at least one of an electrode provided at a corner or a wiring pattern for connecting a wiring on a wiring board and a bump for electrically connecting the semiconductor device to the semiconductor device. The method for producing an electric component according to claim 10, wherein the method comprises: 13. When a semiconductor device is provided, at least a wiring or a wiring pattern in which a bump for electrically connecting the wiring and the semiconductor device is bonded to a portion facing a corner of the semiconductor device. A method for manufacturing a wiring board, comprising providing one of them. 14. When a semiconductor device is provided, a wiring or a wiring pattern provided at a portion facing a corner of the semiconductor device and connected to a bump for electrically connecting the wiring to the semiconductor device is provided. A method for manufacturing a wiring board, comprising joining a member having a smaller coefficient of thermal expansion than a thermosetting or thermoplastic anisotropic conductive member to at least one of the members. 15. A semiconductor device having electrodes for input / output of a circuit, a wiring board electrically connected to the electrodes of the semiconductor device, and a thermosetting or thermoplastic anisotropic conductive member or resin sealing. In a method of manufacturing an electric component to be joined with a member, the wiring on the wiring board to which the electrodes are joined is formed in a concave shape with respect to a surface formed by the wiring board. Method. 16. When a semiconductor device is provided, at least one of an electrode of the semiconductor device or a wiring pattern in which a bump for electrically connecting a wiring and the semiconductor device is joined is electrically connected. Is formed in a concave shape.