GB899267A - Circuit arrangement for a device for the evaluation of electric voltages - Google Patents

Circuit arrangement for a device for the evaluation of electric voltages

Info

Publication number
GB899267A
GB899267A GB34083/58A GB3408358A GB899267A GB 899267 A GB899267 A GB 899267A GB 34083/58 A GB34083/58 A GB 34083/58A GB 3408358 A GB3408358 A GB 3408358A GB 899267 A GB899267 A GB 899267A
Authority
GB
United Kingdom
Prior art keywords
transistor
conduct
diode
oct
evaluation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB34083/58A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STC PLC
Original Assignee
Standard Telephone and Cables PLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Standard Telephone and Cables PLC filed Critical Standard Telephone and Cables PLC
Publication of GB899267A publication Critical patent/GB899267A/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/38—Synchronous or start-stop systems, e.g. for Baudot code
    • H04L25/40—Transmitting circuits; Receiving circuits
    • H04L25/49—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems
    • H04L25/4917—Transmitting circuits; Receiving circuits using code conversion at the transmitter; using predistortion; using insertion of idle bits for obtaining a desired frequency spectrum; using three or more amplitude levels ; Baseband coding techniques specific to data transmission systems using multilevel codes
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04Q—SELECTING
    • H04Q1/00—Details of selecting apparatus or arrangements
    • H04Q1/18—Electrical details
    • H04Q1/30—Signalling arrangements; Manipulation of signalling currents
    • H04Q1/38—Signalling arrangements; Manipulation of signalling currents using combinations of direct currents of different amplitudes or polarities over line conductors or combination of line conductors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M1/00—Analogue/digital conversion; Digital/analogue conversion
    • H03M1/12—Analogue/digital converters
    • H03M1/14—Conversion in steps with each step involving the same or a different conversion means and delivering more than one bit

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Signal Processing (AREA)
  • Theoretical Computer Science (AREA)
  • Monitoring And Testing Of Exchanges (AREA)
  • Measurement Of Current Or Voltage (AREA)

Abstract

899,267. Transistor circuits. STANDARD TELEPHONES & CABLES Ltd. Oct. 24, 1958 [Oct. 26, 1957], No. 34083/58. Class 40(6). [Also in Group XXXVI] A circuit for discriminating between voltage signals of different amplitude values U1, U2, U3 comprises for each value a transistor and a Zener diode, Tr1 and Zl, Tr2 and Z2 and Tr3 and Z3 as shown, the emitters being so biased (via P1, P2, P3) and the diodes being so chosen that when an input Ux (e.g. U2) breaks down the appropriate diode Z2 to cause it to conduct in the reverse direction the transistor Tr2 only will switch and conduct to give an output at corresponding terminal U2. Assuming that U1<U2<U3 for -ve Ux (and the Zener breakdown voltages are in ascending order Z1, Z2, Z3) Z3 will remain blocked when U2 is applied and although Z1 will conduct transistor Trl will not be switched as its base will be almost at the potential of P2 due to conduction of diode Di1. The invention is particularly applicable to the sorting D.C. pulses representing digits of a telephone transmission system (Z1 may be omitted).
GB34083/58A 1957-10-26 1958-10-24 Circuit arrangement for a device for the evaluation of electric voltages Expired GB899267A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DEST13095A DE1062280B (en) 1957-10-26 1957-10-26 Circuit arrangement for a device for evaluating electrical voltages of graduated variable values

Publications (1)

Publication Number Publication Date
GB899267A true GB899267A (en) 1962-06-20

Family

ID=7455938

Family Applications (1)

Application Number Title Priority Date Filing Date
GB34083/58A Expired GB899267A (en) 1957-10-26 1958-10-24 Circuit arrangement for a device for the evaluation of electric voltages

Country Status (2)

Country Link
DE (1) DE1062280B (en)
GB (1) GB899267A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0074722A2 (en) * 1981-08-17 1983-03-23 Development Finance Corporation Of New Zealand Multilevel logic circuit

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL268442A (en) * 1960-08-22
NL268441A (en) * 1960-08-22
DE1212140B (en) * 1964-01-21 1966-03-10 Danfoss As Analog-to-digital converter

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0074722A2 (en) * 1981-08-17 1983-03-23 Development Finance Corporation Of New Zealand Multilevel logic circuit
EP0074722A3 (en) * 1981-08-17 1984-08-08 Development Finance Corporation Of New Zealand Multilevel logic circuit

Also Published As

Publication number Publication date
DE1062280B (en) 1959-07-30

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