EP0217225B1 - Trimmable circuit generating a temperature-dependent reference voltage - Google Patents

Trimmable circuit generating a temperature-dependent reference voltage Download PDF

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Publication number
EP0217225B1
EP0217225B1 EP86112803A EP86112803A EP0217225B1 EP 0217225 B1 EP0217225 B1 EP 0217225B1 EP 86112803 A EP86112803 A EP 86112803A EP 86112803 A EP86112803 A EP 86112803A EP 0217225 B1 EP0217225 B1 EP 0217225B1
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Prior art keywords
transistors
current sources
transistor
metal oxide
switched
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EP86112803A
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German (de)
French (fr)
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EP0217225A1 (en
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Franz Dipl.-Ing. Dielacher
Jochen Dipl.-Ing. Reisinger
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Siemens AG
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Siemens AG
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00—Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02—Regulating voltage or current
    • G05F3/08—Regulating voltage or current wherein the variable is dc
    • G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
    • G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
    • G05F3/20—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices using diode- transistor combinations
    • G05F3/30—Regulators using the difference between the base-emitter voltages of two bipolar transistors operating at different current densities
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S323/00—Electricity: power supply or regulation systems
    • Y10S323/907—Temperature compensation of semiconductor

Definitions

  • the invention relates to a circuit arrangement according to the preamble of patent claim 1.
  • Reference voltages are required in almost all circuits with integrated analog circuits. They should be constant under all operating conditions and have no or a certain temperature drift. In particular in integrated circuits themselves, bandgap circuits are preferred for generating the reference voltages. Bandgap circuits are described, for example, in the book "Semiconductor Circuit Technology" by U. Tietze u. Ch. Schenk, 5th revised edition, Springer-Verlag, Berlin, Heidelberg, New York 1980, pages 387 the following.
  • bandgap circuits can be used to generate reference voltages which are independent of the temperature coefficient of the components used in them, ie such a circuit ideally provides a temperature-independent reference voltage which corresponds to the bandgap of the semiconductor material.
  • this temperature-independent differential voltage is 1.205 volts.
  • a bandgap circuit uses the base-emitter voltage of a transistor as a reference, the negative temperature coefficient of which is compensated for by the addition of an electrical variable of the dimension "voltage" with a positive temperature coefficient.
  • the voltage variable is formed from the difference between the base-emitter voltages of two transistors operated with different current densities and can be tapped off via a resistor.
  • the invention is based on the object of specifying a circuit arrangement for generating a reference voltage which is as independent of the temperature as possible.
  • the invention is based on the idea of being able to coordinate the currents through the transistors of the bandgap circuit with different base-emitter voltages even after the production of the bandgap circuit so that the temperature coefficients with different signs are compensated for as well as possible.
  • the elements T1, T2, M1, M2, R1 to R3 and OP show a bandgap voltage reference with metal oxide semiconductors according to the prior art.
  • the circuit arrangement contains the same bipolar transistors, 10 of which are connected in parallel and are given the common reference symbol T2 in order to indicate that these 10 individual transistors can be replaced, for example, by a single transistor with correspondingly larger emitter or collector areas.
  • the collectors and the bases of the 11 individual transistors denoted by the reference symbols T1 and T2 are each connected to one another, the collectors of the transistors being connected to a terminal VDD of a supply voltage source and the common bases of the transistors being connected to a terminal GND of a reference potential.
  • the emitter circuits of the transistor arrangement consisting of T1 and T2 are supplied by current sources which are formed by the transistors M1 and M2 and are coupled together.
  • the emitter of transistor T1 is connected via resistor R1 to the output circuit of transistor M1, while the common emitter connection of the transistor arrangement designated T2 is connected to the output circuit of transistor M2 via the series circuit comprising resistors R3 and R2.
  • the connections of the two metal oxide semiconductor transistors M1 and M2 serving as the source are connected to a terminal VSS of the supply voltage source.
  • the gates of the two transistors M1 and M2 are driven jointly by the output of an operational amplifier OP, the inverting input of which is connected at the connection point of the resistor R1 to the emitter of the transistor T2 and the non-inverting input of which is connected at the connection point of the two resistors R2 and R3 connected in series.
  • the connection point of the transistor R2 to the output circuit of the transistor M2 is connected to the terminal VREF forming the output of the bandgap circuit.
  • the correction device according to the invention for changing the transmission ratio of the current sources formed from the transistors M1 and M2 is parallel to the output circuit of the transistor M1. It contains four switchable power sources, two of which are designed identically.
  • the current sources can be switched in parallel with the transistors M9 to M12 formed transistor switches the output circuit of the transistor M1.
  • the transistors M9 and M11 or M10 and M12 control current sources of the same design.
  • the output circuits of transistors M3 and M9 or M6 and M11 are each connected in series and in parallel to the output circuit of transistor M1.
  • the output circuits of transistors M4, M5 and M10 or M7, M8 and M12 are also each connected in series and also in parallel with the output circuit of transistor M1.
  • the gates of transistors M3 through M8 are like the gates of transistors M1 and M2 jointly connected to the output of the operational amplifier OP.
  • the gates of transistors M9 and M10 are connected to terminals SE1 and SE2 of the control inputs via two inverters IV1 and IV2.
  • the gates of the transistors M11 and M12 are connected directly to the terminals SE3 and SE4 of the control inputs.
  • All transistors M1 to M12 are n-channel metal oxide semiconductor transistors, but other types of transistors can also be used. Transistors of another type can also be used for the elements T1 and T2, which are embodied as npn transistors in the exemplary embodiment.
  • the bandgap circuit according to the prior art, for example from D. Bingham, CMOS: higher speeds, more drive and analog capability expand its horizons, Electronic Design, Volume 26, No. 23, USA, November 8, 1978, pages 74 to 82, known, ie without the transistors M3 to M12 and the inverters IV1 and IV2, controls the two current mirror transistors M1 and M2 via the operational amplifier OP in such a way that the inverting and non-inverting input of the operational amplifier are at the same potential.
  • the base-emitter voltage U BE2 of the transistor arrangement designated T2 must be lower than the base-emitter voltage U BE1 of the transistor T1.
  • the requirement of a lower current density, which is equivalent to this, due to the transistor arrangement designated T2 is achieved according to the figure by connecting the same transistors in parallel.
  • the currents IE1 and IE2 in the circuit of the exemplary embodiment can be the same or different from one another, as long as the requirement for the current densities of the bipolar transistors T1 and T2 is met.
  • the voltage drop across the resistor R3 is determined by the voltage drop across resistor R2 increased.
  • the voltage present in the circuit at terminal VREF with respect to the reference potential GND has a negative sign and is made up of the sum of the base-emitter voltage U BE1 and the product of the resistance ratio R2 to R3, the temperature voltage, which is equal to the Boltzmann constant multiplied by the absolute temperature based on the elementary charge, and the natural logarithm of the ratio of the currents IE1 and IE2. This makes it clear that the electrical variable can be influenced with the positive temperature coefficient via the resistance ratio R2 to R3 and the current ratio IE1 to IE2.
  • the temperature coefficients are compensated for by changing the ratio of the currents IE1 to IE2 by trimming.
  • the currents IS1 to IS4 of the switchable current sources which are additive to the current IE1, are optionally connected to the current IM1 supplied by the transistor M1.
  • the connection is made via transistors M9 to M12.
  • two currents or two currents can be switched off from the current IM1 via the control inputs SE1 to SE4.
  • the control inputs SE1 to SE4 are at the potential of the terminal VDD of the supply voltage source. This means that the switches M9 and M10 are blocked due to the inverters IV1 and IV2 and the switches M11 and M12 are conductive.
  • the current IE1 then results from the sum of the currents IM1, IS3 and IS4.
  • the control inputs SE1 to SE4 can optionally be connected to the potential of the terminal VSS of the supply voltage source, as a result of which the current IE1 increases or decreases.
  • the ratio of the currents IE1 to IE2 can also be increased or decreased in this way.
  • the currents IS1 to IS4 of the switchable current sources are usefully much smaller than the currents IM1 or IM2 Transistors M1 and M2.
  • the currents IS1 and IS3 are the same size and half the size of the likewise identical currents IS2 and IS4.
  • the trim currents IS1 to IS4 of the switchable current sources are thus binary weighted, so that there is a large trim range.
  • npn transistors which result from the p-well CMOS process, can be used as bipolar transistors T1 or the individual transistors of transistor arrangement T2 in the exemplary embodiment according to the figure.
  • a particularly advantageous embodiment results if the emitter is arranged as a ring emitter around the base contact, which results in a significantly better current gain of the bipolar transistors because of the larger emitter area.
  • a bandgap circuit with ring emitters increases the reliability compared to a bandgap circuit in which the emitters are in the middle of the base zone.
  • the achievable accuracy of a trimmable bandgap circuit according to the invention in the temperature range from + 10 ° C to + 70 ° C better than 10 ppm per degree Celsius.

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  • Microelectronics & Electronic Packaging (AREA)
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Abstract

Circuit for generating a temperature-independent reference voltage includes transistors forming current sources, and a band gap circuit having bipolar transistors and being supplied by the current sources, the ratio of the emitter currents of the bipolar transistors being adjustable. The current sources may further include a first current source and a second current source parallel with the first current source.

Description

Die Erfindung betrifft eine Schaltungsanordnung nach dem Oberbegriff des Patentanspruchs 1.The invention relates to a circuit arrangement according to the preamble of patent claim 1.

Referenzspannungen sind in nahezu allen Schaltungen mit integrierten Analog-Schaltkreisen erforderlich. Sie sollen unter allen Betriebsbedingungen konstant sein und keine oder aber eine bestimmte Temperaturdrift besitzen. Insbesondere in integrierten Schaltkreisen selbst werden zur Erzeugung der Referenzspannungen Bandgap-Schaltungen bevorzugt. Bandgap-Schaltungen sind beispielsweise in dem Buch "Halbleiter-Schaltungstechnik" von U. Tietze u. Ch. Schenk, 5. überarbeitete Auflage, Springer-Verlag, Berlin, Heidelberg, New York 1980, Seiten 387 folgende beschrieben.Reference voltages are required in almost all circuits with integrated analog circuits. They should be constant under all operating conditions and have no or a certain temperature drift. In particular in integrated circuits themselves, bandgap circuits are preferred for generating the reference voltages. Bandgap circuits are described, for example, in the book "Semiconductor Circuit Technology" by U. Tietze u. Ch. Schenk, 5th revised edition, Springer-Verlag, Berlin, Heidelberg, New York 1980, pages 387 the following.

In der vorgenannten Veröffentlichung ist ausgeführt, daß mittels derartiger Bandgap-Schaltungen Referenzspannungen erzeugt werden können, die unabhängig vom Temperaturkoeffizienten der in ihr verwendeten Bauelemente sind, d.h. eine derartige Schaltung liefert im Idealfall eine temperaturunabhängige Referenzspannung, die dem Bandabstand des Halbleitermaterials entspricht. Für das häufig verwendete Silicium beträgt diese temperaturunabhängigere Differenzspannung 1,205 Volt. Eine Bandgap-Schaltung verwendet im Prinzip als Referenz die Basis-Emitter-Spannung eines Transistors, deren negativer Temperaturkoeffizient durch die Addition einer elektrischen Größe der Dimension "Spannung" mit positivem Temperaturkoeffizienten kompensiert wird.In the aforementioned publication it is stated that such bandgap circuits can be used to generate reference voltages which are independent of the temperature coefficient of the components used in them, ie such a circuit ideally provides a temperature-independent reference voltage which corresponds to the bandgap of the semiconductor material. For the commonly used silicon, this temperature-independent differential voltage is 1.205 volts. In principle, a bandgap circuit uses the base-emitter voltage of a transistor as a reference, the negative temperature coefficient of which is compensated for by the addition of an electrical variable of the dimension "voltage" with a positive temperature coefficient.

Die Spannungsgröße wird aus der Differenz der Basis-Emitter-Spannungen zweier mit verschiedenen Stromdichten betriebener Transistoren gebildet und läßt sich über einem Widerstand abgreifen.The voltage variable is formed from the difference between the base-emitter voltages of two transistors operated with different current densities and can be tapped off via a resistor.

Diese Überlegungen gelten jedoch idealerweise nur für eine einzige Temperatur, bei der der negative Temperaturkoeffizient der Basis-Emitter-Spannung des Transistors durch den positiven Temperaturkoeffizienten der durch den Widerstand und den durchfließenden Strom gebildeten Spannung exakt kompensiert wird. Da in erster Näherung die Spannung mit positivem Temperaturkoeffizienten linear mit der Temperatur ansteigt, die Basis-Emitter-Spannung eines Transistors jedoch nichtlinear mit der Temperatur abfällt, ist eine näherungsweise Kompensation des Temperaturkoeffizienten höchstens in einem schmalen Temperaturbereich möglich. In der Praxis versucht man, Bandgap-Schaltungen so zu dimensionieren und herzustellen, die möglichst gut auf diesen relativ schmalen Temperaturbereich abgestimmt sind.However, these considerations ideally only apply to a single temperature at which the negative temperature coefficient of the base-emitter voltage of the transistor is exactly compensated by the positive temperature coefficient of the voltage formed by the resistor and the current flowing through. Since in a first approximation the voltage with a positive temperature coefficient rises linearly with the temperature, but the base-emitter voltage of a transistor drops non-linearly with the temperature, an approximate compensation of the temperature coefficient is possible at most in a narrow temperature range. In practice, attempts are made to dimension and manufacture bandgap circuits that are matched as well as possible to this relatively narrow temperature range.

Abgesehen von Temperatureffekten höherer Ordnung läßt sich diese Forderung aufgrund von Streueffekten, beispielsweise herstellungsbedingten Geometriefehlern der Transistor- und Widerstandsbereiche oder parasitärer Effekte der verwendeten Materialien, nur schwer verwirklichen.Apart from temperature effects of a higher order, this requirement can only be met with difficulty due to scattering effects, for example manufacturing-related geometrical errors in the transistor and resistance regions or parasitic effects of the materials used.

Der Erfindung liegt die Aufgabe zugrunde, eine Schaltungsanordnung zur Erzeugung einer von der Temperatur möglichst unabhängigen Referenzspannung anzugeben.The invention is based on the object of specifying a circuit arrangement for generating a reference voltage which is as independent of the temperature as possible.

Diese Aufgabe wird bei einer Schaltungsanordnung der eingangs genannten Art erfindungsgemäß durch die Merkmale des kennzeichnenden Teils des Patentanspruchs 1 gelöst.This object is achieved according to the invention in a circuit arrangement of the type mentioned at the outset by the features of the characterizing part of patent claim 1.

Der Erfindung liegt der Gedanke zugrunde, die Ströme durch die Transistoren der Bandgap-Schaltung mit unterschiedlichen Basis-Emitter-Spannungen auch nach der Herstellung der Bandgap-Schaltung so aufeinander abstimmen zu können, daß sich die Temperaturkoeffizienten mit unterschiedlichem Vorzeichen möglichst gut kompensieren. Dazu dienen zwei die benannten Transistoren speisende Ströme, deren Verhältnis durch Zu- oder Abschalten von Stromquellen einstellbar ist.The invention is based on the idea of being able to coordinate the currents through the transistors of the bandgap circuit with different base-emitter voltages even after the production of the bandgap circuit so that the temperature coefficients with different signs are compensated for as well as possible. For this purpose serve two currents feeding the named transistors, the ratio of which can be set by switching current sources on or off.

Weitere Ausgestaltungen des Erfindungsgedankens sind in Unteransprüchen gekennzeichnet.Further refinements of the inventive concept are characterized in the subclaims.

Die Erfindung wird im folgenden anhand eines in der Figur der Zeichnung dargestellten Ausführungsbeispiels näher erläutert, die ein Schaltbild einer trimmbaren Bandgap-Spannungsreferenz zeigt.The invention is explained below with reference to an embodiment shown in the figure of the drawing, which shows a circuit diagram of a trimmable bandgap voltage reference.

Die Elemente T1, T2, M1, M2, R1 bis R3 und OP zeigen eine Bandgap-Spannungsreferenz mit Metalloxid-Halbleitern nach dem Stand der Technik. Die Schaltungsanordnung enthält gleiche bipolare Transistoren, von denen 10 parallel geschaltet und mit dem gemeinsamen Bezugszeichen T2 versehen sind, um kenntlich zu machen, daß diese 10 Einzeltransistoren beispielsweise durch einen einzigen Transistor mit entsprechend größeren Emitter- bzw. Kollektorflächen ersetzt werden können.The elements T1, T2, M1, M2, R1 to R3 and OP show a bandgap voltage reference with metal oxide semiconductors according to the prior art. The circuit arrangement contains the same bipolar transistors, 10 of which are connected in parallel and are given the common reference symbol T2 in order to indicate that these 10 individual transistors can be replaced, for example, by a single transistor with correspondingly larger emitter or collector areas.

Die Kollektoren und die Basen der mit dem Bezugszeichen T1 und T2 bezeichneten 11 Einzeltransistoren sind jeweils miteinander verbunden, wobei die Kollektoren der Transistoren an einer Klemme VDD einer Speisespannungsquelle und die gemeinsamen Basen der Transistoren an einer Klemme GND eines Bezugspotentials angeschlossen sind. Die Emitterkreise der aus T1 und T2 bestehenden Transistoranordnung werden von Stromquellen versorgt, die durch die Transistoren M1 und M2 gebildet und miteinander gekoppelt sind. Der Emitter des Transistors T1 ist über den Widerstand R1 mit dem Ausgangskreis des Transistors M1 verbunden, während der gemeinsame Emitteranschluß der mit T2 bezeichneten Transistoranordnung über die Serienschaltung aus dem Widerstand R3 und R2 an den Ausgangskreis des Transistors M2 angeschlossen ist. Die als Source dienenden Anschlüsse der beiden Metalloxid-Halbleitertransistoren M1 und M2 sind mit einer Klemme VSS der Versorgungsspannungsquelle verbunden. Die Gates der beiden Transistoren M1 und M2 werden gemeinsam vom Ausgang eines Operationsverstärkers OP angesteuert, dessen invertierender Eingang am Verbindungspunkt des Widerstandes R1 mit dem Emitter des Transistors T2 und dessen nichtinvertierender Eingang am Verbindungspunkt der beiden in Serie geschalteten Widerstände R2 und R3 gelegt ist. Der Verbindungspunkt des Transistors R2 mit dem Ausgangskreis des Transistors M2 ist an die den Ausgang der Bandgap-Schaltung bildende Klemme VREF gelegt.The collectors and the bases of the 11 individual transistors denoted by the reference symbols T1 and T2 are each connected to one another, the collectors of the transistors being connected to a terminal VDD of a supply voltage source and the common bases of the transistors being connected to a terminal GND of a reference potential. The emitter circuits of the transistor arrangement consisting of T1 and T2 are supplied by current sources which are formed by the transistors M1 and M2 and are coupled together. The emitter of transistor T1 is connected via resistor R1 to the output circuit of transistor M1, while the common emitter connection of the transistor arrangement designated T2 is connected to the output circuit of transistor M2 via the series circuit comprising resistors R3 and R2. The connections of the two metal oxide semiconductor transistors M1 and M2 serving as the source are connected to a terminal VSS of the supply voltage source. The gates of the two transistors M1 and M2 are driven jointly by the output of an operational amplifier OP, the inverting input of which is connected at the connection point of the resistor R1 to the emitter of the transistor T2 and the non-inverting input of which is connected at the connection point of the two resistors R2 and R3 connected in series. The connection point of the transistor R2 to the output circuit of the transistor M2 is connected to the terminal VREF forming the output of the bandgap circuit.

Die erfindungsgemäße Korrektureinrichtung zur Änderung des Übersetzungsverhältnisses der aus den Transistoren M1 und M2 gebildeten Stromquellen liegt parallel zum Ausgangskreis des Transistors M1. Sie enthält vier schaltbare Stromquellen, von denen je zwei gleich ausgelegt sind. Die Stromquellen lassen sich durchaus den Transistoren M9 bis M12 gebildete Transistorschalter dem Ausgangskreis des Transistors M1 parallel schalten. Dabei steuern die Transistoren M9 und M11 bzw. M10 und M12 gleich ausgelegte Stromquellen an. So sind die Ausgangskreise der Transistoren M3 und M9 bzw. M6 und M11 jeweils in Serie und parallel zum Ausgangskreis des Transistors M1 geschaltet. Andererseits sind die Ausgangskreise der Transistoren M4, M5 und M10 bzw. M7, M8 und M12 ebenfalls jeweils in Serie und ebenfalls parallel zum Ausgangskreis des Transistors M1 geschaltet. Die Gates der Transistoren M3 bis M8 sind ebenso wie die Gates der Transistoren M1 und M2 gemeinsam mit dem Ausgang des Operationsverstärkers OP verbunden. Die Gates der Transistoren M9 und M10 sind über zwei Inverter IV1 und IV2 mit den Klemmen SE1 und SE2 der Steuereingänge verbunden. Die Gates der Transistoren M11 und M12 sind direkt an die Klemmen SE3 und SE4 der Steuereingänge angeschlossen.The correction device according to the invention for changing the transmission ratio of the current sources formed from the transistors M1 and M2 is parallel to the output circuit of the transistor M1. It contains four switchable power sources, two of which are designed identically. The current sources can be switched in parallel with the transistors M9 to M12 formed transistor switches the output circuit of the transistor M1. The transistors M9 and M11 or M10 and M12 control current sources of the same design. The output circuits of transistors M3 and M9 or M6 and M11 are each connected in series and in parallel to the output circuit of transistor M1. On the other hand, the output circuits of transistors M4, M5 and M10 or M7, M8 and M12 are also each connected in series and also in parallel with the output circuit of transistor M1. The gates of transistors M3 through M8 are like the gates of transistors M1 and M2 jointly connected to the output of the operational amplifier OP. The gates of transistors M9 and M10 are connected to terminals SE1 and SE2 of the control inputs via two inverters IV1 and IV2. The gates of the transistors M11 and M12 are connected directly to the terminals SE3 and SE4 of the control inputs.

Sämtliche Transistoren M1 bis M12 sind n-Kanal-Metalloxid-Halbleitertransistoren, jedoch lassen sich auch Transistosren anderen Typs verwenden. Auch für die im Ausführungsbeispiel als npn-Transistoren ausgeführten Elemente T1 und T2 lassen sich Transistoren anderen Typs einsetzen.All transistors M1 to M12 are n-channel metal oxide semiconductor transistors, but other types of transistors can also be used. Transistors of another type can also be used for the elements T1 and T2, which are embodied as npn transistors in the exemplary embodiment.

Die Bandgap-Schaltung nach dem Stand der Technik, wie beispielsweise aus D. Bingham, CMOS: higher speeds, more drive and analog capability expand its horizons, Electronic Design, Band 26, Nr. 23, USA, 8. November 1978, Seiten 74 bis 82, bekannt, d.h. ohne die Transistoren M3 bis M12 und die Inverter IV1 und IV2, steuert über den Operationsverstärker OP die beiden Stromspiegeltransistoren M1 und M2 so, daß der invertierende und nichtinvertierende Eingang des Operationsverstärkers auf gleichem Potential liegen. Das bedeutet, daß die Basis-Emitter-Spannung UBE2 der mit T2 bezeichneten Transistoranordnung kleiner sein muß als die Basis-EmitterSpannung UBE1 des Transistors T1. Die damit gleichbedeutende Forderung einer geringeren Stromdichte durch die mit T2 bezeichnete Transistoranordnung wird gemäß der Figur durch das Parallelschalten gleicher Transistoren erreicht. Somit können die Ströme IE1 und IE2 in der Schaltung des Ausführungsbeispiels gleich oder verschieden voneinander sein, solange die Forderung für die Stromdichten der bipolaren Transistoren T1 und T2 erfüllt ist.The bandgap circuit according to the prior art, for example from D. Bingham, CMOS: higher speeds, more drive and analog capability expand its horizons, Electronic Design, Volume 26, No. 23, USA, November 8, 1978, pages 74 to 82, known, ie without the transistors M3 to M12 and the inverters IV1 and IV2, controls the two current mirror transistors M1 and M2 via the operational amplifier OP in such a way that the inverting and non-inverting input of the operational amplifier are at the same potential. This means that the base-emitter voltage U BE2 of the transistor arrangement designated T2 must be lower than the base-emitter voltage U BE1 of the transistor T1. The requirement of a lower current density, which is equivalent to this, due to the transistor arrangement designated T2 is achieved according to the figure by connecting the same transistors in parallel. Thus, the currents IE1 and IE2 in the circuit of the exemplary embodiment can be the same or different from one another, as long as the requirement for the current densities of the bipolar transistors T1 and T2 is met.

Die über den Widerstand R3 abfallende Spannung wird durch die über den Widerstand R2 abfallende Spannung vergrößert. Die in der Schaltung an der Klemme VREF gegenüber dem Bezugspotential GND anliegende Spannung besitzt negatives Vorzeichen und setzt sich zusammen aus der Summe der Basis-Emitter-Spannung UBE1 und dem Produkt aus dem Widerstandsverhältnis R2 zu R3, der Temperaturspannung, die gleich der Boltzmannkonstanten multipliziert mit der absoluten Temperatur bezogen auf die Elementarladung ist, und aus dem natürlichen Logarithmus des Verhältnisses der Ströme IE1 und IE2. Damit wird deutlich, daß sich die elektrische Größe mit dem positiven Temperaturkoeffizienten über das Widerstandsverhältnis R2 zu R3 und das Stromverhältnis IE1 zu IE2 beeinflussen läßt.The voltage drop across the resistor R3 is determined by the voltage drop across resistor R2 increased. The voltage present in the circuit at terminal VREF with respect to the reference potential GND has a negative sign and is made up of the sum of the base-emitter voltage U BE1 and the product of the resistance ratio R2 to R3, the temperature voltage, which is equal to the Boltzmann constant multiplied by the absolute temperature based on the elementary charge, and the natural logarithm of the ratio of the currents IE1 and IE2. This makes it clear that the electrical variable can be influenced with the positive temperature coefficient via the resistance ratio R2 to R3 and the current ratio IE1 to IE2.

Erfindungsgemäß erfolgt die Kompensation der Temperaturkoeffizienten durch die Veränderung des Verhältnisses der Ströme IE1 zu IE2 durch Trimmen. Dazu werden dem vom Transistor M1 gelieferten Strom IM1 wahlweise die Ströme IS1 bis IS4 der schaltbaren Stromquellen, die sich additiv zum Strom IE1 zusammensetzen, zugeschaltet. Die Zuschaltung erfolgt über die Transistoren M9 bis M12. Im Ausführungsbeispiel gemäß der Figur können dem Strom IM1 über die Steuereingänge SE1 bis SE4 jeweils zwei Ströme zu oder zwei Ströme abgeschaltet werden. Vor dem Trimmen liegen die Steuereingänge SE1 bis SE4 auf dem Potential der Klemme VDD der Versorgungsspannungsquelle. Das heißt, daß die Schalter M9 und M10 aufgrund der Inverter IV1 und IV2 gesperrt sind und die Schalter M11 und M12 leitend sind. Der Strom IE1 ergibt sich dann aus der Summe der Ströme IM1, IS3 und IS4. Durch den Trimmvorgang können die Steuereingänge SE1 bis SE4 wahlweise auf das Potential der Klemme VSS der Versorgungsspannungsquelle gelegt werden, wodurch sich der Strom IE1 vergrößert oder verkleinert. Damit kann aber auch das Verhältnis der Ströme IE1 zu IE2 vergrößert oder verkleinert werden. Die Strome IS1 bis IS4 der schaltbaren Stromquellen sind dabei sinnvollerweise wesentlich kleiner als die Ströme IM1 bzw. IM2 der Transistoren M1 und M2.According to the invention, the temperature coefficients are compensated for by changing the ratio of the currents IE1 to IE2 by trimming. For this purpose, the currents IS1 to IS4 of the switchable current sources, which are additive to the current IE1, are optionally connected to the current IM1 supplied by the transistor M1. The connection is made via transistors M9 to M12. In the exemplary embodiment according to the figure, two currents or two currents can be switched off from the current IM1 via the control inputs SE1 to SE4. Before trimming, the control inputs SE1 to SE4 are at the potential of the terminal VDD of the supply voltage source. This means that the switches M9 and M10 are blocked due to the inverters IV1 and IV2 and the switches M11 and M12 are conductive. The current IE1 then results from the sum of the currents IM1, IS3 and IS4. Through the trimming process, the control inputs SE1 to SE4 can optionally be connected to the potential of the terminal VSS of the supply voltage source, as a result of which the current IE1 increases or decreases. However, the ratio of the currents IE1 to IE2 can also be increased or decreased in this way. The currents IS1 to IS4 of the switchable current sources are usefully much smaller than the currents IM1 or IM2 Transistors M1 and M2.

Verwendet man gleiche Transistoren für die schaltbaren Stromquellen, deren durch das Verhältnis von Kanalweite zu Kanallänge bestimmte Einzelströme gleich groß sind, so sind die Ströme IS1 und IS3 gleich groß und halb so groß wie die ebenfalls jeweils gleichen Ströme IS2 und IS4. Damit sind die Trimmströme IS1 bis IS4 der schaltbaren Stromquellen binär gewichtet, so daß sich ein großer Trimmbereich ergibt.If the same transistors are used for the switchable current sources, the individual currents of which are determined by the ratio of channel width to channel length, the currents IS1 and IS3 are the same size and half the size of the likewise identical currents IS2 and IS4. The trim currents IS1 to IS4 of the switchable current sources are thus binary weighted, so that there is a large trim range.

Als Bipolartransistoren T1 bzw. der Einzeltransistoren der Transistoranordnung T2 lassen sich im Ausführungsbeispiel gemäß der Figur vertikale npn-Transistoren verwenden, die sich beim p-Wannen-CMOS-Prozeß ergeben. Eine besonders vorteilhafte Ausgestaltung ergibt sich, wenn der Emitter als Ringemitter um den Basiskontakt angeordnet ist, wodurch sich wegen der größeren Emitterfläche eine wesentlich bessere Stromverstärkung der bipolaren Transistoren ergibt. Gleichzeitig erhöht sich bei einer Bandgap-Schaltung mit Ringemittern die Zuverlässigkeit gegenüber einer Bandgap-Schaltung, bei der die Emitter in der Mitte der Basiszone liegen.Vertical npn transistors, which result from the p-well CMOS process, can be used as bipolar transistors T1 or the individual transistors of transistor arrangement T2 in the exemplary embodiment according to the figure. A particularly advantageous embodiment results if the emitter is arranged as a ring emitter around the base contact, which results in a significantly better current gain of the bipolar transistors because of the larger emitter area. At the same time, a bandgap circuit with ring emitters increases the reliability compared to a bandgap circuit in which the emitters are in the middle of the base zone.

Die erreichbare Genauigkeit einer erfindungsgemäßen trimmbaren Bandgap-Schaltung im Temperaturbereich von +10° C bis +70° C besser als 10 ppm pro Grad Celsius.The achievable accuracy of a trimmable bandgap circuit according to the invention in the temperature range from + 10 ° C to + 70 ° C better than 10 ppm per degree Celsius.

Claims (3)

  1. Circuit arrangement for generating a temperature-independent reference voltage, comprising a bandgap circuit (T1, T2, R1, R2, R3, OP) having two bipolar transistors (T1, T2), and comprising two current sources each supplying one bipolar transistor (T1, T2) and each consisting of a metal oxide transistor (M1, M2), characterised in that current sources that can be switched on and switched off, of which two are identically designed in each case and whose currents are weighted in binary fashion, are connected in parallel to one of the two current sources supplying the bipolar transistors (T1, T2), in that in the case of the current sources that can be switched on and switched off the source-drain sections of a metal oxide transistor (M9 to M12) are connected in each case in series as transistor switches and a number, corresponding to the respective binary weighting, of further metal oxide transistors (M3 to M8) are connected in series, in that the gate terminals of the further metal oxide transistors (M9 to M12) are connected to the gate terminals of the metal oxide transistors (M1, M2) as the current sources supplying the bipolar transistors (T1, T2), and in that the gate terminals of the metal oxide transistors (M9 to M12) provided as transistor switches are respectively coupled to one control input (SE1 to SE4) in such a way that in the case of identically designed current sources that can be switched on and switched off the gate terminal of one of these current sources is directly connected, and the gate terminal of the other is connected via an inverter (IV1, IV2), to the respective control input (SE1 to SE4).
  2. Circuit arrangement according to Claim 1, characterised in that the further metal oxide transistors (M9 to M12) are of the same type.
  3. Circuit arrangement according to Claim 1 or 2, characterised in that the bipolar transistors (T1, T2) of the bandgap circuit have ring emitters arranged about the base contact.
EP86112803A 1985-09-30 1986-09-16 Trimmable circuit generating a temperature-dependent reference voltage Expired - Lifetime EP0217225B1 (en)

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AT86112803T ATE66756T1 (en) 1985-09-30 1986-09-16 TRIMMABLE CIRCUIT ARRANGEMENT FOR GENERATION OF A TEMPERATURE-INDEPENDENT REFERENCE VOLTAGE.

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DE3534891 1985-09-30

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Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4910631A (en) * 1988-01-25 1990-03-20 Westinghouse Electric Corp. Circuit breaker with over-temperature protection and low error I2 t calculator
EP0360887B1 (en) * 1988-09-26 1993-08-25 Siemens Aktiengesellschaft Cmos voltage reference
US5013934A (en) * 1989-05-08 1991-05-07 National Semiconductor Corporation Bandgap threshold circuit with hysteresis
US5132556A (en) * 1989-11-17 1992-07-21 Samsung Semiconductor, Inc. Bandgap voltage reference using bipolar parasitic transistors and mosfet's in the current source
US5120994A (en) * 1990-12-17 1992-06-09 Hewlett-Packard Company Bicmos voltage generator
DE4130245A1 (en) * 1991-09-12 1993-03-25 Bosch Gmbh Robert BAND GAP SWITCHING
EP0632357A1 (en) * 1993-06-30 1995-01-04 STMicroelectronics S.r.l. Voltage reference circuit with programmable temperature coefficient
US5629612A (en) * 1996-03-12 1997-05-13 Maxim Integrated Products, Inc. Methods and apparatus for improving temperature drift of references
DE19817791A1 (en) * 1998-04-21 1999-10-28 Siemens Ag Reference voltage circuit
US6075354A (en) * 1999-08-03 2000-06-13 National Semiconductor Corporation Precision voltage reference circuit with temperature compensation
US6388853B1 (en) * 1999-09-28 2002-05-14 Power Integrations, Inc. Method and apparatus providing final test and trimming for a power supply controller
JP4513209B2 (en) * 2000-12-28 2010-07-28 富士電機システムズ株式会社 Semiconductor integrated circuit
US7088085B2 (en) * 2003-07-03 2006-08-08 Analog-Devices, Inc. CMOS bandgap current and voltage generator
JP4988421B2 (en) * 2007-04-25 2012-08-01 ラピスセミコンダクタ株式会社 Reference current circuit
CN101739052B (en) * 2009-11-26 2012-01-18 四川和芯微电子股份有限公司 Current reference source irrelevant to power supply

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075221A2 (en) * 1981-09-21 1983-03-30 Siemens Aktiengesellschaft Circuit of a temperature-compensated voltage-reference source

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4100437A (en) * 1976-07-29 1978-07-11 Intel Corporation MOS reference voltage circuit
US4069431A (en) * 1976-12-22 1978-01-17 Rca Corporation Amplifier circuit
DE3006598C2 (en) * 1980-02-22 1985-03-28 Robert Bosch Gmbh, 7000 Stuttgart Voltage source
US4325018A (en) * 1980-08-14 1982-04-13 Rca Corporation Temperature-correction network with multiple corrections as for extrapolated band-gap voltage reference circuits
US4443753A (en) * 1981-08-24 1984-04-17 Advanced Micro Devices, Inc. Second order temperature compensated band cap voltage reference
JPS5835614A (en) * 1981-08-27 1983-03-02 Matsushita Electric Ind Co Ltd Integrated reference voltage and current supply circuit
JPS5880718A (en) * 1981-11-06 1983-05-14 Mitsubishi Electric Corp Generating circuit of reference voltage
US4396883A (en) * 1981-12-23 1983-08-02 International Business Machines Corporation Bandgap reference voltage generator
US4525663A (en) * 1982-08-03 1985-06-25 Burr-Brown Corporation Precision band-gap voltage reference circuit
US4633165A (en) * 1984-08-15 1986-12-30 Precision Monolithics, Inc. Temperature compensated voltage reference
US4590418A (en) * 1984-11-05 1986-05-20 General Motors Corporation Circuit for generating a temperature stabilized reference voltage
US4608530A (en) * 1984-11-09 1986-08-26 Harris Corporation Programmable current mirror

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0075221A2 (en) * 1981-09-21 1983-03-30 Siemens Aktiengesellschaft Circuit of a temperature-compensated voltage-reference source

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
IEEE Journal of Solid-State Circuits, Band SC-13; Heft 6, 1978, Seiten 873-881, IEEE, New York, US; D.M. Monticelli: "A Versatile Monolithic IC Building - Block for Light-Sensing Applications; *
U. Tietze, Ch.Schenk, "Halbleiter - Schaltungstechnik", Springer-Verlag, 6. Auflage, Berlin, Heidelberg, Tokio, 1983, Seiten 532-537 *

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ATE66756T1 (en) 1991-09-15
EP0217225A1 (en) 1987-04-08
DE3681107D1 (en) 1991-10-02
JPS6279515A (en) 1987-04-11
US4751454A (en) 1988-06-14

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