DE19515159A1 - Coupler for multilayer circuit with inner core - Google Patents

Abstract

On the inner core (1) at the required electric connecting points by electrical precipitation, or by differential etching from a thick metal foil, protruding hemispherical, pyramidal, frusto-conical etc. mills (3) are formed.At least one insulating layer (4) and a conductive layer (5) are provided for contacting of the inner bi- or multilayer core (1) to the outer conductive layers of the multilayer circuit, using the layer lamination. The mills penetrate the insulating layer to provide an electric connection to the conductive layer located above the insulating one.

Description

The invention relates to a connection arrangement for multi Layer circuits according to the preamble of claim 1 or 2 and a method for producing such a connector arrangement.

Due to the increased use of surface mountable Components and a higher integration rate on assembly It is at the level of the production of electronic assemblies the basis of printed circuits required, in a more rational way Wise multilayer printed circuit boards, so-called multilayers to be able to manufacture which is technically easy  feasible and qualitative in terms of service life have high quality internal connections.

It is known that the limited external surfaces used Circuit pads laying the electrical connections in require the interior of multilayered multilayers.

The prior art in the formation of such vertical Contacts, the connections between one or more levels manufacture is characterized in that the same by a Through hole or a blind hole, which is then metallized. With the metallization can then simultaneously contacting the resulting sleeve can be realized with the respective signal or conductor level. The formation of so-called blind holes is particularly critical. Multilayers, which are based on one of the first or the first second inner layer. The blind hole required for this needs to be very precise and with high productivity corresponding depth tolerances are produced, which in the Series production has significant technological problems pulls.

From DE-PS 38 43 528 it is known to have an inner layer for To produce blind hole multilayers by using thin, highly ductile Copper foils against one with raised areas in the desired Contact pattern embossed surface and the resulting Embossed prints are filled with a thermosetting resin. The laminate with raised areas that then forms can used as the first inner layer in a blind hole multilayer become. Because in a multilayer designed in this way soldering eye to be drilled lies just below the surface, the risk of contacting one is reduced underlying inner layer. Regardless of the extended tie fentolerance is next as a next technological step drilling a connection or contact metallization required. Here is the solution described above especially for very small ones in the course of miniaturization desirable internal contacts and connections,  procedurally complex and technologically difficult manageable. A perforated wall metallization also has an effect as line discontinuity negative to the one to be transferred Waveform off.

From the German utility model G 91 02 817.5 one in internal connection to build multilayer circuits known, signal networks or Lei on a carrier material ter levels are arranged according to the circuit structure.

In the solution shown there, at the ends of the latera len, according to the circuit structure on a carrier realized signal network at the point where inner Connections are required in terms of circuitry standing, hemisphere, pyramid, or truncated pyramid Hills by galvanic growth or by difference etching from a thicker metal foil or layer forms.

At least two hills with opposite hills Signal levels must then be positioned relative to one another, whereby Pre-crosslinked epoxy adhesive films between the signal levels, so-called prepregs are introduced. Then these will pressed by means of a pressure-temperature time process. Here the epoxy adhesive films are pierced, whereby the same early contact between the opposite hills trains. This creates a multilayer, the inner ver has bindings without drilling with subsequent Forming a galvanic contact is required. Of the However, the disadvantage of such an arrangement is that the opposite hills must be positioned exactly and that contact to external interconnects or Signal levels is not possible.

It is therefore an object of the invention to provide a connection arrangement for multilayer circuits and a manufacturing process to propose such connection arrangements, which or which allows for easy drilling on blind holes  to do without and a contact from an inside Core to external interconnects with little technological Effort.

The object of the invention is achieved with a counter stood according to the features of claims 1 or 2 or 5, the subclaims being at least useful configurations and show developments of the basic idea of the invention.

This basic idea of the invention is based on a internal core at appropriate contact points specially shaped hills, e.g. B. galvanically, grow up, wherein these hills then melted when laminated Insulation layer to an overlying conductive layer pierce and the conductive layer at the designated places to contact.

Alternatively, the outer one, located above the insulating layer Conductive layer etched free at the contact points or also to be completely removed with a subsequent one Step a currentless contact between the hill and the surrounding, etched-off area of the outer conductive layer or other inner guide layers.

With the invention, it is also possible to use inner layers Multilayers of an assembly with electronic components to make accessible and a multilayer interconnection of several to carry out such buried components or chips.

In the connection arrangement according to the invention for chip-in-board Structures are molded from hills. During the Laminating the individual substrates penetrate to multilayers these hills the dielectric (prepreg) of neighboring substrates, making contact with the opposite management level is posed.

In one embodiment, the hills consist of sand soft arrangement of a copper body and a SnPb cap. The  Contact pads of the opposite side, on which the hills are pressed, are appropriately gold-plated. This creates Press welded joints due to the shrinking process during lamination with a permanent contact force be charged.

In this sense, pre-assembled circuits in COB, TAB or flip chip technology in a cavity of one Contact the multilayer core.

In summary, the invention enables contact hill to bridge a melting insulating layer, which creates a connection to an external guide can form layer. This process step takes place during the anyway necessary lamination of the conductive layer and Insulating layer to form the multilayer instead. Then ßend the outer, located above the insulating layer Conductive layer exposed at the contact points as described above and be removed to make a corresponding outside contact to be able to make.

The invention will now be based on exemplary embodiments and are explained in more detail with the aid of figures.

Figs. 1 here shows a cross section through a much ply, provided with an inner via hole multi-layer structure;

Fig. 2 is a cross section of the connector assembly components before lamination and

Fig. 3 sections through connecting contacts for an example Ausfüh.

In the exemplary embodiment shown, the inner core 1 or the inner core circuit is manufactured as a bilayer, that is to say it has two-way interconnects which are provided or connected with plated-through holes 2 .

The processes described in more detail below are suitable for producing internal cores or core circuits 1 .

In a first embodiment, one is finished processed bilayer or multilayer a chemical layer, e.g. B. copper, to create a coherent discharge surface deposited towards the edge.

After a photoresist has been applied and removed from the hill contact surfaces to be formed, the hill 3 can now be formed in a galvanic metallization step at the locations freed from the photoresist.

After removing the photo mask, the contiguous Dissipation surface removed in a differential etching step.

In a further embodiment, the is typically both sides with essentially 18 µm or 35 µm copper foil laminated core pre-etched so far that only a thin copper layer of less than substantially 3-5 microns obtained remains. On this layer, one after the other Photo mask the pattern plating and then the hill image deposited.

After removing the photomasks, the thin copper layer etched in contrast to the ladder pattern and hill pattern.

According to a third embodiment, the kupferka lies already core with metallized vias before (panel plating).

In this state, a positive working photoresist upset. With a double exposure, the first Hill structures exposed for electroplating and then the channels between the conductor tracks for etching.

At the end there is a thin layer of metal on the hills deposited, which is resistant to the etchant, at for example nickel or gold. After removing the photoresist  the core is ready for lamination with insulation layer and Copper foil.

As described above, hills 3 are formed with a preferably hemispherical, pyramid or truncated pyramid shape.

The multilayer is then pressed with a copper foil and an insulating support. The copper foil, for example, has a thickness of 5 microns and the thickness of the insulating support is 70 microns. The insulating support or the insulating layer 4 , which also serves as a laminate adhesive film, is pierced during the pressing of the hills 3 , which come into contact with the overlying interconnect 5 or copper foil.

In a further embodiment of the method, an etching step is inserted after the process of laminating or pressing to the multilayer. The outer conductive layer 5 is opened at the contact bumps 3 , for example with a slightly larger circumference than the contact bump 3 itself. Then a connection layer 6 is applied between exposed bumps 3 and conductive layer 5 via an electroless electrodeposition.

In the latter case, the connecting layer 6 also extends over a region of the melting insulating layer 4 . By enlarging the structure compared to the contact bumps 3 , machining tolerances can be compensated for large-sized formwork. If this is not necessary, the external conductive layer 5 on the contact bumps 3 is opened with a slightly smaller circumference than the contact bumps. The galvanic connection between the contact bump 3 and the conductive layer 5 is retained since the bump 3 is resistant to the etchant. Alternatively, a grinding and polishing process for removing the conductive layer 5 above the hills can also be used for this step in the case of hills 3 formed too high.

In this case, the connection layer 6 between hill 3 and conductive layer 5 is applied galvanically after a cleaning step.

The basic procedure is as follows Formation of the connection arrangement for multilayer circuits shown:

• 1. Inner core finished as bilayer or multilayer to edit;
• 2. activation of the dielectric between the conductor tracks;
• 3. deposit chemical copper layer;
• 4. Vacuum laminating a photo resist, photo printing and advent winding the contact surfaces for hill plating;
• 5. galvanic deposition of copper to hill structures;
• 6. stripping the photoresist;
• 7. Differential etching of the chemical copper layer;
• 8. Multilayer presses with dielectric and thin copper foil 5 µm or 10 µm;
• 9. Brushing and polishing to clear the hills;
• 10. Laminating a photo resist, photo printing and developing the pattern for the outer layers;
• 11. Galvanic reinforcement of the hill contacts and the conductor picture;
• 12. stripping the photoresist;
• 13. Etch the channels between the traces and
• 14. Surface finish for SMD soldering, gluing and bonding.

Basically, the process is based on a galvanic one Molding from hills. A platinum Base used, for example, from the thinnest possible Copper layer exists again in a differential etching step is removable.

For this, etched multilayer laminates in thicknesses between 0.8 to 1.2 mm with prepregs and special thin copper foils laminated. These foils are on copper or aluminum substrates films applied and up to a minimum layer thickness of 5 µm  available. After lamination, the carrier film is removed. After repeated brushing, the one used for the process stands Base material with approx. 3 µm copper layer available.

Following the photo processes for Hill and ladder imaging are breakthroughs for TAB Circuits milled. The material thickness of the multilayer cores is specified by the assembly of the TAB components. The contact bumps and the conductor pattern are still in place during milling protected under the last photo mask, which only at the end is stripped. Differential etching then takes place the plating base.

The lamination to the chip-in-board multilayer takes place under Vacuum using adhesive films. The strengths of adhesive foils are on the heights of the conductor patterns and contact bumps Voted. The temperature and pressure setting at Laminating takes place in two stages to determine the flow behavior of the used to improve prepregs.

A low starting temperature is expediently short set below the setting temperature to equal one to secure moderate heat distribution up to the glue point and around to achieve a slow passage through the gelling point.

The pre-pressing after a short evacuation time under vacuum improves dimensional stability and the formation of a largest possible contact area of the hill contacts to the opposite overlying metal layer.

The flow limit of the adhesive films then becomes slow drive through by setting the temperature above the gel point is increased.

Depending on the flow properties of each ver applied adhesive films, the pressure is increased and up to the cooling phase was kept constant.  

For an optimal relaxation of the laminated circuit, in one embodiment, a cooling rate of less than 1 ° each Minute set.

To resin inclusions that are used for contacts with increased resistance or are responsible for interrupted contacts, ver avoid the prepregs in the area of the contact pads posed. This ensures that before flowing out the prepregs the connections to the opposite level are already closed and only in in the lamination process Epoxy resin can be embedded.

The contact reliability obtained is high. So at Bend the blanks over an edge with a radius of approx. 300 mm no changes in the contact resistance proven. The internal connections are therefore against thermo mechanical loads largely insensitive.

With the arrangement according to the invention, internal Ver bonds based on an internally plated-through hole Bilayer to outer guiding layers or signal levels realized by drilling, which is no longer required or the like. To introduce blind holes. This eliminates the danger of Damage to the bilayer or the inner core when Form otherwise required blind holes completely eliminated.

The contact bumps or bumps have, for example Essentially 0.2 mm in diameter and 30 in height µm. With the proposed connection arrangement, four layered multilayer with approx. 1000 contact points between the core and the outer guide layers.

The method according to the invention results in an old one native form of connection via the mentioned hill contacts, the is particularly advantageous if a large number of Connections are looped and branched through two levels  must, as is the case with bus and address wiring in portable microcomputers is the case.

All in all, the new connection arrangement from Multilayer circuits effectively using anyway required lamination steps an electrical contact from one side ver with interconnects or guide layers seen and through-plated core to above located or outer guide layers take place without a complex and quality-limiting blind hole drilling and subsequent electroplating becomes necessary.

Reference list

1 internal core circuit
2 vias burried hole
3 contact bumps
4 Melting insulating layer
5 Outer conductive layer
6 connection layer

Claims (8)

1. Connection arrangement for multilayer circuits, hemispherical, pyramid-shaped, truncated pyramid-like or similar hills are formed on an inner core at necessary electrical connec tion points by galvanic growth or by diffusion etching from a stronger metal foil, characterized in that for contacting the internal bilayer or multi-layer core ( 1 ) to outer conductive layers ( 5 ) of the multilayer circuit by means of lamination, at least one insulating layer ( 4 ) and one conductive layer ( 5 ) is provided, the hills ( 3 ) piercing the insulating layer ( 4 ) and one Make electrical connection with the conductive layer ( 5 ) located above the insulating layer ( 4 ). 2. Connection arrangement for multilayer circuits, hemispherical, pyramid-shaped, truncated pyramid-shaped or similar hills are formed on an inner core at necessary electrical connec tion points by galvanic growth or by Diff renzätz protruding, characterized in that for contacting the internal bilayer or multi-layer core ( 1 ) to outer conductive layers ( 5 ) of the multilayer circuit by means of lamination, at least one insulating layer ( 4 ) and one conductive layer ( 5 ) is provided, the locations of the outer conductive layer ( 5 ) in the region of the hills ( 3 ) freely etched and a connection layer ( 6 ) is provided in the area between the hill ( 3 ) and the conductive layer ( 5 ) for electrical contacting with the conductive layer ( 5 ). 3. Connection arrangement according to claim 1 or 2, characterized, that the multilayer circuit has at least four layers is. 4. Connection arrangement according to claim 1 or 2, characterized in that the hill ( 3 ) have a diameter of substantially 0.2 mm and a height of substantially 30 microns. 5. A method for producing a connection arrangement according to claim 1, characterized in that for contacting an internal bilayer or multilayer core ( 1 ) towards outer conductive layers ( 5 ) at least one melting insulating layer ( 4 ) and the at least one conductive layer ( 5 ) by means of vacuum lamination are applied, the hills ( 3 ) penetrating the insulating layer ( 4 ) during the melting process and forming a connection with the conductive layer ( 5 ) located above the insulating layer ( 4 ). 6. The method according to claim 5, characterized in that a connecting layer ( 6 ) in the region between the hill ( 3 ) and the conductive layer ( 5 ) is applied. 7. The method according to claim 5, characterized in that the connecting layer ( 6 ) is chemically deposited. 8. The method according to claim 6 or 7, characterized in that the connecting layer ( 6 ) is galvanically preamplified.