DE10254756A1 - Device and method for recording stress migration properties - Google Patents

Abstract

The invention relates to a device and a method for recording stress migration properties of a semiconductor component (IC) which is finally assembled in a product-relevant housing (G) and has a stress migration test structure (SMT) which is formed in the semiconductor component (IC). An integrated heating device (IH) is designed within or in the immediate vicinity of the stress migration test structure (SMT) in order to increase the detection accuracy of a sigma¶G¶ stress caused by the housing (G).

Description

The present invention relates relates to a device and a method for recording stress migration properties and in particular to an apparatus and a method for detecting Stress migration properties of one in a product-relevant casing final assembled semiconductor device.

Integrated circuits are common with a variety of structured metallization or conductor track levels made by dielectric interlayer insulation layers are electrically separated from each other. To realize electrical Connections between the structured metallization or interconnect layers or between the conductor layers and a substrate on selected So-called contact holes or vias formed in the insulating layers.

With increasing integration density are used to implement improved features such as e.g. an elevated Speed and an increased switching functionality per unit area the structure widths and in particular the contact holes or Vias become increasingly smaller, which is why they are particularly suitable for a so-called Stress migration increasingly sensitive become.

In contrast to the so-called electromigration, in which a mass transport of conductor track material due to a applied DC and especially at very high current densities is referred to in the present invention Stress migration to mass transport described in the conductor track layers or vias especially due to mechanical stresses or voltage gradients is caused. Such mechanical stresses, for example from a mismatch of thermal expansion coefficients and of different elasticity modules the interconnect layers or the intervening insulator layers and other conductive and non-conductive intermediate layers result, consequently to a similar one Material transport that depends of a compressive or tensile stress or alternating stress Formation of cavities (voids) in the electrically conductive material, causing a electrical resistance of conductor tracks in the semiconductor module elevated or even a circuit break can occur.

For example, consider one Manufacturing process in which on a conductor track layer (aluminum, Copper, etc.) on a semiconductor substrate or a dielectric Layer is formed, a further insulator layer, for example at a temperature of 350 degrees Celsius using a CVD process (Chemical Vapor Deposition), is deposited, so result already because of the different expansion coefficients between the conductor layer and the adjacent insulating layers mechanical stresses, for example as tensile stress cause stress migration in the conductor track layer. With copper metallization with Cu vias Stress gradients e.g. due to thermal mismatch to the Transport of empty spaces in the via (formation of voids).

More specifically, vacancies diffuse to reduce the voltage energy in the conductor layer, whereby after a certain time, usually several months or years, this mass transport in the conductor track layer or the vias cavities generates the electrical properties of the semiconductor device influence and lead to an interruption of a conductor track.

1A to 1C show simplified sectional views to illustrate conventional devices for recording stress migration properties.

According to 1A Reliability tests to characterize the stress migration properties of conductor tracks and in particular of metallizations in integrated circuits or semiconductor components IC described above are usually carried out directly on the wafer or on the wafer level. The resistances of different stress migration test structures SMT, which are formed in a semiconductor chip IC, are measured at regular intervals (for example, once an hour, day or week) and the deviation from the initial value is assessed. Between these measurements, the wafers are stored in an oven at temperatures greater than 150 degrees Celsius, which means that the duration of these reliability tests can be significantly reduced to around 1000 to 2000 hours in order to ensure a product life of 15 years, for example.

However, the disadvantage of such a test device is that the results obtained due to a lack of final assembly in one housing are inadequate and therefore not sufficiently accurate the stress migration properties enable the semiconductor device in a product-related environment.

According to 1B Accordingly, such a test can also be carried out in a final assembled test housing TG, the semiconductor component IC being mounted on a component carrier T, for example by means of bond wires or soldered connections B, a temperature-resistant ceramic test housing being used as the housing. Although in this way, in addition to internal voltages σ _{0 of} the semiconductor module IC, the voltages σ _TG caused by the assembly or the solder connections B and the module carrier T of the test housing TG can be detected and evaluated, there are Examination results, in particular due to the test housing TG deviating from a product-relevant housing, again no precise statements for the stress migration properties of the conductor track systems in a semiconductor component with a product housing.

According to 1C Furthermore, the semiconductor component to be examined IC can in turn be embedded in a product-relevant plastic housing G via solder connections B and a component carrier T, whereby, however, the problem arises that with a corresponding heating to temperatures T _E greater than 150 degrees Celsius by the thermal Mismatching of the layers surrounding the conductor track system causes a change in the voltage state relevant to the product, which is why no exact statements are made about the stress migration properties in such a packed semiconductor component IC. Furthermore, the plastic or plastic mass of the housing G can also melt or become soft, as a result of which the tension caused by this plastic housing G likewise leads to a reduced tension σ _G '.

Without these elevated temperatures greater than 150 Degrees Celsius, which is preferably generated by an external heater EH such reliability tests are not economically feasible, since they are several months and usually would even take several years.

The invention is therefore the object based, an apparatus and a method for detecting Stress migration properties of one in a product-relevant casing to create final assembled semiconductor device, which makes it relatively a sufficiently accurate assessment of stress migration properties in a short time receives.

According to the invention, this object is achieved with regard to the device by the features of claim 1 and Lich the procedure through the measures of claim 11 solved.

Especially through the use an internal heater located inside or in the immediate Close to one Stress migration test structure in the semiconductor device to the local one Heat of the stress migration test structure, one receives one sufficient acceleration to reduce test times, whereby a voltage caused by a product-relevant housing Remains essentially unaffected.

The stress migration test structure is preferably passed from at least one first conductor track area, which in a first Conductor track layer is formed, at least a second conductor track region, which is formed in a second conductor track layer and at least a connection area that between the conductor layers for electrical Connecting the first and second interconnect areas in a first Insulating layer is formed. As a result, the stress migration test structure in the available standing interconnect layers of the semiconductor device is received one for the measured values determined are highly informative with regard to the Stress migration properties in the semiconductor device.

A surface is preferably and / or Volume of the first and / or a volume of the second conductor track area much larger than a surface and / or a volume of the connection area, which makes one know of the layout for the further semiconductor circuit another significant reduction the length of time for the reliability check gets because the one working on the enlarged surface Tension or stress, as well as the number of diffusible vacancies is increased in volume accordingly.

To further increase measurement accuracy and statistical significance when examining stress migration properties the stress migration test structure can be a variety of first and have second conductor track areas, which over a plurality of connection areas chain-like are interconnected.

Preferably the internal heater as a heating conductor area within the at least one first or second conductor area or connection area, wherein the heating conductor area flowed through by an alternating current becomes. That way one particularly effective heating of the examined Structures, especially when using an alternating current the influence of electromigration can be reliably excluded can.

Regarding the procedure for capturing Stress migration properties are preferably the first Stress migration detection device described above in formed a semiconductor device, then the semiconductor device on one Block-support assembled and packaged in a product-relevant housing, finally a Heating current to the integrated heating device and to record the Stress migration properties of the semiconductor device a measurement voltage applied to the stress migration test structure and a current through the stress migration test structure is measured. This way, for the first time also for product-relevant housing, such as for example plastic housing, the corresponding stress migration properties in sufficient can be determined with high accuracy in a short time.

In the further subclaims are characterized further advantageous embodiments of the invention.

The invention is illustrated below of embodiments described in more detail with reference to the drawing.

Show it:

1A to 1C simplified sectional views for illustrating a conventional device and a conventional method for recording stress migration properties;

2 a simplified sectional view for illustrating an apparatus and a method for detecting stress migration properties of a semiconductor component which is finally assembled in a product-relevant housing;

3A a simplified plan view of a device for recording stress migration properties according to a first embodiment;

3B a simplified perspective view of the device according to 3A along a section II;

4A a simplified plan view of a device for recording stress migration properties according to a second embodiment;

4B a simplified sectional view of the device according 4A along a section II-II; and

5 a simplified plan view of a device for recording stress migration properties according to a third embodiment.

2 shows a simplified sectional view of a device for recording stress migration properties, the same reference numerals being the same or corresponding elements as in FIGS 1A to 1C denote and a repeated description is omitted below.

According to 2 According to the invention, the reliability tests for characterizing stress migration properties (in particular metallizations) in semiconductor components IC (integrated circuits) are carried out in a final assembled state and after packaging in a product-relevant housing G.

In the case of so-called flip-chip housings G in particular, mechanical stresses in the semiconductor component IC are induced into the region of the yield stress of so-called bulk materials, which is why they represent an increased risk of reliability. This influence, which cannot be assessed according to the prior art, is determined in accordance with 2 in that the stress migration test structures SMT integrated in the semiconductor chip IC have an integrated heating device IH internally or in the immediate vicinity thereof, which can locally generate an internal temperature T _I greater than 150 degrees Celsius. As a result, the outside temperatures can be, for example, at a working temperature of T = T _operation , which is sufficiently below a temperature compatible with plastics of a maximum of 150 degrees Celsius. In this way, the plastic materials used in product-relevant housings G can continue to attack the semiconductor component IC and the component carrier T or the solder connections or balls B and cause their corresponding mechanical stress or stress σ _G to the semiconductor component IC unchanged , In addition, outside the stress migration test structures SMT, a prevailing basic stress or a basic stress in the semiconductor material or the wiring and / or insulator layers remains at an unchanged value σ ₀ , so that the stress or the stress that can be detected by the stress migration test structure SMT corresponding stress σ to: σ = σ 0 + σ G results.

Nevertheless, the integrated heating device IH can be used to locally heat the stress migration test structure SMT to T _I greater than 150 degrees Celsius, with temperatures preferably being set in a range from 225 degrees Celsius to 300 degrees Celsius. In this way, a statement can be made in a relatively short time, that is to say 100 to 2000 hours, about the stress migration properties of a semiconductor component IC which is finally assembled in a product-relevant housing.

Contrary to the conventional storage of the semiconductor components IC with its product-relevant housings G in an oven, whereby the case voltage conditions up to towards flowing away in unwanted Way changed can be This is the first time product-related tests to characterize the stress migration properties in particular of metallizations of integrated circuits.

3A shows a simplified top view and 3B a perspective sectional view taken along a section II 3A a device for detecting stress migration properties according to a first exemplary embodiment, the same reference numerals again designating the same or corresponding elements and a repeated description being omitted below.

According to 3A and 3B the stress migration test structure SMT has two first conductor path regions in a first conductor path layer or metallization level L1 1 on, which are designed as printed circuit boards with a relatively large surface area for optimal absorption of mechanical stresses or strains and / or volumes for forming or providing vacancies. In a second interconnect layer or metallization level L2 there are three second interconnect areas 2 formed the first conductor track areas 1 over connection areas 3 in so-called contact holes or electrically connect vias. The connection areas 3 connect the first and second interconnect areas 1 and 2 consequently through a corresponding contact hole or via in a first insulating layer I1 lying between the conductor track layers L1 and L2.

To improve the sensitivity of the stress migration test structure SMT is at least the surface and / or the volume of the first conductor track areas 1 much larger than a surface and / or a volume of the connection areas 3 , which causes the stress migration-related material transport or voiding mainly in the connection areas 3 effect. These cavities formed by the stress migration are in the connection areas 3 designated V (Void).

In the stress migration test structure SMT according to the first embodiment 3A and 3B own the first trace areas 1 a significantly larger surface area and / or volume than the second conductor track areas 2 , wherein these second conductor track areas can also have a correspondingly large surface area and / or volume. In the exemplary embodiment shown, however, these second conductor track regions are also outstandingly suitable for an internal heating device described later.

According to 3A and 3B The stress migration test structure SMT therefore consists of a large number of first interconnect areas 1 and a plurality of second conductor track areas 2 that have a variety of connection areas 3 are connected to one another in a chain. Due to this chain-like structure, there is a further improvement in the statistical significance for the detection of stress migration properties in a semiconductor module.

For local heating of the stress migration test structure SMT is according to the first embodiment 3A and 3B outside the first trace areas 1 and the second conductor areas 2 or the connection areas 3 an integrated heating device in the form of heating conductor structures.

More specifically, is according to 3B in the second conductor track layer L2 below the first conductor track regions 1 and between the second conductor track areas 2 for example, a meandering patterned conductor strip IH1 is formed, which can be heated with a heating current by Joule heating. The heating current of this lower integrated heater IH1 can be according to 3A for example, an alternating current or a direct current AC / DC.

Furthermore, according to 3B an upper integrated heating device IH2 can also be formed in a conductor track layer L3 which is spaced apart by a second insulating layer I2 and consequently lies above the first conductor track layer L1 and which can in turn be structured in a meandering manner, for example. In this case, heating takes place in the same way as in the lower integrated heating device IH1 via a direct or alternating current.

The integrated heating device IH1 and IH2 preferably has a polycrystalline semiconductor material and in particular polysilicon, as a result of which particularly good thermal conductivity properties are obtained. However, metal materials can also be used in the same way. The temperatures generated in this lower and upper internal heating device IH1 and IH2 are usually above 150 degrees Celsius and preferably in a temperature range from 225 degrees Celsius to 300 degrees Celsius, which results in stress migration, particularly in the first conductor track areas 1 can accelerate optimally without causing a significant change in the stresses σ ₀ in the semiconductor component IC and in particular in the stresses σ _G caused by the plastic housing _G.

Especially when using silicon as Semiconductor material for receives the semiconductor chip IC one due to the good thermal conductivity of silicon one exclusively local warming, which is only in a very small area close to the stress migration test structure SMT limited is.

4A shows a simplified top view and 4B a simplified sectional view along a section II-II in 4A a device for recording stress migration properties according to a second exemplary embodiment, the same reference numerals being the same or corresponding elements as in 3A and 3B denote and a repeated description is omitted below.

According to 4A and 4B The stress migration test structure in turn has the same structure as the stress migration test structure according to the first exemplary embodiment, but now the integrated heating device is formed directly in or within the stress migration test structure SMT. More specifically, the heating device according to the second exemplary embodiment has an internal heating conductor region IH within the at least first conductor region 1 or the second conductor track area 2 or the connection areas 3 on, the heating conductor area being traversed by a heating current AC. The heating current AC preferably has a high AC component, it preferably having only AC components. In this way, undesired electromigration caused by direct current can be prevented, which would impair measurement accuracy when determining the desired stress migration properties.

The heating current AC is in accordance with 4A and 4B via connection areas A directly to the external first second conductor areas 2 the chain-shaped stress migration test structure SMT created, in particular in the illustrated structuring of the second conductor track areas 2 with their relatively small surfaces and / or volumes and when using similar conductor material, Joule heating mainly in these second conductor regions 2 takes place, and the first trace areas 1 hardly contribute to warming, but can be heated by heat conduction.

According to 4B This in turn arises due to stress migration, especially in the connection areas 3 a cavity or void V, which may lead to a deterioration in the electrical conductivity or, in extreme cases, to an interruption of the connection. Since, according to this second exemplary embodiment, also the connection areas 3 heating current flows through, there should be no direct current component in the heating current AC if possible to avoid damage from electromigration.

5 shows a simplified top view of a stress migration test structure SMT according to a third exemplary embodiment, the same reference numerals again being the same or corresponding elements as in FIGS 3 and 4 denote and a repeated description is omitted below.

The device according to 5 corresponds essentially to the device according to the second exemplary embodiment, the internal heating device IH again being formed within or as part of the stress migration test structure.

In contrast to the 4A and 4B However, the entire stress migration test structure SMT is now not loaded with a heating current AC and thus heated by Joule heating, but only one between the first conductor track areas 1 lying second conductor track area 2 connected to the heating current AC via connection areas A. Thus, the structure is only heated in this between the first conductor track areas 1 lying second conductor track area 2 , causing an electrical load on the connection areas or vias 3 can be avoided. Due to the sufficient heat conduction, however, these immediately adjacent conductor track areas 3 sufficiently heated by the lower or second conductor track layer L2, so that a sufficiently accelerated stress migration is obtained. Again, to avoid damage caused by electromigration, there should be no direct current component in the heating current AC if possible.

As materials for the respective conductor track layers and connection areas can the conductor track available in semiconductor modules or metallization materials are used, in particular copper and / or aluminum as Materials for the interconnect layers and copper, aluminum or tungsten for the connection areas can be used.

Regarding the procedure for capturing Stress migration properties of one in a product-relevant casing Final assembled semiconductor device, it is proposed that the above described stress migration test structures with their respective internal or directly trained integrated Heaters are formed in the semiconductor device, wherein subsequently the semiconductor component on a component carrier T, which is preferably a lead frame or lead frame of a flip-chip housing, is assembled. Subsequently becomes the product-relevant housing preferably formed by means of a plastic injection molding process and after cooling or hardening the plastic, the actual reliability test in the final assembly Condition done. This will start with a heating current is applied to the integrated heating device and also for Assessment of the stress migration properties of the semiconductor device a measurement voltage is applied to the stress migration test structure and measured a current flowing through the stress migration test structure. The application of the heating current and the application of the measuring voltage can are carried out simultaneously or at different times, which further simplifies the test procedure and acceleration receives.

The invention has been described above one packed in a flip-chip package Semiconductor device described. However, it is not limited to this and includes all other product-relevant housings in the same way. In Similarly, the stress migration test structure is not based on that limited form shown, but includes in the same way all alternative forms and configurations, being an integrated heater inside or in the immediate Near the Stress migration test structure causes local warming.

1

first Conductor track area

2

second Conductor track area

3

connecting area

SMT

Stress migration test structure

IC

A semiconductor device

B

solder

T

Block-support

TG

test case

G

product-relevant casing

EH

external heater

IH, IH1, IH2

integrated heater

AC / DC

heating

V

cavity

A

terminal area

L1, L2, L3

Wiring layers

I1, I2

insulating

Claims (15)

Device for recording stress migration properties a semiconductor component (IC) finally assembled in a product-relevant housing (G) With a stress migration test structure (SMT), which is used in the semiconductor component (IC) Detection of the stress migration properties is formed; and one integrated heater (IH) that is inside or in immediate Near the Stress migration test structure (SMT) in the semiconductor device (IC) for local heating the stress migration test structure (SMT). Device according to claim 1, characterized in that the stress migration test structure (SMT) at least a first conductor track area ( 1 ) in a first conductor track layer (L1), at least one second conductor track region ( 2 ) in a second conductor track layer (L2), and at least one connection area ( 3 ) for electrically connecting the conductor track areas ( 1 . 2 ) by a first insulating layer (I1) which is formed between the conductor track layers (L1, L2). Device according to claim 2, characterized in that a surface and / or a volume of the first and / or second conductor track region ( 1 . 2 ) is significantly larger than a surface and / or a volume of the connection area ( 3 ). Device according to one of the claims 1 to 3, characterized in that the product-relevant housing (G) a plastic case represents. Device according to one of the claims 2 to 4, characterized in that the stress migration test structure (SMT) comprises a plurality of first and second conductor track areas ( 1 . 2 ) which has a large number of connection areas ( 3 ) are connected together in a chain. Device according to one of Claims 2 to 5, characterized in that the integrated heating device (IH) has a heating conductor region (IH1, IH2) outside the at least one first or second conductor region ( 1 . 2 ) or connection area ( 3 ), whereby the heating conductor area is flowed through by a heating current (AC, DC). Apparatus according to claim 6, characterized in that the heating conductor area (IH1, IH2) in the first conductor layer (L1), the second conductor layer (L2) or another to the first or second conductor region ( 1 . 2 ) adjacent conductor track layer (L3) is formed. Device according to one of the claims 2 to 5, characterized in that the integrated heating device has a heating conductor area (IH) within the at least one first or second conductor area ( 1 . 2 ) or the connection area ( 3 ), wherein the heating conductor area (IH) is flowed through by a heating current (AC). Device according to claim 8, characterized in that the heating current (AC) has a high AC component. Device according to one of the claims 1 to 9, characterized in that the integrated heating device (IH) polysilicon or metal and the semiconductor device (IC) Has silicon semiconductor material. Method for recording stress migration properties of a in a product-relevant housing (G) final assembled semiconductor device (IC) with the steps: a) Forming a detection device according to one of claims 1 to 10 in a semiconductor device (IC); b) assembling the semiconductor module (IC) on a module carrier (T); c) Form a product-relevant housing (G) the assembled semiconductor device (IC); d) applying a heating current (AC, DC) to the integrated heater (IH); and e) Create a measuring voltage to the stress migration test structure (SMT) and measuring one Current through the stress migration test structure (SMT) for detection the stress migration properties of the semiconductor device. Method according to claim 11, characterized in that in step c) a flip chip carrier is mounted as the component carrier (T) becomes. Method according to one of the claims 11 to 12, characterized in that in step c) a plastic injection molding process is carried out. Method according to one of the claims 11 to 13, characterized in that in step d) a heating current for generating a local temperature (T _I ) greater than 150 degrees Celsius and in particular for generating a temperature (T _I ) in a range of 225 degrees Celsius to 300 degrees Celsius is applied. Method according to one of the claims 11 to 14, characterized in that steps d) and e) simultaneously or be carried out separately from each other.