CN211128157U - Sound pickup system - Google Patents

Sound pickup system Download PDF

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Publication number
CN211128157U
CN211128157U CN201922178761.7U CN201922178761U CN211128157U CN 211128157 U CN211128157 U CN 211128157U CN 201922178761 U CN201922178761 U CN 201922178761U CN 211128157 U CN211128157 U CN 211128157U
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chip
slave
master
sound card
electrically connected
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赵亚非
李清
谢信珍
王双双
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iFlytek Co Ltd
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iFlytek Co Ltd
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Abstract

The utility model provides a pickup system, pickup system includes: a synchronous sound card master device, the synchronous sound card master device comprising: the clock source and the master chip are electrically connected with the clock source; a synchronized sound card slave device, the synchronized sound card slave device comprising: the slave chip and the audio acquisition slave module are electrically connected with the slave chip; wherein the slave chip is electrically connected with the master chip. The utility model discloses pickup system through the relation of connection that the clock gathered, can realize the synchronous collection pickup between a plurality of pickup equipment.

Description

Sound pickup system
Technical Field
The utility model relates to an audio acquisition field, more specifically relates to a pickup system.
Background
When conference voice acquisition is performed in a large conference room, due to the fact that the number of the microphones is large, more cables are needed to connect each microphone, deployment is time-consuming and labor-consuming, and even a plurality of sound cards need to be arranged; for a scene of meeting in multiple meeting rooms (such as remote teleconference and local multi-meeting-room joint meeting), multiple sound cards are generally required to be arranged, and the coordination is more difficult.
In the large conference scene or the multi-conference room scene, on one hand, it is difficult to deploy a plurality of microphones, and on the other hand, it is difficult to associate the microphones together, so that synchronization cannot be realized, or "pseudo-synchronization" is used for synchronization, that is, the effect of synchronization is brought to people after processing.
In the prior art, the audio collected by each microphone or sound card is not collected synchronously, so that the audio is difficult to be selectively output in a single path and mixed. The method is more difficult to realize if the audio information collected by the multi-path microphone is difficult to separate roles, for example, the audio and the video are required to be output in a combined manner, and the audio is transcribed into characters to be displayed.
SUMMERY OF THE UTILITY MODEL
Embodiments of the present invention provide a pickup system that overcomes or at least partially solves the above-mentioned problems.
The embodiment of the utility model provides a pickup system, include: a synchronous sound card master device, the synchronous sound card master device comprising: the clock source and the master chip are electrically connected with the clock source; a synchronized sound card slave device, the synchronized sound card slave device comprising: the slave chip and the audio acquisition slave module are electrically connected with the slave chip; wherein the slave chip is electrically connected with the master chip.
According to the utility model discloses pickup system still includes: the switch, synchronous sound card master is network sound card master, synchronous sound card slave is network sound card slave, the main chip is network physical layer owner chip, the slave chip is network physical layer slave chip, network sound card slave is one at least, every network physical layer slave chip all passes through the switch with network physical layer owner chip electricity is connected, network sound card master still include with the audio frequency collection primary module that the clock source electricity is connected.
According to the utility model discloses pickup system, network sound card master equipment still includes: the network physical layer main chip is electrically connected with the clock source through the phase-locked loop main chip; the master control main chip is electrically connected with the phase-locked loop main chip and the network physical layer main chip; and the audio acquisition main module is electrically connected with the field programmable gate array main chip.
According to the utility model discloses pickup system, network sound card slave unit still includes: the phase-locked loop slave chip is electrically connected with the network physical layer slave chip; the master control slave chip is electrically connected with the phase-locked loop slave chip and the network physical layer slave chip; and the audio acquisition slave module is electrically connected with the field programmable gate array slave chip.
According to the utility model discloses pickup system, the audio frequency is gathered the main module with the audio frequency is gathered the slave module and is included separately: the sound card is connected with the at least one slave sound card in sequence, the master sound card of the audio acquisition master module is electrically connected with the clock source, and the master sound card of the audio acquisition slave module is electrically connected with the slave chip of the network physical layer.
According to the pickup system provided by the embodiment of the utility model, the sub-main sound card comprises a main receiving and transmitting chip, the main receiving and transmitting chip of the main audio acquisition module is electrically connected with the clock source, and the main receiving and transmitting chip of the auxiliary audio acquisition module is electrically connected with the network physical layer auxiliary chip; the sub-slave sound card comprises a receiving and transmitting slave chip and a coder-decoder, the output end of the coder-decoder is electrically connected with the receiving and transmitting slave chip, the coder-decoder is provided with the plurality of microphone channels, and the receiving and transmitting master chip and the receiving and transmitting slave chip are sequentially connected in series.
According to the utility model discloses pickup system, receiving and dispatching owner chip with receiving and dispatching slave chip is A2B transceiver chip, the transceiver master chip and the transceiver slave chipThe chips are connected in series through built-in audio buses of the integrated circuit.
According to the utility model discloses pickup system, synchronous sound card master equipment is sub-main sound card, synchronous sound card slave unit is sub-slave sound card, sub-main sound card is one at least, main chip is the main chip of receiving and dispatching, follow the chip for receiving and dispatching from the chip, the main chip of receiving and dispatching with the chip is established ties in order from the receiving and dispatching.
According to the utility model discloses pickup system, according to the utility model discloses pickup system still includes: the phase-locked loop chip is electrically connected with the clock source; and the transmitting and receiving main chip is electrically connected with the field programmable gate array chip.
According to the utility model discloses pickup system, receiving and dispatching owner chip with receiving and dispatching slave chip is A2And B, the transceiving main chip and the transceiving slave chip are connected in series through an integrated circuit built-in audio bus.
The utility model discloses pickup system through the relation of connection that the clock gathered, can realize the synchronous collection pickup between a plurality of pickup equipment.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a sound pickup system according to an embodiment of the present invention;
fig. 2 is a schematic structural diagram of a pickup system according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of a pickup system according to another embodiment of the present invention;
fig. 4 is a schematic structural diagram of a pickup system according to another embodiment of the present invention;
fig. 5 is a schematic structural diagram of a sound pickup system according to still another embodiment of the present invention applied to an application scenario;
fig. 6 is a schematic structural diagram of a pickup system according to still another embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. Based on the embodiments in the present invention, all other embodiments obtained by a person skilled in the art without creative efforts belong to the protection scope of the present invention.
The sound pickup system according to the embodiment of the present invention is described below with reference to fig. 1 to 6.
As shown in fig. 1, the sound pickup system according to the embodiment of the present invention includes: a synchronized sound card master 610 and a synchronized sound card slave 620.
Wherein, the synchronous sound card master device 610 includes: clock source 110 and master chip 612, master chip 612 is electrically connected with clock source 110. Clock source 110 is used to generate and provide the raw clock to master chip 612. In actual implementation, clock source 110 may comprise a crystal oscillator.
The synchronized sound card slave device 620 includes: the audio collection slave module 230 is electrically connected with the slave chip 621, the audio collection slave module 230 is used for collecting audio information, and the slave chip 621 is electrically connected with the master chip 612. There is at least one synchronized sound card slave 620.
It should be noted that the electrical connection between the clock source 110 and the master chip 612 may be a direct connection through a cable, an indirect connection through a cable, or a connection by way of wireless transmission, and the electrical connection between the slave chip 621 and the master chip 612 may be a direct connection through a cable, an indirect connection through a cable, or a connection by way of wireless transmission.
In this way, the clock source 110 provides the original clock to the master chip 612, and the slave chip 621 obtains the divided reference clock through the master chip 612, so that the reference clock of the audio capture slave module 230 is also derived from the clock source 110 of the synchronous sound card master device 610.
The synchronous sound card master device 610 and the synchronous sound card slave device 620 use clocks generated by the same clock source 110, which can make the clock frequencies of the synchronous sound card master device 610 and the synchronous sound card slave device 620 consistent, and avoid the situation that the sampled data is not the same under the situation of long-time data collection. Therefore, synchronous acquisition and sound pickup can be realized.
For the case that the audio collection slave module 230 has multiple microphone channels, after the multiple microphone channels of the audio collection slave module 230 are connected to multiple microphones 440, the audio signal may be transmitted to the slave chip 621, or in the case that the number of synchronous sound card slave devices 620 is multiple, since the reference clock of the slave chip 621 corresponding to each microphone channel is derived from the clock source 110 of the synchronous sound card master device 610, the collection of complete synchronization of frequency and phase may be realized for each microphone 440, and a good foundation is laid for the processing of the array.
According to the utility model discloses pickup system, through the relation of connection that the clock gathered, can realize the synchronous collection pickup between a plurality of pickup equipment.
Pickup systems of some embodiments of the present invention are described below with reference to fig. 2 and 3.
As shown in fig. 2 and 3, in this embodiment, the sound pickup system further includes: the switch 300, the synchronous sound card master device 610 is the network sound card master device 100, the synchronous sound card slave device 620 is the network sound card slave device, the master chip 612 is the network physical layer master chip 123, the slave chip 621 is the network physical layer slave chip 223, at least one network sound card slave device is provided, and each network physical layer slave chip 223 is electrically connected with the network physical layer master chip 123 through the switch 300.
That is, the sound pickup system of this embodiment adopts a star topology, and the clock source 110 of the network soundcard master 100 is used to generate an original clock and supply the original clock to the network physical layer master chip 123. In actual implementation, clock source 110 may comprise a crystal oscillator.
The network sound card master device 100 further includes an audio collection main module 130, the audio collection main module 130 is electrically connected to the clock source 110, and the audio collection main module 130 is configured to collect audio, so that both the network sound card master device 100 and the network sound card slave device can collect audio and achieve synchronous collection.
The switch 300 is used for expanding and connecting more network sound card slave devices, so that more network sound card slave devices can synchronously acquire voice.
The clock of the network sound card slave device comes from the network, and the network sound card master device 100 and the network sound card slave device use the clock generated by the same clock source 110 (crystal oscillator), so that the clock frequencies of the network sound card master device 100 and the network sound card slave device are consistent, and the situation that the sampled data are different under the condition of long-time data acquisition is avoided. Therefore, the audio frequency of the same data volume collected by the two devices can be known, and synchronous collection and pickup are realized.
The scheme can be used for synchronous acquisition of a plurality of meeting rooms (such as off-site meeting rooms), and can also be used for synchronous acquisition of ultra-large meeting rooms,
As shown in fig. 2, the network soundcard master 100 may further include a Phase-locked loop master chip 121(P LL, Phase L keyed L oop), a master control master chip 124, and a Field programmable gate Array master chip 122 (FPGA).
The phase-locked loop master chip 121 is electrically connected with the clock source 110, and the network physical layer master chip 123 is electrically connected with the clock source 110 through the phase-locked loop master chip 121; the main control main chip 124 is electrically connected with the phase-locked loop main chip 121, and the main control main chip 124 is electrically connected with the network physical layer main chip 123; the field programmable gate array main chip 122 is electrically connected with the phase-locked loop main chip 121, and the audio acquisition main module 130 is electrically connected with the field programmable gate array main chip 122.
In the network sound card master device 100, the most original clock is generated by a clock source 110 (crystal oscillator), 24.575MHz clock is generated by a phase-locked loop master chip 121 for the clock of the audio acquisition master module 130 (local acquisition device), and 125M is generated and transmitted to the network sound card slave device through a network physical layer master chip 123 for the reference clock of the network sound card slave device.
As shown in fig. 2, the network sound card slave device may further include a Phase-locked loop slave chip 221(P LL, Phase L ocked L oop), a master slave chip 224, and a Field Programmable gate array slave chip 222 (FPGA).
Wherein, the phase-locked loop slave chip 221 is electrically connected with the network physical layer slave chip 223; the master slave chip 224 is electrically connected with the phase-locked loop slave chip 221, and the master slave chip 224 is electrically connected with the network physical layer slave chip 223; the field programmable gate array slave chip 222 is electrically connected with the phase locked loop slave chip 221, and the audio acquisition slave module 230 is electrically connected with the field programmable gate array slave chip 222.
The clock of the network sound card slave device is derived from the network, and the clock in the network is resolved into a clock of 125MHz as the electrical input of the phase-locked loop slave chip 221 through the network physical layer slave chip 223, and then frequency division is performed to generate a clock of 24.576MHz for the audio acquisition slave module 230 to acquire audio. It should be noted that, since the audio clock is typically 24.576MHz, frequency division is performed here.
The synchronous acquisition of multiple sound cards in the above embodiment can transmit the clock of the network sound card master device 100 to the network sound card slave device through the network cable by using the IEEE1588 protocol of the network, thereby realizing the synchronous acquisition of two sound cards. Meanwhile, voting of the master device and the slave device can be confirmed through communication between the two sound card devices, and the master-slave relationship is determined. When more microphone channels are required to acquire synchronously, more sound card devices can be connected using the switch 300.
As shown in fig. 3, audio capture master module 130 and audio capture slave module 230 each include: the sub-master sound card 410 and the at least one sub-slave sound card 420, each sub-slave sound card 420 corresponding to a plurality of microphone channels, the sub-master sound card 410 and the at least one sub-slave sound card 420 being serially connected in sequence.
As shown in fig. 3, there are a plurality of sub-slave sound cards 420, and the sub-master sound card 410 and the plurality of sub-slave sound cards 420 are serially connected, that is, after the plurality of sub-slave sound cards 420 are serially connected, one sub-slave sound card 420 located at the end is further connected to the sub-master sound card 410. For example, the sub-master sound card 410 is electrically connected to a first sub-slave sound card 420, the first sub-slave sound card 420 is electrically connected to a second sub-slave sound card 420, the second sub-slave sound card 420 is electrically connected … … to a third sub-slave sound card 420
It is to be understood that, since each slave sound card 420 can collect multiple audio signals, for example, each slave sound card 420 corresponds to N microphone channels, and the synchronous sound card includes M slave sound cards 420, the synchronous sound card can collect M × N audio signals, so that the apparatus for calibrating the array element coordinates of the microphones 440 can simultaneously measure the coordinates of M × N microphones 440, for example, when M is 4 and N is 4, the audio collection master module 130 or the audio collection slave module 230 can simultaneously collect signals of 16 microphones 440.
The sub-master sound card 410 of the audio collection master module 130 is electrically connected with the clock source 110, and the sub-master sound card 410 of the audio collection slave module 230 is electrically connected with the network physical layer slave chip 223.
The sub-master sound cards 410 and the sub-slave sound cards 420 use clocks generated by the same clock source 110 (crystal oscillator), which can make the clock frequencies of the sub-master sound cards 410 and the sub-slave sound cards 420 consistent, thereby realizing synchronous acquisition and sound pickup.
As shown in fig. 3, the sub-master sound card 410 includes a master transceiver chip 411, the master transceiver chip 411 of the audio capture master module 130 is electrically connected to the clock source 110, and the master transceiver chip 411 of the audio capture slave module 230 is electrically connected to the network physical layer slave chip 223.
The clock source of the sub-master sound card 410 of the audio acquisition main module 130 is to obtain 24.576MHz audio frequency by frequency division through the phase-locked loop master chip 121 as the sampling reference clock of the fpga master chip 122, to generate a 48KHz sampling clock for transceiving the system reference clock of the master chip 411, and then to obtain 49.152MHz clock of the integrated circuit built-in audio bus 430 clock through P LL inside the transceiving master chip 411 for transmitting data and as the reference clock of the sub-slave sound card 420.
The slave sound card 420 includes a transceiving slave chip 421 and a codec 424, an output terminal of the codec 424 is electrically connected to the transceiving slave chip 421, the codec 424 has a plurality of microphone channels, the transceiving master chip 411 and the transceiving slave chip 421 are serially connected, and the codec 424 may be an audio codec.
The slave sound card 420 divides the frequency from the integrated circuit built-in audio bus 430 to obtain a sampling clock of 48KHz for the sampling clock of the codec 424 to acquire audio data. The 48KHz sampling clock output by the sub slave sound card 420 can be configured to be synchronized with the 48KHz phase input by the sub master sound card 410, so as to realize the sampling clock with the same frequency and phase. Through software configuration, the phase can be corrected, the alignment of the phase is realized, and the same phase is realized.
From the above description, the clock synchronization can achieve the acquisition with completely synchronous frequency and phase, and lay a good foundation for the array processing.
The transceiver master chip 411 and the transceiver slave chip 421 may both be a2The B transceiver chip, the transceiver master chip 411 and the transceiver slave chip 421 are connected in series via the integrated circuit built-in audio bus 430.
Of course, the transceiver master chip 411 and the transceiver slave chip 421 may be other types of transceiver chips that can transmit or collect audio signals.
The synchronous acquisition of multiple sound cards in the above embodiment can transmit the clock of the network sound card master device 100 to the network sound card slave device through the network cable by using the IEEE1588 protocol of the network, thereby realizing the synchronous acquisition of two sound cards. Meanwhile, voting of the master device and the slave device can be confirmed through communication between the two sound card devices, and the master-slave relationship is determined. When more microphone channels are required to acquire synchronously, more sound card devices can be connected using the switch 300.
A sound pickup system according to an embodiment of the present invention is described below with reference to fig. 6.
The meaning of the individual structures in fig. 6 is:
1. MIC 4: four analog microphone inputs, i.e. four MIC _ IN interfaces.
2. Code: the codec (audio coding chip) mainly encodes the analog signals of the microphone into digital signals. The analog signal can be converted into a digital signal of I2S (TDM4), and the conversion rate is 48 KHz;
3. AD2428 shelf #: the synchronous data transmission node chip of each slave node can convert the digital signal of I2S (TDM4) collected by Codec into A2B bus signal (L VDS signal), put to A2The B bus is transmitted to the AD2428 Master at a rate of 49.152 MHz.
4. AD2428 Master: a master transceiver chip for placing each slave node in A2The data on the B bus is analyzed, and the output is I2S (TDM16) digital signals to be sent to the FPGA.
5. The FPGA mainly sends the synchronous clock to the AD2428 Master to collect data at the speed of the synchronous clock, and simultaneously sends the data collected by the synchronous clock to the main control chip to be processed, wherein the synchronous clock source of the FPGA is P LL.
6. P LL phase-locked loop chip, mainly dividing the synchronous clock, the source of the synchronous clock of the network master device is 25MHz crystal oscillator, the source of the synchronous clock of the network slave device is 125MHz clock on the network, the selection of the synchronous clock source is selected by the master chip through I2C configuration, the final output clock is 24.576MHz clock divided by one of the synchronous clocks.
7. A main control chip:
(1) the main control chip is configured with AD2428 main node chip through I2C, or through A2And the B bus can transmit the configuration of the master control chip to the slave node, and then the AD2428 slave node chip and the Codec chip of the slave node are configured to configure corresponding registers to realize corresponding functions.
(2) The main control chip configures a P LL chip through I2C to realize the selection of a synchronous clock, and the synchronous clock is selected to be a 125MHz clock from a network or a 25MHz clock from a crystal oscillator.
(3) And receiving audio data acquired by the FPGA, and performing corresponding processing.
(4) Communicating with other equipment to confirm the master-slave relationship of the network; the processed data can be sent to a server for processing and other network communication.
8. Crystal oscillator 25 MHz: clock source, synchronous clock source of network main node.
9. Ethernet Physical chip converts network signal transmitted by main control chip into analog signal transmitted on network line, network master device sends 125MHz synchronous clock output by P LL to network, network slave device analyzes 125MHz synchronous clock on network to send P LL, network Physical chip supporting IEEE1588 protocol can realize clock synchronous transmission.
10. POE power separation module: the present case uses the net twine to supply power and data transmission, and POE power separation module can be separated network and 48V power supply.
11. 5V power supply: the 48V power that POE power separation module was divided converts the 5V power into, can be used to the power supply of whole equipment.
12. And (4) the POE switch: the POE switch is used for power supply and network data exchange, and the POE switch needs to support an IEEE1588 protocol due to the clock synchronization function.
13. L AN/WAN local area network, WAN acronym.
14. PC/Server: and performing service, such as transcription and the like, on the acquired and processed data.
The way in which the clocks are synchronized in the embodiment shown in fig. 6 is the same as that in the embodiment shown in fig. 3, and fig. 6 shows the transmission path of audio data. Specifically, the microphone 440(MIC × 4) collects analog audio data and transmits the analog audio data to the CODEC 424(CODEC), the CODEC 424 converts the analog audio data into digital audio data and transmits the digital audio data to the corresponding slave transceiver chip 421(AD2428 salt #), and the slave transceiver chip 421 transmits the digital audio data through the a2The B audio bus is transmitted to a Master transceiver chip 411(AD2428 Master), the Master transceiver chip 411 transmits the digital audio data to the FPGA, the FPGA transmits the digital audio data to a corresponding Master control chip (Master control Master chip 124 or Master control slave chip 224), the Master control chip transmits the digital audio data to a corresponding network physical layer chip (network physical layer Master chip 123 or network physical layer slave chip 223), and the network physical layer chipThe physical layer chip transmits the digital audio data to the exchanger and then transmits the digital audio data to the server through the network cable.
Pickup systems according to some embodiments of the present invention are described below with reference to fig. 4 and 5.
In this embodiment, the synchronous sound card master device 610 is a sub-master sound card 410, the synchronous sound card slave device 620 is a sub-slave sound card 420, at least one sub-master sound card 410 is provided, the master chip 612 is a master transceiver chip 411, the slave chip 621 is a slave transceiver chip 421, and the master transceiver chip 411 and the slave transceiver chip 421 are serially connected in sequence.
As shown in fig. 4, there are a plurality of sub-slave sound cards 420, and the transceiver master chip 411 of the sub-master sound card 410 and the transceiver slave chips 421 of the sub-slave sound cards 420 are sequentially connected in series, that is, after the plurality of transceiver slave chips 421 are connected in series, one transceiver slave chip 421 located at an end is further connected to the transceiver master chip 411. For example, the master transceiver chip 411 of the sub-master sound card 410 is electrically connected to the slave transceiver chip 421 of the first sub-slave sound card 420, the slave transceiver chip 421 of the first sub-slave sound card 420 is electrically connected to the slave transceiver chip 421 of the second sub-slave sound card 420, and the slave transceiver chip 421 of the second sub-slave sound card 420 is electrically connected to the slave transceiver chip 421 of the third sub-slave sound card 420 … …
The master transceiver chip 411 has a bus output master interface 413, the slave transceiver chip 421 has a bus input slave interface 422 and a bus output slave interface 423, the bus input slave interface 422 of the first slave transceiver chip 421 is electrically connected to the bus output master interface 413, the bus output slave interface 423 of the first slave transceiver chip 421 is electrically connected … … to the bus input slave interface 422 of the second slave transceiver chip 421
It is to be understood that, since each slave sound card 420 can collect multiple audio signals, for example, each slave sound card 420 corresponds to N microphone channels, and the synchronous sound card includes M slave sound cards 420, the synchronous sound card can collect M × N audio signals, so that the apparatus for calibrating the array element coordinates of the microphones 440 can simultaneously measure the coordinates of M × N microphones 440, for example, as shown in fig. 5, when M is 4, and N is 4, the slave sound card 420 can simultaneously collect signals of 16 microphones 440.
As shown in fig. 4, the sub-master sound card 410 further includes a Phase-locked loop chip (P LL, Phase L ocked L oop) and a Field Programmable Gate Array (FPGA) chip.
The phase-locked loop chip is electrically connected with the clock source 110; the field programmable gate array chip is electrically connected to the pll chip, and the transceiver main chip 411 is electrically connected to the field programmable gate array chip.
The clock source of the sub-master sound card 410 is obtained by frequency division through a phase-locked loop chip, and the clock of the phase-locked loop chip can be derived from a network synchronous clock 125MHz or a crystal oscillator clock 25MHz, the frequency division through the phase-locked loop chip is used for obtaining 24.576MHz audio frequency as a sampling reference clock of the field programmable gate array master chip 122, a 48KHz sampling clock is generated for transceiving a system reference clock of the master chip 411, and then 49.152MHz of an integrated circuit built-in audio bus 430 clock is obtained through P LL inside the transceiving master chip 411 for transmitting data and serving as a reference clock of a slave device.
The slave sound card 420 divides the frequency from the integrated circuit built-in audio bus 430 to obtain a sampling clock of 48KHz for the sampling clock of the codec 424 to acquire audio data. The 48KHz sampling clock output by the sub slave sound card 420 can be configured to be synchronized with the 48KHz phase input by the sub master sound card 410, so as to realize the sampling clock with the same frequency and phase. Through software configuration, the phase can be corrected, the alignment of the phase is realized, and the same phase is realized.
The master chip 411 and the slave chip 421 are both A2The B transceiver chip, the transceiver master chip 411 and the transceiver slave chip 421 are connected in series via the integrated circuit built-in audio bus 430.
Of course, the transceiver master chip 411 and the transceiver slave chip 421 may be other types of transceiver chips that can transmit or collect audio signals.
As shown in fig. 5, the pickup system of this embodiment is deployed at a small conference table. The pickup system comprises 1 sub-master sound card 410, 4 sub-slave sound cards 420 and 16 microphones 440, and all the sound cards are connected in series by hands through an integrated circuit built-in audio bus 430.
As can be seen from fig. 5, the data collected by the 16 microphones 440 are serially connected by the built-in audio bus 430 of the integrated circuit, and only one bus is needed between the two sound cards to transmit the audio data of multiple channels, and finally, the 16 channels of audio data are collected and transmitted to the main control chip 510 for processing and output to the conference server 520.
The volume of each slave sound card 420 is relatively small, and the slave sound card 420 can be placed at a corner of the conference table, close to the microphone 440, so that the microphone 440 can be conveniently connected to the slave sound card 420.
Used between the channels of the respective sub slave sound cards 420 and the sub master sound card 410 is a2B clock synchronization, using A2B technique by A2The B bus synchronizes the clock to the various codecs 424 and then synchronously captures the microphone 440 audio.
In actual implementation, one or more of the above embodiments may be selected to be cut or combined for use according to the size of a conference scene, so as to reduce unnecessary waste.
Each device or sound card of this case uses the network connection, and each small node uses the twisted-pair line to connect, generally two or add two power cords and connect, and small-size meeting room when arranging, 1 to 16 only need a line surround the conference table can, and medium-sized meeting room, 17 to 32 need two lines, 32 to 48 only need 3 lines can. Each node device is small in size, and only the node device needs to be deployed at a certain corner of the conference table.
In medium and small sized meeting scene, use A2And the clock B is synchronous, so that the sampling points acquired by the multiple microphones 440 can be aligned and synchronized, the association degree of the microphones 440 is improved, and the role separation degree is improved.
To sum up, the embodiment of the utility model provides a pickup system has following advantage at least:
1. long transmission distance
Between two devices or sound cardsAnd the audio is transmitted by using the network, so that the audio can be transmitted farther. Single sound card using A2And the bus B is used for transmission, and the distance between two nodes can reach 15 meters, so that the deployment of a general large conference scene is met.
2. Convenient deployment
Use of the case A2B-bus transmission generally requires two twisted pair wires to transmit data, plus two power lines for power supply. The data line and the power line form a cable which can transmit 16 channels of audio to the main device.
3. High sampling rate, high number of sampling bits
The device adopts the sampling rate of 48KHz and the bit depth of 32 bits, can clearly describe voice information, and can provide good audio frequency basis for processing such as playback, transcription and the like. The sampling rate and bit depth are generated by a proprietary ADC chip.
4. Can realize multi-path collection
One network sound card device can be connected with three groups A2B devices, a group A2The B device has 16 channels, and one network sound card device can be connected with 48 channels of audio, so that the voice pickup in a large conference scene is met.
5. Can realize multi-path sampling frequency phase alignment
The case uses A2B technique, can pass through A2The B bus configuration realizes phase alignment of sampling frequencies of the microphones 440 of the respective slave devices, improves correlation between the microphones 440, and improves the degree of role separation.
6. Synchronous acquisition of multi-network sound card equipment can be realized
When a plurality of sound cards are needed, each sound card needs to be synchronously collected, and the time deviation of the sounds of the two sound cards is prevented under the condition of long-time collection.
7. Dynamically modifying digital gain values
In the scheme, the gain of each microphone 440 is digitally modulated, and each channel can be modulated with a wide modulation range which can reach a gain modulation range of 36 dB. And the gain adjustment consistency of each channel is high, and the resolution can reach 0.5 dB. The purposes of high precision and high consistency can be realized by a software configuration mode.
8. Small size, light weight
The utility model discloses the sound card volume is less, need not to install in the rack, only need with equipment fixing in conference table certain corner can, do not occupy the rack resource.
The above-described embodiments of the apparatus are merely illustrative, and the units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of the present embodiment. One of ordinary skill in the art can understand and implement it without inventive effort.
Through the above description of the embodiments, those skilled in the art will clearly understand that each embodiment can be implemented by software plus a necessary general hardware platform, and certainly can also be implemented by hardware. With this understanding in mind, the above-described technical solutions may be embodied in the form of a software product, which can be stored in a computer-readable storage medium such as ROM/RAM, magnetic disk, optical disk, etc., and includes instructions for causing a computer device (which may be a personal computer, a server, or a network device, etc.) to execute the methods described in the embodiments or some parts of the embodiments.
Finally, it should be noted that: the above embodiments are only used to illustrate the technical solution of the present invention, and not to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, it should be understood by those skilled in the art that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications and substitutions do not depart from the spirit and scope of the present invention in its corresponding aspects.

Claims (10)

1. A sound pickup system, comprising:
a synchronous sound card master device, the synchronous sound card master device comprising: the clock source and the master chip are electrically connected with the clock source;
a synchronized sound card slave device, the synchronized sound card slave device comprising: the slave chip and the audio acquisition slave module are electrically connected with the slave chip;
wherein the slave chip is electrically connected with the master chip.
2. The pickup system of claim 1, further comprising: the switch, synchronous sound card master is network sound card master, synchronous sound card slave is network sound card slave, the main chip is network physical layer owner chip, the slave chip is network physical layer slave chip, network sound card slave is one at least, every network physical layer slave chip all passes through the switch with network physical layer owner chip electricity is connected, network sound card master still include with the audio frequency collection primary module that the clock source electricity is connected.
3. The pickup system as claimed in claim 2, wherein the network sound card master device further comprises:
the network physical layer main chip is electrically connected with the clock source through the phase-locked loop main chip;
the master control main chip is electrically connected with the phase-locked loop main chip and the network physical layer main chip;
and the audio acquisition main module is electrically connected with the field programmable gate array main chip.
4. The pickup system of claim 2, wherein the network sound card slave device further comprises:
the phase-locked loop slave chip is electrically connected with the network physical layer slave chip;
the master control slave chip is electrically connected with the phase-locked loop slave chip and the network physical layer slave chip;
and the audio acquisition slave module is electrically connected with the field programmable gate array slave chip.
5. The pickup system as claimed in any one of claims 2 to 4, wherein the audio capture master module and the audio capture slave module each comprise: the sound card is connected with the at least one slave sound card in sequence, the master sound card of the audio acquisition master module is electrically connected with the clock source, and the master sound card of the audio acquisition slave module is electrically connected with the slave chip of the network physical layer.
6. The pickup system according to claim 5, wherein the sub-master sound card comprises a master transceiver chip, the master transceiver chip of the audio collection master module is electrically connected to the clock source, and the master transceiver chip of the audio collection slave module is electrically connected to the network physical layer slave chip;
the sub-slave sound card comprises a receiving and transmitting slave chip and a coder-decoder, the output end of the coder-decoder is electrically connected with the receiving and transmitting slave chip, the coder-decoder is provided with the plurality of microphone channels, and the receiving and transmitting master chip and the receiving and transmitting slave chip are sequentially connected in series.
7. The pickup system as claimed in claim 6, wherein the master and slave chips are both a2And B, the transceiving main chip and the transceiving slave chip are connected in series through an integrated circuit built-in audio bus.
8. The pickup system as claimed in claim 1, wherein the synchronous sound card master device is a sub-master sound card, the synchronous sound card slave device is a sub-slave sound card, the number of the sub-master sound cards is at least one, the master chip is a master transceiver chip, the slave chip is a slave transceiver chip, and the master transceiver chip and the slave transceiver chip are serially connected in sequence.
9. The pickup system of claim 8, wherein the sub-master sound card further comprises:
the phase-locked loop chip is electrically connected with the clock source;
and the transmitting and receiving main chip is electrically connected with the field programmable gate array chip.
10. The pickup system as claimed in claim 8 or 9, wherein the master and slave transceiver chips are both a2And B, the transceiving main chip and the transceiving slave chip are connected in series through an integrated circuit built-in audio bus.
CN201922178761.7U 2019-12-06 2019-12-06 Sound pickup system Active CN211128157U (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113014348A (en) * 2021-02-24 2021-06-22 阿里巴巴集团控股有限公司 Distributed audio transmission system, audio master control circuit and audio control equipment

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113014348A (en) * 2021-02-24 2021-06-22 阿里巴巴集团控股有限公司 Distributed audio transmission system, audio master control circuit and audio control equipment

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