CN209030179U - A kind of delay switch circuit of reactance voltage fluctuation - Google Patents
A kind of delay switch circuit of reactance voltage fluctuation Download PDFInfo
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Abstract
The utility model belongs to electronic technology field, disclose a kind of delay switch circuit of reactance voltage fluctuation, comprising: input interface Vin+, input interface Vin-, output interface Vout+, output interface Vout-, resistance R3, capacitor C2, resistance R5, NPN triode Q2, capacitor C3, resistance R6, resistance R7 and P-MOS pipe MQ1；The first end of R3 is connected with Vin+, and the second end of R3 is connected by C2 with Vin-, and the second end of R3 is connected by R5 with the base stage of Q2, and the emitter of Q2 is connected with Vin-；The first end of C3 is connected with Vin+, and the second end of C3 is connected by R7 with the collector of Q2, and R6 is in parallel with C3, and the grid of MQ1 is connected with the second end of C3, and the source electrode of MQ1 is connected with Vin+, and the drain electrode of MQ1 is connected with Vout+；Vin- and Vout- is grounded.The delay switch circuit of reactance voltage fluctuation provided by the utility model is able to solve short, the narrow technical problem of tunable range that is delayed in the prior art.
Description
Technical field
The utility model relates to electronic technology field, in particular to a kind of delay switch circuit of reactance voltage fluctuation.
Background technique
With being widely used for existing net powerful device, such as air-conditioning, incubator etc., starts moment line voltage and have not
With the fluctuation of degree, it may cause other unexpected power down of equipment currently in use and power on again.It should be noted that in circuit design
In, chip has stringent specification to define power supply electrifying timing, if timing requirements are unsatisfactory for, for example mains fluctuation, if
Residual voltage is released after standby power down powers on not in time and rapidly, or to power on rising edge discontinuous etc., will be unable to normally start, Huo Zheqi
Certain dysfunctions after dynamic.
In this regard, scheme of the prior art using delay electric power starting, provides longer delay for the remnants that release for load
Electricity avoids electricity cumulative effect electrifying timing sequence next time, overcomes the fluctuation bring sequence problem of input power.Existing scheme
It is delayed short, tunable range is narrow, and electric power starting rising edge climbs slowly, or needs delay chip then or need to increase programming burning
Problem.
Utility model content
The utility model provides a kind of delay switch circuit of reactance voltage fluctuation, solves to be delayed in the prior art short, adjustable
The technical issues of humorous narrow range.
In order to solve the above technical problems, the utility model provides a kind of delay switch circuit of reactance voltage fluctuation, comprising:
It input interface Vin+, input interface Vin-, output interface Vout+, output interface Vout-, delay startup driving circuit and slow opens
Dynamic circuit；
The delay startup driving circuit includes: resistance R3, capacitor C2, resistance R5 and NPN triode Q2；
The first end of the resistance R3 is connected with the input interface Vin+, and the second end of the resistance R3 passes through the electricity
Hold C2 to be connected with the input interface Vin-, the second end of the resistance R3 passes through the resistance R5 and the NPN triode Q2
Base stage be connected, the emitter of the NPN triode Q2 is connected with the input interface Vin-；
The soft-start circuit includes: capacitor C3, resistance R6, resistance R7 and P-MOS pipe MQ1；
The first end of the capacitor C3 is connected with the input interface Vin+, and the second end of the capacitor C3 passes through the electricity
Resistance R7 is connected with the collector of the NPN triode Q2, and the resistance R6 is in parallel with the capacitor C3, the P-MOS pipe MQ1's
Grid is connected with the second end of the capacitor C3, and the source electrode of the P-MOS pipe MQ1 is connected with the input interface Vin+, described
The drain electrode of P-MOS pipe MQ1 is connected with the output interface Vout+；
The input interface Vin- and output interface Vout- is grounded.
Further, the switching circuit further include: leadage circuit；
The leadage circuit includes: capacitor C1, resistance R1, NPN triode and resistance R4；
The first end of the capacitor C1 is connected with the input interface Vin+, and the second end of the capacitor C1 passes through the electricity
Resistance R2 is connected with the input interface Vin-, and the second end of the capacitor C1 passes through the resistance R2 and the NPN triode
Base stage is connected, and the collector of the NPN triode is connected by resistance R4 with the second end of the resistance R3, tri- pole NPN
The emitter of pipe is grounded.
Further, the switching circuit further include: capacitor C4；
The first end of the capacitor C4 is connected with the output interface Vout+, the second end of the capacitor C4 with it is described defeated
Outgoing interface Vout- is connected.
A kind of delay switch circuit of reactance voltage fluctuation, comprising: input interface Vin+, input interface Vin-, output interface
Vout+, output interface Vout-, delay startup driving circuit and soft-start circuit；
The delay startup driving circuit includes: resistance R33, capacitor C22, resistance R55, resistance R77 and NPN triode
Q22；
The first end of the resistance R33 is connected with the input interface Vin+, and the second end of the resistance R33 passes through described
Capacitor C22 is connected with the input interface Vin-, and the second end of the resistance R33 passes through the resistance R55 and tri- pole NPN
The base stage of pipe Q2 is connected, and the collector of the NPN triode Q2 is connected by the resistance R77 with the input interface Vin+；
The soft-start circuit includes: capacitor C33, resistance R66 and N-MOS pipe MQ11；
The first end of the capacitor C33 is connected with the input interface Vin-, the second end of the capacitor C33 with it is described
The radio of NPN triode Q2 is extremely connected, and the resistance R66 is in parallel with the capacitor C3, the grid of the N-MOS pipe MQ11 and institute
The second end for stating capacitor C3 is connected, and the source electrode of the N-MOS pipe MQ11 is connected with the input interface Vin-, the N-MOS pipe
The drain electrode of MQ11 is connected with the output interface Vout-；
The input interface Vin- and output interface Vout- is grounded, and the input interface Vin+ connects with the output
Mouth Vout+ is connected.
Further, the switching circuit further include: leadage circuit；
The leadage circuit includes: capacitor C11, resistance R11, NPN triode and resistance R44；
The first end of the capacitor C11 is connected with the input interface Vin+, and the second end of the capacitor C11 passes through described
Resistance R22 is connected with the input interface Vin-, and the second end of the capacitor C11 passes through the resistance R22 and tri- pole NPN
The base stage of pipe is connected, and the collector of the NPN triode is connected by resistance R44 with the second end of the resistance R33, described
The emitter of NPN triode is grounded.
Further, the switching circuit further include: capacitor C44；
The first end of the capacitor C44 is connected with the output interface Vout+, the second end of the capacitor C4 with it is described defeated
Outgoing interface Vout- is connected.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
The delay switch circuit of the reactance voltage fluctuation provided in the embodiment of the present application, the design based on soft-start circuit are drawn
Enter delay startup driving circuit, and specific setting RC charging network in the driving circuit, is realized by adjusting resistance and capacitor to electricity
The a wide range of tuning of time delay is opened in source, and support is as short as several milliseconds, even longer delay in long to several seconds；So that electric power starting rises
It is unrelated with the long delay of addition along time-to-climb, it powers on rapidly.
And further, in order to avoid the accumulation of RC charging network remaining capacity after power down, so that electric power starting obtains next time
Less than effective delay, leadage circuit is set, is started to work in plant-grid connection moment, is the remnants electricity of capacitor storage in RC network
Amount provides path of releasing, and automatic to disconnect path of releasing after certain time-delay, RC network restarts to charge, and is electric power starting
Delay is provided.
Detailed description of the invention
Fig. 1 is the structural schematic diagram of the delay switch circuit for the reactance voltage fluctuation that the utility model embodiment one provides；
Fig. 2 is the structural schematic diagram of the delay switch circuit for the reactance voltage fluctuation that the utility model embodiment two provides.
Specific embodiment
The embodiment of the present application is delayed in the prior art by providing a kind of delay switch circuit of reactance voltage fluctuation, solution
It is short, the narrow technical problem of tunable range.
In order to better understand the above technical scheme, in conjunction with appended figures and specific embodiments to upper
It states technical solution to be described in detail, it should be understood that the specific features in the utility model embodiment and embodiment are to this Shen
Please technical solution detailed description, rather than the restriction to technical scheme, in the absence of conflict, the application are real
The technical characteristic applied in example and embodiment can be combined with each other.
Referring to Fig. 1, a kind of delay switch circuit of reactance voltage fluctuation, comprising: input interface Vin+, input interface Vin-,
Output interface Vout+, output interface Vout-, delay startup driving circuit and soft-start circuit；Wherein, the input interface Vin
+ and the input interface Vin- as power access end, be separately connected the anode and cathode of input power；The output interface
The power output end of Vout+ and the output interface Vout- as delay switch circuit is separately connected the positive and negative of load
Pole.
Specifically, the delay startup driving circuit includes: resistance R3, capacitor C2, resistance R5 and NPN triode Q2；
The first end of the resistance R3 is connected with the input interface Vin+, and the second end of the resistance R3 passes through the capacitor C2 and institute
It states input interface Vin- to be connected, the base stage phase that the second end of the resistance R3 passes through the resistance R5 and the NPN triode Q2
Even, the emitter of the NPN triode Q2 is connected with the input interface Vin-.
The soft-start circuit includes: capacitor C3, resistance R6, resistance R7 and P-MOS pipe MQ1；The of the capacitor C3
One end is connected with the input interface Vin+, and the second end of the capacitor C3 passes through the resistance R7 and the NPN triode Q2
Collector be connected, the resistance R6 is in parallel with the capacitor C3, the of the grid of the P-MOS pipe MQ1 and the capacitor C3
Two ends are connected, and the source electrode of the P-MOS pipe MQ1 is connected with the input interface Vin+, the drain electrode of the P-MOS pipe MQ1 and institute
Output interface Vout+ is stated to be connected；The input interface Vin- and output interface Vout- is grounded.
When NPN triode Q1 cut-off, the bleed-off circuit of capacitor C2 is disconnected, and input power fills capacitor C2 by resistance R3
Electricity, when the voltage of NPN triode Q2 base stage and emitter-base bandgap grading is greater than on state threshold voltage, NPN triode Q2 saturation conduction is to drive
Dynamic P-MOS pipe MQ1 is opened, to realize the coarse adjustment of delay.
After NPN triode Q2 saturation conduction, power supply charges to capacitor C3, when reaching resistance R6 and resistance R7 bleeder circuit
The voltage at the both ends resistance R6 of generation, P-MOS pipe MQ1 are fully opened, and input power is exported by P-MOS pipe MQ1, to realize
The fine tuning of delay.It follows that coarse delay acts only on delay startup driving circuit, when not influencing the unlatching of P-MOS pipe MQ1
Between.It after input power passes through delay switch circuit, charges to capacitor C3, and load is supplied from output interface Vout+/Vout-
Electricity output.
Further, in order to avoid the accumulation of RC charging network remaining capacity after power down, so that electric power starting obtains next time
Less than effective delay, the application devises leadage circuit, starts to work in plant-grid connection moment, is capacitor storage in RC network
Remaining capacity offer release path, automatic to disconnect path of releasing after certain time-delay, RC network restarts to charge.
The leadage circuit includes: capacitor C1, resistance R1, NPN triode and resistance R4；
The first end of the capacitor C1 is connected with the input interface Vin+, and the second end of the capacitor C1 passes through the electricity
Resistance R2 is connected with the input interface Vin-, and the second end of the capacitor C1 passes through the resistance R2 and the NPN triode
Base stage is connected, and the collector of the NPN triode is connected by resistance R4 with the second end of the resistance R3, tri- pole NPN
The emitter of pipe is grounded.
When plant-grid connection, since the voltage at capacitor both ends cannot be mutated, the current potential of test point TP1 is consistent with Vin+, leads to
Resistance R2 is crossed, so that NPN triode Q1 saturation conduction, capacitor C2 is discharged by resistance R4 by NPN triode Q1 over the ground.Together
When, input power charges to capacitor C1, and test point TP1 current potential gradually decreases, until NPN triode Q1 can not be driven, make its into
Enter off state, cuts off bleed-off circuit.So far, it powers on leadage circuit to stop working, the delay switch circuit of next stage starts work
Make, therefore, capacitor C1 charging time, in addition to be capacitor C1 release other than the time and delay switch circuit enters work
Delay.
Further, the switching circuit further include: capacitor C4；The first end of the capacitor C4 and the output interface
Vout+ is connected, and the second end of the capacitor C4 is connected with the output interface Vout-, further increases except delay, can also drop
Low out-put supply ripple.
It below will be by being illustrated for specific usage scenario.
12V plant-grid connection is contained to the equipment of this delay switch circuit；
Since capacitor C1 both end voltage cannot be mutated, the current potential of test point TP1 is consistent with input power Vin+ current potential, passes through
Current-limiting resistance R2 loads on NPN triode Q1 base stage, and NPN triode Q1 saturation conduction opens bleed-off circuit, at this time the electricity of TP2
Position is not enough to open NPN triode Q2, and capacitor C2 releases remaining capacity over the ground by resistance R4 and NPN triode Q1.Capacitor C1
The current potential of the power source charges gradually accessed, test point TP1 gradually decreases, by the t that is delayed1, until NPN triode can not be driven
Q1 disconnects bleed-off circuit so that NPN triode Q1 enters off state.The t calculation formula that is delayed is as follows:
C is charging capacitor；R is charging resistor；V1For the charged accessible final voltage of charging capacitor；V0For charging electricity
Hold the initial voltage at both ends；VtThe voltage at charging capacitor both ends when reaching t to be delayed, according to formula, the capacitor fully charged required time
For infinity, and when t=3RC, Vt=0.95V1, when t=4.6RC, Vt=0.99V1, it is clear that it has been approached and is full of, so V heret
Take 0.95V1So as to accamalating quantity.
For example, the value of selection: capacitor C1 is set as 1uF；Resistance R1 is set as 1M Ω.It is computed, be delayed t1For 3s.It is aobvious and easy
See, by selecting the resistance R1 or capacitor C1 of different Configuration Values that different delays may be implemented, on the one hand this delay is to let out
It puts path to be kept for the duration established, is on the one hand also that delay switch circuit enters the delay before working condition.Above-mentioned is reason
The theoretical calculation thought, in fact the charging resistor of capacitor C1 be resistance R1 and resistance R2 and NPN triode Q1 Base-emitter this
The equivalent resistance of branch impedance parallel connection, so the resistance value of resistance R2 is to adjusting delay t1Also there is certain effect.
After NPN triode Q1 cut-off, the path disconnection of releasing of capacitor C2, then delay startup driving circuit enters work shape
State, input power charges to capacitor C2 by resistance R3, until the current potential of test point TP2 reaches (Vin-VCEth)×R5/(R3+
R5)+VCEth, NPN triode Q2 saturation conduction further drives the P-MOS pipe MQ1 of soft-start circuit to open, therefore this prolongs
When have no effect on rise time of soft-start circuit electric power starting.Such as capacitor C2 is set as 1uF, resistance R3 is set as 1M Ω, then
The charging delay t of capacitor C22=3s.Similarly, the charging resistor of capacitor C2 is resistance R3 and resistance R5 and NPN triode Q2 base
The equivalent resistance of pole-emitter-base bandgap grading this branch impedance parallel connection, therefore, by the resistance value or capacitor C2 that configure resistance R3 or resistance R5
Capacitance, coarse delay may be implemented.
After NPN triode Q2 saturation conduction, input power charges to capacitor C3, such as capacitor C3 is set as 100nF, resistance
R6 is set as 100k Ω, and resistance R7 is set as 10k Ω, then, by t3Capacitor C2 both end voltage is delayed when=2.7ms reaches 10.9V,
P-MOS pipe MQ1 is fully on.By adjusting the value of capacitor C3, resistance R6 and resistance R7, fine delay may be implemented.
After P-MOS pipe MQ1 is fully on, input power by P-MOS pipe MQ1 to output interface Vout+/Vout-, can
It selects capacitor C4 other than further increasing delay, is also used for reducing power supply ripple, keeps out-put supply more stable.
To sum up, the overall latency of this delay switch circuit is t1+t2+t3。
Embodiment two
Referring to fig. 2, P-MOS pipe is changed on the basis of example 1 and is managed at N-MOS, the variation of cast is so that delay startup
Driving circuit and soft-start circuit some permitted to change；The whole principle of laying of functional circuit has no difference, herein and repeats no more.
Certainly, the principle based on permutation and combination is also not precluded in the application, changes for NPN triode into PNP triode,
Realize different circuit physical structures；But it is not out the foregoing circuit principle of work and power.
One or more technical solutions provided in the embodiments of the present application have at least the following technical effects or advantages:
The delay switch circuit of the reactance voltage fluctuation provided in the embodiment of the present application, the design based on soft-start circuit are drawn
Enter delay startup driving circuit, and specific setting RC charging network in the driving circuit, is realized by adjusting resistance and capacitor to electricity
The a wide range of tuning of time delay is opened in source, and support is as short as several milliseconds, even longer delay in long to several seconds；So that electric power starting rises
It is unrelated with the long delay of addition along time-to-climb, it powers on rapidly.
And further, in order to avoid the accumulation of RC charging network remaining capacity after power down, so that electric power starting obtains next time
Less than effective delay, leadage circuit is set, is started to work in plant-grid connection moment, is the remnants electricity of capacitor storage in RC network
Amount provides path of releasing, and automatic to disconnect path of releasing after certain time-delay, RC network restarts to charge, and is electric power starting
Delay is provided.
It is worth noting that being delayed about electric power starting, mainly there are following two methods in industry at present: one, adjust electricity
Capacitance resistance ware between source soft-start circuit metal-oxide-semiconductor grid and source electrode slows down the speed for opening metal-oxide-semiconductor；Two, using delay core
Piece adjusts electric power starting time delay as needed.Delay startup time delay tunable range is limited, only Millisecond, it is difficult to meet complicated
Changeable existing net problem, if delay is longer, metal-oxide-semiconductor is in half on state, and conducting resistance is big, and the power consumption of generation burns out MOS
The risk of pipe.The introducing of delay chip, equipment power dissipation increase, or need programming and burning program support can use, realize
Mode is cumbersome, the length that is delayed or narrow for fixation or tunable range.Increase other than both the above mode, or in power output end
Capacitor is increased, but this will cause plant-grid connection immediate current excessive, triggers overcurrent protection, can not normally feed, even without this
Kind phenomenon, this mode is but also the rising edge of electric power starting becomes slowly, and the increase of bulky capacitor is so that electric after power down
The electricity for storing storage is released more slowly, and electrifying timing sequence next time is influenced.
For this, the application realizes optimization by pure circuit design.Specifically:
Support powers on capacitor residual voltage drainage function, effectively eliminates remaining capacity in delay circuit and accumulates, so that electric each time
The duration of source open time delay is relatively stable, and be switched on bad phenomenon caused by effective anti-alternating current short time voltage fluctuation；Postpone power supply
Open function, effectively solving the problems, such as electrifying timing sequence caused by mains fluctuation extremely causes equipment normally-open；Prolong
When tunable range it is wide, support several milliseconds to several seconds even longer delay adjustments；It supports coarse delay and fine tuning, adjusts spirit
It is living, various existing net demands can be coped with；Electric power starting rising edge monotone increasing, is not influenced by coarse adjustment time delay, adapts to metal-oxide-semiconductor application
Demand；The impact of plant-grid connection immediate current is effectively reduced in fine delay function, prevents overcurrent protection problem；Pure hardware circuit, nothing
Need code programming and burning.
It should be noted last that the above specific embodiment is only to illustrate the technical solution of the utility model rather than limits
System, although the utility model is described in detail referring to example, those skilled in the art should understand that, it can be right
The technical solution of the utility model is modified or replaced equivalently, without departing from the spirit and model of technical solutions of the utility model
It encloses, should all cover in the scope of the claims of the utility model.
Claims (6)
1. a kind of delay switch circuit of reactance voltage fluctuation characterized by comprising input interface Vin+, input interface Vin-,
Output interface Vout+, output interface Vout-, delay startup driving circuit and soft-start circuit；
The delay startup driving circuit includes: resistance R3, capacitor C2, resistance R5 and NPN triode Q2；
The first end of the resistance R3 is connected with the input interface Vin+, and the second end of the resistance R3 passes through the capacitor C2
It is connected with the input interface Vin-, the base that the second end of the resistance R3 passes through the resistance R5 and the NPN triode Q2
Extremely it is connected, the emitter of the NPN triode Q2 is connected with the input interface Vin-；
The soft-start circuit includes: capacitor C3, resistance R6, resistance R7 and P-MOS pipe MQ1；
The first end of the capacitor C3 is connected with the input interface Vin+, and the second end of the capacitor C3 passes through the resistance R7
It is connected with the collector of the NPN triode Q2, the resistance R6 is in parallel with the capacitor C3, the grid of the P-MOS pipe MQ1
It is connected with the second end of the capacitor C3, the source electrode of the P-MOS pipe MQ1 is connected with the input interface Vin+, the P-MOS
The drain electrode of pipe MQ1 is connected with the output interface Vout+；
The input interface Vin- and output interface Vout- is grounded.
2. the delay switch circuit of reactance voltage fluctuation as described in claim 1, which is characterized in that the switching circuit also wraps
It includes: leadage circuit；
The leadage circuit includes: capacitor C1, resistance R1, NPN triode and resistance R4；
The first end of the capacitor C1 is connected with the input interface Vin+, and the second end of the capacitor C1 passes through the resistance R2
It is connected with the input interface Vin-, the base stage that the second end of the capacitor C1 passes through the resistance R2 and the NPN triode
It is connected, the collector of the NPN triode is connected by resistance R4 with the second end of the resistance R3, the NPN triode
Emitter ground connection.
3. the delay switch circuit of reactance voltage fluctuation as described in claim 1, which is characterized in that the switching circuit also wraps
It includes: capacitor C4；
The first end of the capacitor C4 is connected with the output interface Vout+, and the second end of the capacitor C4 connects with the output
Mouth Vout- is connected.
4. a kind of delay switch circuit of reactance voltage fluctuation characterized by comprising input interface Vin+, input interface Vin-,
Output interface Vout+, output interface Vout-, delay startup driving circuit and soft-start circuit；
The delay startup driving circuit includes: resistance R33, capacitor C22, resistance R55, resistance R77 and NPN triode Q22；
The first end of the resistance R33 is connected with the input interface Vin+, and the second end of the resistance R33 passes through the capacitor
C22 is connected with the input interface Vin-, and the second end of the resistance R33 passes through the resistance R55 and the NPN triode Q2
Base stage be connected, the collector of the NPN triode Q2 is connected by the resistance R77 with the input interface Vin+；
The soft-start circuit includes: capacitor C33, resistance R66 and N-MOS pipe MQ11；
The first end of the capacitor C33 is connected with the input interface Vin-, the second end of the capacitor C33 and the NPN tri-
The radio of pole pipe Q2 is extremely connected, and the resistance R66 is in parallel with the capacitor C3, the grid and the electricity of the N-MOS pipe MQ11
The second end for holding C3 is connected, and the source electrode of the N-MOS pipe MQ11 is connected with the input interface Vin-, the N-MOS pipe MQ11
Drain electrode be connected with the output interface Vout-；
The input interface Vin- and output interface Vout- is grounded, the input interface Vin+ and the output interface
Vout+ is connected.
5. the delay switch circuit of reactance voltage fluctuation as claimed in claim 4, which is characterized in that the switching circuit also wraps
It includes: leadage circuit；
The leadage circuit includes: capacitor C11, resistance R11, NPN triode and resistance R44；
The first end of the capacitor C11 is connected with the input interface Vin+, and the second end of the capacitor C11 passes through the resistance
R22 is connected with the input interface Vin-, and the second end of the capacitor C11 passes through the resistance R22 and the NPN triode
Base stage is connected, and the collector of the NPN triode is connected by resistance R44 with the second end of the resistance R33, the NPN tri-
The emitter of pole pipe is grounded.
6. the delay switch circuit of reactance voltage fluctuation as claimed in claim 4, which is characterized in that the switching circuit also wraps
It includes: capacitor C44；
The first end of the capacitor C44 is connected with the output interface Vout+, and the second end of the capacitor C4 connects with the output
Mouth Vout- is connected.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822035281.0U CN209030179U (en) | 2018-12-05 | 2018-12-05 | A kind of delay switch circuit of reactance voltage fluctuation |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201822035281.0U CN209030179U (en) | 2018-12-05 | 2018-12-05 | A kind of delay switch circuit of reactance voltage fluctuation |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109245749A (en) * | 2018-12-05 | 2019-01-18 | 博为科技有限公司 | A kind of delay switch circuit of reactance voltage fluctuation |
| CN110635676A (en) * | 2019-11-05 | 2019-12-31 | 中国船舶重工集团公司第七0五研究所 | Bootstrap type pre-charging slow-starting charging circuit |
| CN112984749A (en) * | 2021-03-15 | 2021-06-18 | 广东美芝制冷设备有限公司 | Control method and device for delay starting circuit in air conditioning system |
-
2018
- 2018-12-05 CN CN201822035281.0U patent/CN209030179U/en active Active
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109245749A (en) * | 2018-12-05 | 2019-01-18 | 博为科技有限公司 | A kind of delay switch circuit of reactance voltage fluctuation |
| CN109245749B (en) * | 2018-12-05 | 2024-01-30 | 博为科技有限公司 | Voltage fluctuation resistant delay switch circuit |
| CN110635676A (en) * | 2019-11-05 | 2019-12-31 | 中国船舶重工集团公司第七0五研究所 | Bootstrap type pre-charging slow-starting charging circuit |
| CN112984749A (en) * | 2021-03-15 | 2021-06-18 | 广东美芝制冷设备有限公司 | Control method and device for delay starting circuit in air conditioning system |
| CN112984749B (en) * | 2021-03-15 | 2022-05-31 | 广东美芝制冷设备有限公司 | Control method and device for delay starting circuit in air conditioning system |
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