CN201892936U

CN201892936U - Video conversion device

Info

Publication number: CN201892936U
Application number: CN2010206435945U
Authority: CN
Inventors: 范秀峰; 黄韬; 雒勇; 马建萍; 王明晓
Original assignee: AVIC No 631 Research Institute
Current assignee: AVIC No 631 Research Institute
Priority date: 2010-12-06
Filing date: 2010-12-06
Publication date: 2011-07-06
Anticipated expiration: 2020-12-06

Abstract

The utility model provides a video conversion device, which is mainly used for frame frequency conversion and comprises a low voltage differential signaling (LVDS) converter, a first in first out (FIFO) memory, a digital-to-analog converter, a programmer and a reset circuit, wherein the data input end of the LVDS converter is connected with the signal output end of an embedded central processing unit (CPU), the signal output end of the LVDS converter is sequentially and serially connected to the signal input end of a terminal display through the FIFO memory and the digital-to-analog converter, the synchronizing signal output end and the clock signal output end of the LVDS converter, the enable signal output end of the FIFO memory, the analog signal output end of the digital-to-analog converter and the output end of the reset circuit are respectively connected with the corresponding ports of the programmer, and the blanking signal output end of the programmer is connected to the digital-to-analog converter. The video conversion device has the beneficial effects that LVDS digital signals with 60Hz screen refresh rate can be well converted into 50Hz video graphics array (VGA) signals and requirements on image quality and real-time performance can be satisfied.

Description

A kind of video change-over device

Technical field

The utility model relates to a kind of video change-over device, is specifically related to the frame-rate conversion technology to graphoscope LVDS digital signal.

Background technology

Be accompanied by the continuous development of science and technology, the arrival in digital information epoch, simulating signal before our employed display has also replaced with digital signal, Digital Television has become the important display mode of television system, requirement according to various model tasks, aspect the terminal demonstration, LVDS digital video output interface is also popularized gradually.The advantage of LVDS is that power consumption is little, reliable in quality, and transmission speed is fast.

The frame rate of LVDS signal output is 60Hz, but what the set of equipments that has was still installed is the display of traditional 50Hz, like this, we just need be converted into screen refresh rate 60Hz the signal of 50Hz, when stably realizing frame-rate conversion, sometimes also need to satisfy higher real-time requirement, to strengthen this important step of visual video equipment.

At present, Shang Weijian is in order to realize the LVDS digital signal of screen refresh rate 60Hz is converted into the device of the VGA signal of 50Hz.

The utility model content

The utility model aims to provide a kind of video change-over device, in order to realize the LVDS digital signal of screen refresh rate 60Hz is converted into the VGA signal of 50Hz.

Basic thought of the present utility model is: the method for video conversion is the video signal sampling of output and stores storage into wherein that frame rate as required adopts out output again.Its technical scheme is:

This video change-over device comprises video change-over device, comprise LVDS converter, FIFO storer, digital to analog converter, device able to programme and reset circuit, the data input pin of LVDS converter is connected with the embedded type CPU signal output part, and the signal output part of LVDS converter is connected serially to the terminal display signal input part successively through FIFO storer, digital to analog converter; The output terminal of the enable signal output terminal of the synchronous signal output end of LVDS converter and clock signal output terminal, FIFO storer, the analog signal output of digital to analog converter, reset circuit is connected with device able to programme corresponding port respectively, and the blanking signal output terminal of device able to programme is connected to digital to analog converter.

Above-mentioned digital to analog converter is to be connected with terminal display through filtering circuit, and so effectively filtering interfering improves picture quality.

Above-mentioned FIFO storer has three, and the memory capacity of each is 18 * 64k, and three FIFO memory serials connect, to guarantee its data storage surplus.

Above-mentioned device able to programme is selected Lattice ispLS1032.

The utlity model has following advantage:

1, can realize preferably that the LVDS digital signal with screen refresh rate 60Hz is converted into the VGA signal of 50Hz, satisfies picture quality and real-time requirement.

2, use the utility model and method of operating, more simple and easy than existing general frame-rate conversion method, cost is lower, conversion effect good, programmed algorithm is easily realized.

3, display frequency is unrestricted, and degree of freedom is big, and range of application is wider.

Description of drawings

Fig. 1 is a principle sketch of the present utility model;

Fig. 2 is a structural drawing of the present utility model;

Fig. 3 is that application the utility model carries out the video conversion waveform in the transfer process.

Wherein, (a) be the target video waveform of 50Hz; (b) can embody the relation of 60VS and 50VS in the transfer process; (c) be figure after PRS and VRS amplify among (b) figure.

HS representative row synchronously; VS represents field synchronization; WFLAG represents 50Hz and the synchronous sign of 60Hz frame head; PRS and VRS are in the further shortening reset time that produces the frame head synchronous mark, are equivalent to produce a burst length.

Embodiment

The video change-over device that the utility model proposes, comprise LVDS converter, FIFO storer, digital to analog converter, device able to programme and reset circuit, the data input pin of LVDS converter is connected with the embedded type CPU signal output part, and the signal output part of LVDS converter is connected serially to the terminal display signal input part successively through FIFO storer, digital to analog converter, filtering circuit; The output terminal of the enable signal output terminal of the synchronous signal output end of LVDS converter and clock signal output terminal, FIFO storer, the analog signal output of digital to analog converter, reset circuit is connected with device able to programme corresponding port respectively, and the blanking signal output terminal of device able to programme is connected to digital to analog converter.

Referring to shown in Figure 2,8 differential signals of LVDS input end are that CPU directly provides, differential signal converts (red 6 of 18 position digital signals to through LVDS, green 6, blue 6), then digital signal is stored among the FIFO, use 3 FIFO in this modular design, the memory capacity of each FIFO is 18 * 64k, and 3 FIFO are connected in series; Be filled with frame data and just read by the frequency with 50Hz from storer, and convert the VGA simulated data to through digital to analog converter, this simulating signal directly links to each other with the display of 50Hz refresh rate, at this moment, will show the picture of our needs on the display.

Fig. 3 has provided the video waveform of video conversion steering logic.The key of 60Hz and 50Hz conversion is synchronizing signal, accomplish row, field synchronization, and we need produce a frame head marking signal VRS, and this signal is short more good more.Is standard at each with the 60Hz frame head, produce marking signal with 50Hz with the back through algorithm 60Hz, with WFLG (be LVDS output DE signal) with, obtain PRS, low digit wave form at PRS begins to count 5 RCLK, promptly produce the frame head marking signal of 50Hz and 60Hz, PRS after Fig. 3 (c) expression is amplified and the waveform of VRS are so that compare with clock signal frequency.

Adopt the utility model to carry out the video conversion operation and can realize preferably that the LVDS digital signal with screen refresh rate 60Hz is converted into the VGA signal of 50Hz, satisfies picture quality and real-time requirement.

Claims

1. video change-over device, comprise LVDS converter, FIFO storer, digital to analog converter, device able to programme and reset circuit, the data input pin of LVDS converter is connected with the embedded type CPU signal output part, and the signal output part of LVDS converter is connected serially to the terminal display signal input part successively through FIFO storer, digital to analog converter; The output terminal of the enable signal output terminal of the synchronous signal output end of LVDS converter and clock signal output terminal, FIFO storer, the analog signal output of digital to analog converter, reset circuit is connected with device able to programme corresponding port respectively, and the blanking signal output terminal of device able to programme is connected to digital to analog converter.

2. video change-over device according to claim 1 is characterized in that: described digital to analog converter is to be connected with terminal display through filtering circuit.

3. video change-over device according to claim 2 is characterized in that: described FIFO storer has three, and the memory capacity of each is 18 * 64k, and three FIFO memory serials connect.

4. video change-over device according to claim 2 is characterized in that: described device able to programme is selected Lattice ispLS1032.