CN118678695A - Semiconductor memory device and method of forming the same - Google Patents
Semiconductor memory device and method of forming the same Download PDFInfo
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- CN118678695A CN118678695A CN202411170463.2A CN202411170463A CN118678695A CN 118678695 A CN118678695 A CN 118678695A CN 202411170463 A CN202411170463 A CN 202411170463A CN 118678695 A CN118678695 A CN 118678695A
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- 230000005641 tunneling Effects 0.000 claims description 21
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- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- 150000002500 ions Chemical class 0.000 description 9
- 229910001385 heavy metal Inorganic materials 0.000 description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 4
- 230000000295 complement effect Effects 0.000 description 4
- 230000000694 effects Effects 0.000 description 4
- 239000001307 helium Substances 0.000 description 4
- 229910052734 helium Inorganic materials 0.000 description 4
- SWQJXJOGLNCZEY-UHFFFAOYSA-N helium atom Chemical compound [He] SWQJXJOGLNCZEY-UHFFFAOYSA-N 0.000 description 4
- 229910044991 metal oxide Inorganic materials 0.000 description 4
- 150000004706 metal oxides Chemical class 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 230000003647 oxidation Effects 0.000 description 4
- 238000007254 oxidation reaction Methods 0.000 description 4
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- 238000010276 construction Methods 0.000 description 3
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- 239000000376 reactant Substances 0.000 description 3
- 238000012876 topography Methods 0.000 description 3
- 229910019236 CoFeB Inorganic materials 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 230000005290 antiferromagnetic effect Effects 0.000 description 2
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- 238000010884 ion-beam technique Methods 0.000 description 2
- 229910052743 krypton Inorganic materials 0.000 description 2
- DNNSSWSSYDEUBZ-UHFFFAOYSA-N krypton atom Chemical compound [Kr] DNNSSWSSYDEUBZ-UHFFFAOYSA-N 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 229910015136 FeMn Inorganic materials 0.000 description 1
- FYYHWMGAXLPEAU-UHFFFAOYSA-N Magnesium Chemical compound [Mg] FYYHWMGAXLPEAU-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
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Abstract
The application provides a semiconductor memory device and a forming method thereof, relates to the technical field of semiconductors, and is used for improving the conversion efficiency of the semiconductor memory device and reducing short circuits. The forming method comprises the following steps: forming a plurality of magnetic tunnel junctions on the bottom electrode layer, the sidewalls of the magnetic tunnel junctions having residues, the residues contacting the bottom electrode layer; forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer; the residue and the first residue cap layer are etched away, exposing the bottom electrode layer in contact with the sidewalls of the magnetic tunnel junction. The residues and the first residue covering layer can be removed synchronously, so that the residues are completely removed, the coercive force of the device is improved, the shunt of the bottom electrode layer is reduced, and the conversion efficiency is improved.
Description
Technical Field
The present disclosure relates to semiconductor technology, and more particularly, to a semiconductor memory device and a method for forming the same.
Background
With the continuous development of semiconductor technology, the late-molar age comes, and more novel semiconductor memory devices are generated. The nonvolatile magnetic random access memory (Magnetic Radom Access Memory, abbreviated as MRAM) has the characteristics of low power consumption, high reading and writing speed and the like. Spin-orbit torque magnetic memory (Spin Orbit Torque-Magnetic Random Access Memory, SOT-MRAM for short) is widely used because of its higher endurance.
The SOT-MRAM includes a magnetic tunnel junction (Magnetic Tunnel Junction, abbreviated as MTJ) for storing data and a heavy metal layer for providing spin-orbit torque (Spin Orbit Torque, abbreviated as SOT) for writing data. The MTJ core structure includes a free layer, a tunneling layer, and a fixed layer, the magnetic moment direction of the free layer can be changed, and the magnetic moment of the reference layer cannot be changed. When the magnetic moment directions of the free layer and the reference layer are parallel, the MTJ presents a low resistance state; when the magnetic moment directions of the free layer and the reference layer are antiparallel, the MTJ exhibits a high resistance state. Thus, the high and low resistance states of the MTJ can be used to store data "1" and "0" respectively. The heavy metal layer can generate a spin orbit coupling effect when writing current is introduced, so that spin torque is generated to drive the free layer to generate directional overturning, and the writing current does not flow through the tunneling layer, which is also one of the reasons for high durability of SOT-MRAM.
However, when the semiconductor memory device is formed, residues often exist in the process of etching to form the magnetic tunnel junction, and in order to ensure that the etching damage of the heavy metal layer is minimum, over etching cannot be performed, so that the residues are difficult to remove. The residue affects the overall device coercivity (Hc) and shunts the heavy metal layer, reducing conversion efficiency and affecting the efficiency of the semiconductor memory device.
Disclosure of Invention
In view of the above, embodiments of the present application provide a semiconductor memory device and a method of forming the same for improving conversion efficiency, thereby improving efficiency of the semiconductor memory device.
According to some embodiments, the present application provides a method of forming a semiconductor memory device, comprising:
Forming a plurality of magnetic tunnel junctions on the bottom electrode layer, the sidewalls of the magnetic tunnel junctions having residues that contact the bottom electrode layer;
Forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
And etching to remove the residues and the first residue covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction.
In some possible embodiments, the residue cap layer is formed via non-vertical deposition.
In some possible embodiments, after etching to remove the residue and the first residue cover layer, further includes:
repeatedly forming a third residue covering layer which covers at least the residues remaining, the first residue covering layer remaining and the second residue covering layer remaining;
etching to remove the residue and the first residue covering layer at least once to completely remove the residue.
In some possible embodiments, when the residue and the first residue cover layer are etched away, an etching angle of the etching is greater than or equal to 60 ° and less than or equal to 120 °.
In some possible embodiments, the sidewalls of the magnetic tunnel junction have redeposits;
Removing the residue and the first residue capping layer, exposing the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction, further comprising:
Forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposits, the second redeposited cover layer covering the remainder of the residue cover layer and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer;
Etching to remove the first redeposited covering layer and the redeposited material, and exposing the side wall of the magnetic tunnel junction.
In some possible embodiments, the redeposited cover layer is formed using a deposition, the deposition angle of the deposition being greater than 70 ° and less than 110 °.
In some possible embodiments, the first redeposited cover layer and the redeposited are removed by etching, the etching being a non-vertical etching.
In some possible embodiments, the magnetic tunnel junction comprises a free layer, a tunneling layer, and a reference layer disposed in a stacked order;
the second redeposit cover layer has a thickness that is greater than a thickness of the free layer and less than a total thickness of the free layer and the tunneling layer.
The method for forming the semiconductor memory device provided by the embodiment of the application has at least the following advantages:
In the method for forming the semiconductor memory device provided by the embodiment of the application, a plurality of magnetic tunnel junctions are formed on the bottom electrode layer, the side walls of the magnetic tunnel junctions are provided with residues, and a residue covering layer is formed. The residue cover layer comprises a first residue cover layer covering the residues and a second residue cover layer covering the bottom electrode layer between adjacent residues, wherein the upper surface of the first residue cover layer is not higher than the upper surface of the second residue cover layer, so that the residue cover layer between the magnetic tunnel junctions forms a flat or middle convex shape. And etching to remove the residues and the first residue covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction, so that the residues and the first residue covering layer can be removed synchronously, thereby ensuring complete removal of the residues, improving the coercive force of the device, reducing the shunt of the bottom electrode layer and improving the conversion efficiency.
According to some embodiments, the present application also provides a method of forming a semiconductor memory device, including:
Forming a plurality of magnetic tunnel junctions on the bottom electrode layer, sidewalls of the magnetic tunnel junctions having residues and redeposits, the residues contacting the bottom electrode layer;
Forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposits, the second redeposited cover layer covering the residues between adjacent magnetic tunnel junctions and the bottom electrode layer; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer;
Etching to remove the first redeposited covering layer and the redeposited material, and exposing the side wall of the magnetic tunnel junction;
Forming a residue cap layer comprising a first residue cap layer and a second residue cap layer, the first residue cap layer overlying the second redeposition cap layer on the residue, the second residue cap layer overlying the second redeposition cap layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
Etching to remove the residues, the first residue covering layer and part of the second redeposited covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction.
The method for forming the semiconductor memory device provided by the embodiment of the application has at least the following advantages:
In the method for forming the semiconductor memory device provided by the embodiment of the application, a plurality of magnetic tunnel junctions are formed on the bottom electrode layer, the side walls of the magnetic tunnel junctions are provided with residues and redeposits, and a redeposit covering layer is formed. The redeposited cover layer comprises a first redeposited cover layer covering the redeposited and a second redeposited cover layer covering the residue and the bottom electrode layer, wherein the thickness of the first redeposited cover layer is smaller than that of the second redeposited cover layer, so that the second redeposited cover layer of the side wall of the magnetic tunnel junction is thinner. And etching to remove the first redeposit covering layer and the redeposit, and opening the side wall of the magnetic tunnel junction, thereby ensuring complete removal of the redeposit, avoiding short circuit of the device and improving the efficiency of the device. And forming a residue covering layer, wherein the residue covering layer comprises a first residue covering layer covering the second redeposition covering layer on the residue and a second redeposition covering layer between adjacent residues, and the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer, so that the residue covering layer between the magnetic tunnel junctions forms a flat or middle convex shape. And etching to remove the residues and the first residue covering layer, and synchronously removing the residues and the first residue covering layer, so that the residues are completely removed, the coercive force of the device is improved, the shunt to the bottom electrode layer is reduced, and the conversion efficiency is improved.
According to some embodiments, the present application also provides a semiconductor memory device including a bottom electrode layer and a plurality of magnetic tunnel junctions on the bottom electrode layer;
sidewalls of the magnetic tunnel junction have residues that contact the bottom electrode layer;
the residues are removed by etching, comprising:
Forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
and etching to remove the residues and the first residue covering layer.
The semiconductor memory device provided by the embodiment of the application has at least the following advantages:
In the semiconductor memory device provided by the embodiment of the application, residues are removed in an etching mode, so that the residues are completely removed, the coercive force of the device is improved, the shunt to the bottom electrode is reduced, and the conversion efficiency is improved.
Drawings
Fig. 1 is a schematic diagram showing a method of forming a semiconductor memory device according to an embodiment of the present application;
FIG. 2 is a schematic diagram of an embodiment of the present application after forming a magnetic tunnel junction;
FIG. 3 is a schematic illustration of an embodiment of the application after forming a residue cap layer;
FIG. 4 is another schematic illustration of the present application after forming a residue cap layer;
FIG. 5 is a schematic illustration of an embodiment of the application after etching the residue cap layer;
FIG. 6 is another schematic illustration of the application after etching the residue cap layer;
FIG. 7 is a schematic illustration of an embodiment of the present application after formation of a redeposited cover layer;
FIG. 8 is a schematic illustration of an embodiment of the present application after etching the redeposited cover layer;
Fig. 9 is another schematic diagram of a method of forming a semiconductor memory device in an embodiment of the present application.
Reference numerals illustrate:
10-a bottom electrode layer; 20-magnetic tunnel junction;
21-a free layer; a 22-tunneling layer;
23-a reference layer; 24-a fixed layer;
30-residue; 40-redeposition;
50-a residue coating; 51-bump;
60-redeposition of the cover layer.
Detailed Description
In the semiconductor memory device (e.g., magnetic memory) of the related art, the material of the free layer is typically CoFeB, and the ratio of each molecule may be various, for example, 2:6:2. The tunneling layer is typically made of MgO with a typical molecular ratio of 1:1. The material of the reference layer is typically CoFeB, with various molecular ratios, e.g., 2:6:2. The materials of the magnetic tunnel junction are relatively complex, the thickness of each film layer is relatively thin, usually 0.1-10nm, and it is difficult to etch the magnetic tunnel junction in a more process-friendly manner such as chemical etching. In the grasping of the etching end point, the grasping is also difficult due to the thickness of the film.
At present, an Ion Beam Etching (IBE) bias physical removal mode is generally adopted to etch the magnetic tunnel junction so as to avoid the problem that a plurality of materials are not compatible in chemical Etching. However, the above removal method also has certain problems: to ensure etch uniformity and etch efficiency, IBE is typically etched at an angle, which leaves a free layer residue when etching to the heavy metal layer, forming a residue. In order to ensure that the etching damage of the heavy metal layer is the lowest, over etching is difficult to carry out, so that residues are difficult to remove. The residue and the material of the free layer are the same, the coercive force (Hc) of the whole device can be influenced, the magnetic overturning effect is achieved, and the diversion of the heavy metal layer can be generated, so that the conversion efficiency is reduced, and the efficiency of the device is influenced.
In addition, due to the limitations of IBE etching, particles generated during etching of the MTJ cannot have as high volatility as chemical etching, so that the particles are not removed in time and redeposit near the MTJ junction, forming redeposits. The redeposit causes the MTJ to be enlarged in size, with severe intermediate states, which can cause shorting of the entire device.
For the above problems, it is common to use alternating etching of a large angle and a small angle IBE, removing redeposition at a large angle, reducing residue at a small angle, and performing trench etching between MTJs to cut off the residue. However, these methods only can alleviate and not thoroughly solve the problems of residue and redeposition caused by IBE etching, but can cause etching damage to the bottom electrode layer at the bottom of the MTJ junction, thereby damaging the electrical performance of the semiconductor memory device.
To this end, an embodiment of the present application provides a method for forming a semiconductor memory device, in which a residue covering layer is formed, the residue covering layer includes a first residue covering layer covering the residues, and a second residue covering layer covering a bottom electrode layer between adjacent residues, an upper surface of the first residue covering layer is not higher than an upper surface of the second residue covering layer, so that the residue covering layer between magnetic tunnel junctions forms a flat or middle-convex shape.
The residues and the first residue covering layer are removed by etching, so that the residues and the first residue covering layer can be removed synchronously, the complete removal of the residues is ensured, the coercive force of the device is improved, the shunt to the bottom electrode is reduced, and the conversion efficiency is improved. The second residue covering layer is left, at least the left second residue covering layer can also protect the bottom electrode layer in the subsequent etching process, damage to the bottom electrode layer is reduced, and overturning efficiency is improved.
In order to make the above objects, features and advantages of the embodiments of the present application more comprehensible, the technical solutions of the embodiments of the present application will be described clearly and completely with reference to the accompanying drawings. It will be apparent that the described embodiments are only some, but not all, embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Referring to fig. 1, an embodiment of the present application provides a method for forming a semiconductor memory device, the method specifically including the steps of:
step S100: a plurality of magnetic tunnel junctions are formed on the bottom electrode layer, sidewalls of the magnetic tunnel junctions having residues, the residues contacting the bottom electrode layer.
The bottom electrode layer 10 may be formed on a substrate (not shown), and the bottom electrode layer 10 may be a heavy metal layer. The plurality of magnetic tunnel junctions 20 are etched and formed, specifically, a bottom electrode layer, an initial free layer, an initial tunneling layer, and an initial reference layer are sequentially deposited on the substrate, i.e., the substrate, the bottom electrode layer, the initial free layer, the initial tunneling layer, and the initial reference layer are sequentially stacked.
A portion of the initial free layer, a portion of the initial tunneling layer, and a portion of the initial reference layer are removed using a conventional etching method, such as ion beam etching, with the remaining initial free layer forming a plurality of spaced apart free layers 21, the remaining initial tunneling layer forming a plurality of spaced apart tunneling layers 22, and the remaining initial reference layer forming a plurality of spaced apart reference layers 23. Referring to fig. 2, each free layer 21 and the tunneling layer 22 and reference layer 23 thereon form a magnetic tunnel junction 20, and trenches are formed between adjacent magnetic tunnel junctions 20.
After forming the plurality of magnetic tunnel junctions 20 on the bottom electrode layer 10, the sidewalls of the magnetic tunnel junctions 20 have residues 30 due to limitations of etching methods, wherein the magnetic tunnel junctions 20 generally have residues 30 on both sides, and the residues 30 contact the bottom electrode layer 10. The residue 30 is a free layer residue, which is an integral structure with the free layer 21. The thickness of the residue 30 gradually decreases in a direction away from the side wall of the magnetic tunnel junction 20.
In some possible examples, an initial fixed layer may also be deposited on the initial reference layer and subsequently etched to remove portions. The remaining initial pinned layer forms a plurality of spaced apart pinned layers 24 and the magnetic tunnel junction 20 further includes a corresponding pinned layer 24. The pinned layer 24 is used to fix or limit the magnetic moment direction of the reference layer 23, and its material typically includes an Antiferromagnetic (AFM) material, such as FeMn, ptMn, irMn, niO.
Step S200: forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer.
Referring to fig. 2 and 3, a residue capping layer 50 is formed, the residue capping layer 50 capping at least the residue 30 and the bottom electrode layer 10 between adjacent magnetic tunnel junctions 20. It will be appreciated that trenches are formed between adjacent magnetic tunnel junctions 20, and that each side of adjacent magnetic tunnel junctions 20 that is adjacent to each other has residues 30, these residues 30 being adjacent residues 30, i.e. residues 30 that are located within the same trench are adjacent residues 30.
Wherein the residue cap layer 50 comprises a first residue cap layer and a second residue cap layer, each of the first residue cap layer and the second residue cap layer being located between adjacent magnetic tunnel junctions 20. The first residue cover layer covers the residues 30, and the second residue cover layer covers the bottom electrode layer 10 between adjacent residues 30.
The upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer, which means the surface facing away from the bottom electrode layer 10. The first residue coating layer can be complementary to the residue, and the effect of synchronously removing the residue and the residue coating layer is achieved in the subsequent removing process. Thus, as shown in FIG. 4, the second residue cover layer protrudes from the first residue cover layer such that the residue cover layer 50 between the magnetic tunnel junctions 20 forms a protrusion 51; or as shown in fig. 3, the second residue cap layer is flush with the first residue cap layer so that the residue cap layer 50 between the magnetic tunnel junctions 20 is relatively planar.
In some possible examples, the material of the residue cover layer 50 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, metal oxide, and metal nitride. The residue cover layer 50 is formed by non-vertical deposition, and specifically, the residue cover layer 50 may be formed directly by non-vertical deposition, or may be formed indirectly by non-vertical deposition, that is, the residue cover layer 50 is formed by non-vertical deposition and oxidation/nitridation.
Illustratively, the chemical deposition forms a residue cap layer 50. Also exemplary, the material of the residue cover layer 50 is physically deposited, directly forming the residue cover layer 50. Further exemplary, a metal layer such as aluminum, magnesium, etc. is physically deposited, and the metal layer is subjected to an oxidation treatment or a nitridation treatment to form a residue covering layer 50, and in this case, the material of the residue covering layer 50 is a metal oxide or a metal nitride.
By non-perpendicular deposition is meant that the deposition direction of the material particles used to form the residue cap layer 50 is not perpendicular relative to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, i.e., the deposition does not have good directionality. The material particles include reactant ions of the residue coating 50, target ions of the residue coating 50, or target ions of a corresponding metal layer of the residue coating 50, etc. The deposition angle for non-vertical deposition is greater than 120 °, or less than 60 °, i.e. the deposition angle cannot be 90 °. The deposition angle refers to the angle between the deposition direction of the material particles and the plane of the substrate.
The deposition direction of the material particles does not coincide with the stacking direction of the magnetic tunnel junction 20, forming an angle. In this way, the material particles are shielded (shadow effect) by the high density magnetic tunnel junction 20, the thickness of the residue cap layer 50 is different at each location, the first residue cap layer is thinner and the second residue cap layer is thicker. The residue cap layer 50 between the magnetic tunnel junctions 20 may be complementary to the residue 30 such that the residue cap layer 50 between the magnetic tunnel junctions 20 is planar or has a bump 51 formed in between.
It will be appreciated that during deposition the material particles also cover the top of the magnetic tunnel junction 20 simultaneously, the thickness of the residue cover layer 50 on top of the magnetic tunnel junction 20 being greater than the thickness of the first residue cover layer, e.g. the thickness of the residue cover layer 50 on top of the magnetic tunnel junction 20 is the same as the thickness of the second residue cover layer. The material particles may also cover the sidewalls of the magnetic tunnel junction 20 simultaneously, the thickness of the residue cover layer 50 of the sidewalls of the magnetic tunnel junction 20 being smaller than the thickness of the second residue cover layer. In other examples, the sidewalls of the magnetic tunnel junction 20 are free of the residue cap layer 50.
Step S300: the residue and the first residue cap layer are etched away, exposing the bottom electrode layer in contact with the sidewalls of the magnetic tunnel junction.
Referring to fig. 5 and 6, when the residues 30 and the first residue cover layer are etched away, the etching angle of the etching is greater than or equal to 60 ° and less than or equal to 120 °, preferably 90 °. The etching angle refers to the angle between the etching direction (as indicated by the arrows in fig. 5 and 6) and the plane of the substrate. The plane of the substrate is horizontal in fig. 5 and 6. The etching comprises a high bias IBE etch, and the etching gas comprises at least one of helium, argon, and krypton, preferably helium, which is of small molecular weight.
In this way, the alignment of the removed residues 30 and the first residue cap layer may be improved, the etch profile may be transferred step by step, and the bottom electrode layer 10 in contact with the magnetic tunnel junction 20 may be exposed until the etching is completed after the residues 30 are completely removed.
It will be appreciated that where the residue cap layer 50 is also present on top of and on the sidewalls of the magnetic tunnel junction 20, the etch rates of the residue cap layer 50 on top of the magnetic tunnel junction 20, the first residue cap layer, and the second residue cap layer are substantially equal and greater than the etch rates of the residue cap layer 50 in other regions (e.g., the residue cap layer 50 on the sidewalls of the magnetic tunnel junction 20).
The etching removes the residue 30 and the first residue coating layer, and simultaneously etches the second residue coating layer. As shown in fig. 5, when the upper surfaces of the first and second residue cover layers are level, the second residue cover layer is also simultaneously etched away, and the bottom electrode layer 10 between the magnetic tunnel junctions 20 is exposed. As shown in fig. 6, when the upper surface of the first residue cover layer is lower than the upper surface of the second residue cover layer, a portion of the second residue cover layer remains, and the remaining second residue cover layer covers a portion of the bottom electrode layer 10 between the magnetic tunnel junctions 20 to protect the bottom electrode layer 10 from damage.
The etching removes the residue 30 and the first residue cap layer, and also etches to the top and sidewalls of the magnetic tunnel junction 20 simultaneously, there is a residue cap layer 50. After etching to remove the residue 30 and the first residue cap layer, the residue cap layer 50 on the top and sidewalls of the magnetic tunnel junction 20 may be completely removed or may be partially left. For example, the residue cap layer 50 of the top and sidewalls of the magnetic tunnel junction 20 remains with a portion of the residue cap layer 50.
In summary, in the method for forming a semiconductor memory device according to the embodiment of the application, a plurality of magnetic tunnel junctions 20 are formed on a bottom electrode layer 10, sidewalls of the magnetic tunnel junctions 20 have residues 30, and a residue covering layer 50 is formed, the residue covering layer 50 including a first residue covering layer covering the residues 30 and a second residue covering layer covering the bottom electrode layer 10 between adjacent residues 30. The upper surface of the first residue cap layer is not higher than the upper surface of the second residue cap layer such that the residue cap layer 50 between the magnetic tunnel junctions 20 forms a planar or intermediate raised topography. The residues 30 and the first residue covering layer are removed by etching, and the bottom electrode layer 10 contacted with the side wall of the magnetic tunnel junction 20 is exposed, so that the residues 30 and the first residue covering layer can be removed synchronously, the complete removal of the residues 30 is ensured, the coercive force of the device is improved, the shunt of the bottom electrode layer 10 is reduced, and the conversion efficiency is improved. At least the second residue covering layer can also protect the bottom electrode layer 10 in the subsequent corresponding etching process, so as to reduce the damage to the bottom electrode layer 10 and improve the turnover efficiency.
In some possible embodiments, after etching to remove the residue 30 and the first residue cover layer, further comprising: repeatedly forming a third residue covering layer which covers at least the remaining residues 30, the remaining first residue covering layer, and the remaining second residue covering layer; the third residue cover layer, the remaining residues 30 and the remaining first residue cover layer are etched away at least once to completely remove the residues 30.
After formation of the residue coating 50, the residue 30, the first residue coating and the second residue coating form a complement, and the second residue coating and the first residue coating form a topography of the flat or bump 51. Considering the problem of inconsistent etching rates of the residues 30 and the residue cap layer 50, a small portion of the residues 30 may not be completely removed after etching to remove the residues 30 and the first residue cap layer.
To ensure complete removal of the residue 30 and to avoid damage to the bottom electrode layer 10, forming a third residue cap layer, and etching to remove the third residue cap layer, the residue 30, and the first residue cap layer 50 may be repeated at least once until the residue 30 is completely etched.
It will be appreciated that etching removes the residues and the first residue cap layer, and after exposing the bottom electrode layer in contact with the sidewalls of the magnetic tunnel junction (step S300), further comprises:
Step a: forming a third residue covering layer which covers at least the remaining residues, the remaining first residue covering layer and the remaining second residue covering layer.
Step b: and etching to remove the third residue covering layer, the residual residues and the residual first residue covering layer.
Steps a and b are repeated at least once in sequence until the residue 30 is completely removed.
In some possible embodiments, the sidewalls of the magnetic tunnel junction 20 are also attached with a redeposit 40, the redeposit 40 being primarily attached to the sides of the reference layer 23 and the tunneling layer 22. After the formation of the residue coating 50, the redeposit 40 may be covered by the residue coating 50 or may be exposed. After etching to remove the residue 30 and the first residue cap layer, the redeposit 40 may be covered by the remaining residue cap layer 50 or may be exposed.
Etching to remove the residue and the first residue cover layer, exposing the bottom electrode layer contacting the sidewall of the magnetic tunnel junction (step S300), and then:
Step A: forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposits, the second redeposited cover layer covering the remaining second residue cover layer and bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer.
Referring to fig. 7, the redeposited cover layer 60 includes a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposited 40 and also synchronously covering the sidewalls of the magnetic tunnel junction 20. The second redeposited cover layer covers the residue 30 and the bottom electrode layer 10 between adjacent magnetic tunnel junctions 20. In other examples, the redeposit cover layer 60 also covers the top of the magnetic tunnel junction 20, the second redeposit cover layer being of unitary construction with the first redeposit cover layer.
The material of redeposit cover layer 60 includes at least one of silicon oxide, silicon nitride, silicon oxynitride, metal oxide, and metal nitride. The redeposited cover layer 60 is formed by vertical deposition, specifically, the redeposited cover layer 60 may be formed directly by vertical deposition, or may be formed indirectly by vertical deposition, that is, the redeposited cover layer 60 is formed by vertical deposition and oxidation/nitridation.
Illustratively, the electroless deposition forms a redeposited blanket 60. Also exemplary, the material of redeposited cover layer 60 is physically deposited, forming redeposited cover layer 60 directly. Further exemplary, a metal layer is physically deposited, and the metal layer is subjected to an oxidation treatment or a nitridation treatment to form the redeposited cover layer 60, and at this time, the redeposited cover layer 60 is made of a metal oxide or a metal nitride.
Wherein the redeposited cover layer 60 is formed by deposition at a deposition angle of more than 70 deg., and less than 110 deg., preferably 90 deg.. The deposition angle refers to the deposition direction of the material particles forming the redeposited cover layer 60, and is perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, i.e. the deposition has a high directionality. The material particles include the reactant ions of the redeposited blanket 60, the target ions of the redeposited blanket 60, or the target ions of the corresponding metal layer of the redeposited blanket 60, etc.
This deposition can be considered as a vertical deposition by which the collimation of the material particles is high, the thickness of the redeposition coating 60 (i.e. the second redeposition coating) between the magnetic tunnel junctions 20 is substantially uniform and is greater than the thickness of the redeposition coating 60 (i.e. the first redeposition coating) of the sidewalls of the magnetic tunnel junctions 20, i.e. the thickness of the first redeposition coating is less than the thickness of the second redeposition coating, the overall profile of the redeposition coating 60 being shown in fig. 7.
In other examples, the top and sidewalls of the magnetic tunnel junction 20 have a remaining portion of the residue cap layer 50, and the first redeposited cap layer also covers this portion of the residue cap layer 50. The second redeposited cover layer covers the remaining second residue cover layer and the bottom electrode layer 10, the second redeposited cover layer being of unitary construction with the first redeposited cover layer.
In the example where the magnetic tunnel junction 20 includes the free layer 21, the tunneling layer 22, and the reference layer 23 stacked in this order, the second redeposited cover layer has a thickness greater than that of the free layer 21, so that the second redeposited cover layer is prevented from being too thin to expose the free layer 21 during subsequent etching, and the free layer 21 is prevented from being etched. The redeposit 40 is mainly attached to the sides of the tunneling layer 22 and the reference layer 23, and the thickness of the second redeposit cover layer is smaller than the total thickness of the free layer 21 and the tunneling layer 22, so that the redeposit 40 outside the tunneling layer 22 is removed, thereby cutting off the electrical connection between the free layer 21 and the reference layer 23 and eliminating the short circuit of the device.
And (B) step (B): the first redeposited cover layer and the redeposited material are removed by etching, and the side wall of the magnetic tunnel junction is exposed.
Referring to fig. 8, the first redeposition covering layer and the redeposition 40 are etched and removed, the etching is non-vertical, the first redeposition covering layer is thinner, the etching angle is not limited during etching, and the side wall of the magnetic tunnel junction 20 can be preferentially opened only by the non-vertical etching angle, so that the redeposition 40 is exposed, and the redeposition 40 is removed.
At this time, the sidewalls of the magnetic tunnel junction 20 are completely exposed, the residues 30 and the redeposition 40 on the sidewalls of the magnetic tunnel junction 20 are completely removed, and at least the redeposition cover layer 60 remains between the top of the magnetic tunnel junction 20 and the magnetic tunnel junction 20 without damaging the bottom electrode layer 10. As shown in fig. 8, a redeposited cap layer 60 and a residue cap layer 50 remain on top of the magnetic tunnel junction 20 and between the magnetic tunnel junction 20.
The embodiment of the application also provides a method for forming the semiconductor memory device, referring to fig. 9, the method specifically comprises the following steps:
A step S100' forms a plurality of magnetic tunnel junctions on the bottom electrode layer, sidewalls of the magnetic tunnel junctions having residues and redeposits, the residues contacting the bottom electrode layer.
As shown in fig. 2, each magnetic tunnel junction 20 may include a free layer 21, a tunneling layer 22, and a reference layer 23 disposed in sequence, the free layer 21 being disposed on the bottom electrode layer 10. Each magnetic tunnel junction 20 may further include a pinned layer 24 disposed on a side of the reference layer 23 remote from the tunneling layer 22. The sidewalls of the magnetic tunnel junction 20 have a residue 30 and a redeposit 40.
The residue 30 contacts the bottom electrode layer 10, and the residue 30 is a residue of the free layer 21 and is integrally formed with the free layer 21. The thickness of the residue 30 gradually decreases in a direction away from the side wall of the magnetic tunnel junction 20. The redeposit 40 adheres to the sidewalls of the magnetic tunnel junction 20, which adheres primarily to the sides of the reference layer 23 and the tunneling layer 22.
Step S200', forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, wherein the first redeposited cover layer covers the redeposits, and the second redeposited cover layer covers residues between adjacent magnetic tunnel junctions and the bottom electrode layer; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer.
The redeposit cover layer 60 comprises a first redeposit cover layer covering the redeposit 40 and a second redeposit cover layer, also simultaneously covering the sidewalls of the magnetic tunnel junction 20. The second redeposited cover layer covers the residue 30 and the bottom electrode layer 10 between adjacent magnetic tunnel junctions 20. In other examples, the redeposit cover layer 60 also covers the top of the magnetic tunnel junction 20, the second redeposit cover layer being of unitary construction with the first redeposit cover layer.
The redeposited cover layer 60 is formed by deposition at a deposition angle greater than 70 deg. and less than 110 deg., preferably 90 deg., i.e. the redeposited cover layer is formed by vertical deposition. Specifically, the redeposited cover layer may be formed directly by vertical deposition, or may be formed indirectly by vertical deposition, that is, after the redeposited cover layer is vertically deposited and is oxidized/nitrided.
The deposition angle refers to the deposition direction of the material particles forming the redeposited cover layer 60, and is perpendicular to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, i.e. the deposition has a high directionality. The material particles include the reactant ions of the redeposited blanket 60, the target ions of the redeposited blanket 60, or the target ions of the corresponding metal layer of the redeposited blanket 60, etc.
In this way, the collimation of the deposited material particles is high, the thickness of the redeposited cover layer 60 (i.e. the second redeposited cover layer) between the magnetic tunnel junctions 20 is substantially uniform and is greater than the thickness of the redeposited cover layer 60 (i.e. the first redeposited cover layer) of the side walls of the magnetic tunnel junctions 20, i.e. the thickness of the first redeposited cover layer is smaller than the thickness of the second redeposited cover layer.
Etching removes the first redeposited blanket layer and redeposits exposing the sidewalls of the magnetic tunnel junction and the residue in contact with the magnetic tunnel junction.
The first redeposition covering layer and the redeposition 40 are removed by etching, the etching is non-vertical, the first redeposition covering layer is thinner, the etching angle is not required to be limited during etching, and the side wall of the magnetic tunnel junction 20 can be preferentially opened only by the non-vertical etching angle, so that the redeposition 40 is exposed, and the redeposition 40 is removed.
The redeposit 40 and the first redeposit cover layer on the sidewalls of the magnetic tunnel junction 20 are completely removed and the second redeposit cover layer is simultaneously etched away at least in part. For example, a portion of the second redeposited cover layer over the residue 30 is etched away, exposing a portion of the residue 30 in contact with the magnetic tunnel junction 20, and even completely exposing the residue 30. A second redeposited blanket layer remains between adjacent residues 30 to protect the bottom electrode layer 10. In other examples, the redeposited cap layer 60 on top of the magnetic tunnel junction 20 may also remain.
Step S400', forming a residue covering layer comprising a first residue covering layer covering the exposed residues and a second residue covering layer covering the second redeposited covering layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer.
The residue coating is deposited at a deposition angle of greater than 120 °, or less than 60 °, and the deposition angle cannot be 90 °, i.e. the residue coating is formed by non-vertical deposition. The deposition angle refers to the angle between the deposition direction of the material particles forming the residue cover layer and the plane of the substrate, which is not perpendicular with respect to the plane of the substrate supporting the bottom electrode layer 10 and the magnetic tunnel junction 20, i.e. the deposition does not have good directionality.
In this way, the material particles are shielded (shadow effect) by the high density magnetic tunnel junction 20, and the thickness of the residue cover layer is different at each location. The first residue cap layer is thinner and the second residue cap layer is thicker, and the residue cap layer between the magnetic tunnel junctions 20 may be complementary to the residue 30 such that the residue cap layer between the magnetic tunnel junctions 20 is planar or raised in the middle.
In other examples, the residue cap layer also covers the top of the magnetic tunnel junction 20 and the top of the sidewall magnetic tunnel junction 20 with a thickness of the residue cap layer that is greater than the thickness of the first residue cap layer and the sidewall of the magnetic tunnel junction 20 with a thickness of the residue cap layer that is less than the thickness of the first residue cap layer.
And step S500', etching to remove the residues and the first residue covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction.
When the residue 30 and the first residue cover layer are etched away, the etching angle of the etching is greater than or equal to 60 ° and less than or equal to 120 °, preferably 90 °. The etching angle refers to the angle between the etching direction and the plane of the substrate. The etching comprises a high bias IBE etch, and the etching gas comprises at least one of helium, argon, and krypton, preferably helium, which is of small molecular weight.
Thus, the etching is vertical etching, that is, the etching direction is perpendicular to the plane of the substrate, and the alignment of the removed residues 30 and the first residue covering layer can be improved by using the vertical etching, so that the residues 30 and the first residue covering layer can be completely removed, the morphology can be gradually transferred, and the etching is finished after the residues 30 are completely removed, so that the bottom electrode layer 10 contacted with the magnetic tunnel junction 20 is exposed.
It will be appreciated that after etching to remove the residue 30 and the first residue cap layer, at least a redeposit cap layer remains between the top of the magnetic tunnel junction 20 and the adjacent magnetic tunnel junction 20, e.g., a redeposit cap layer and a residue cap layer remain between the top of the magnetic tunnel junction 20 and the adjacent magnetic tunnel junction 20. In addition, the residues 30 may be removed by multiple etching to ensure that the residues 30 can be completely removed, and the detailed description is omitted herein.
In summary, in the method of forming a semiconductor memory device in an embodiment of the present application, a plurality of magnetic tunnel junctions 20 are formed on a bottom electrode layer 10, and sidewalls of the magnetic tunnel junctions 20 have residues 30 and redeposits 40. And forming a redeposited cover layer comprising a first redeposited cover layer covering the redeposits 40 and a second redeposited cover layer covering the residues 30 and the bottom electrode layer 10, the thickness of the first redeposited cover layer being smaller than the thickness of the second redeposited cover layer, such that the second redeposited cover layer of the side walls of the magnetic tunnel junction 20 is thinner. The first redeposition covering layer and the redeposition 40 are removed by etching, and the side wall of the magnetic tunnel junction 20 is opened, so that complete removal of the redeposition 40 is ensured, short circuit of the device is avoided, and the device efficiency is improved. A residue cap layer is then formed, the residue cap layer comprising a first residue cap layer covering the second redeposited cap layer over the residues 30, and a second redeposited cap layer covering between adjacent residues 30, the upper surface of the first residue cap layer not being higher than the upper surface of the second residue cap layer, such that the residue cap layer between the magnetic tunnel junctions 20 forms a planar or intermediate raised topography. And etching to remove the residues 30 and the first residue covering layer, and synchronously removing the residues 30 and the first residue covering layer, thereby ensuring that the residues 30 are completely removed, improving the coercive force of the device, reducing the shunt to the bottom electrode layer 10 and improving the conversion efficiency.
The embodiment of the application also provides a semiconductor memory device, which comprises a bottom electrode layer and a plurality of magnetic tunnel junctions positioned on the bottom electrode layer; the sidewalls of the magnetic tunnel junction have residues that contact the bottom electrode layer.
Wherein, the residue is removed by etching, including:
Forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue covering layer is not higher than the upper surface of the second residue covering layer;
the residue and the first residue cover layer are etched away.
Thus, residues are removed in an etching mode, so that the residues are completely removed, the coercive force of the device is improved, the shunt to the bottom electrode is reduced, and the conversion efficiency is improved.
In this specification, each embodiment or implementation is described in a progressive manner, and each embodiment focuses on a difference from other embodiments, and identical and similar parts between the embodiments are all enough to refer to each other. The description of the reference to the terms "one embodiment," "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples" and the like, means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the application. In this specification, schematic representations of the above terms do not necessarily refer to the same embodiments or examples. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Finally, it should be noted that: the above embodiments are only for illustrating the technical solution of the present application, and not for limiting the same; although the application has been described in detail with reference to the foregoing embodiments, it will be understood by those of ordinary skill in the art that: the technical scheme described in the foregoing embodiments can be modified or some or all of the technical features thereof can be replaced by equivalents; such modifications and substitutions do not depart from the spirit of the application.
Claims (10)
1. A method of forming a semiconductor memory device, comprising:
Forming a plurality of magnetic tunnel junctions on the bottom electrode layer, the sidewalls of the magnetic tunnel junctions having residues that contact the bottom electrode layer;
Forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
And etching to remove the residues and the first residue covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction.
2. The method of claim 1, wherein the residue cap layer is formed via non-vertical deposition.
3. The method of forming of claim 1, further comprising, after etching away the residue and the first residue cap layer:
repeatedly forming a third residue covering layer which covers at least the residues remaining, the first residue covering layer remaining and the second residue covering layer remaining;
And etching to remove the third residue covering layer, the residues and the first residue covering layer at least once so as to completely remove the residues.
4. The method of claim 1, wherein an etching angle of the etching is greater than or equal to 60 ° and less than or equal to 120 ° when the residues and the first residue cover layer are etched away.
5. The method of forming of any of claims 1-4, wherein a sidewall of the magnetic tunnel junction has a redeposit;
Removing the residue and the first residue capping layer, exposing the bottom electrode layer in contact with the sidewall of the magnetic tunnel junction, further comprising:
Forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposits, the second redeposited cover layer covering the remaining second residue cover layer and the bottom electrode layer between adjacent magnetic tunnel junctions; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer;
Etching to remove the first redeposited covering layer and the redeposited material, and exposing the side wall of the magnetic tunnel junction.
6. The method of forming of claim 5, wherein the redeposited cover layer is formed using a deposition, the deposition angle of the deposition being greater than 70 ° and less than 110 °.
7. The method of claim 5, wherein etching removes the first redeposited blanket layer and the redeposited material, the etching being a non-vertical etching.
8. The method of forming of claim 5, wherein the magnetic tunnel junction comprises a free layer, a tunneling layer, and a reference layer stacked in sequence;
the second redeposit cover layer has a thickness that is greater than a thickness of the free layer and less than a total thickness of the free layer and the tunneling layer.
9. A method of forming a semiconductor memory device, comprising:
Forming a plurality of magnetic tunnel junctions on the bottom electrode layer, sidewalls of the magnetic tunnel junctions having residues and redeposits, the residues contacting the bottom electrode layer;
Forming a redeposited cover layer comprising a first redeposited cover layer and a second redeposited cover layer, the first redeposited cover layer covering the redeposits, the second redeposited cover layer covering the residues between adjacent magnetic tunnel junctions and the bottom electrode layer; the thickness of the first redeposited cover layer is less than the thickness of the second redeposited cover layer;
Etching to remove the first redeposited cover layer and the redeposited material, exposing the side wall of the magnetic tunnel junction and the residue contacted with the magnetic tunnel junction;
Forming a residue cap layer comprising a first residue cap layer covering the exposed residues and a second residue cap layer covering the second redeposition cap layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
And etching to remove the residues and the first residue covering layer, and exposing the bottom electrode layer contacted with the side wall of the magnetic tunnel junction.
10. A semiconductor memory device, comprising: a bottom electrode layer and a plurality of magnetic tunnel junctions on the bottom electrode layer;
sidewalls of the magnetic tunnel junction have residues that contact the bottom electrode layer;
the residues are removed by etching, comprising:
Forming a residue covering layer including a first residue covering layer covering the residues and a second residue covering layer covering the bottom electrode layer between adjacent residues; the upper surface of the first residue coating layer is not higher than the upper surface of the second residue coating layer;
and etching to remove the residues and the first residue covering layer.
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