CN114531775A - Printed circuit board - Google Patents
Printed circuit board Download PDFInfo
- Publication number
- CN114531775A CN114531775A CN202210208435.XA CN202210208435A CN114531775A CN 114531775 A CN114531775 A CN 114531775A CN 202210208435 A CN202210208435 A CN 202210208435A CN 114531775 A CN114531775 A CN 114531775A
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- core
- printed circuit
- board
- circuit board
- blind hole
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- 238000003466 welding Methods 0.000 claims description 14
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 11
- 229910052802 copper Inorganic materials 0.000 claims description 11
- 239000010949 copper Substances 0.000 claims description 11
- 238000001514 detection method Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000005259 measurement Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 230000008707 rearrangement Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
- H05K1/0268—Marks, test patterns or identification means for electrical inspection or testing
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention discloses a printed circuit board. The printed circuit board includes: the core plate comprises at least an L2/L3 core plate and an L4/L5 core plate, and at least two core plates are sequentially stacked; on the basis of comprising an L2/L3 core board and an L4/L5 core board, 2N test holes are added to the printed circuit board every time N core boards are added, and the value of N comprises an integer which is greater than or equal to 0; the short circuit condition or the open circuit condition between the test holes is related to whether the core plate is placed reversely. The printed circuit board provided by the embodiment of the invention reduces the difficulty in detecting the reverse placement of the core board of the printed circuit board.
Description
Technical Field
The invention relates to the technical field of electronics, in particular to a printed circuit board.
Background
In the process of laminating and producing a Printed Circuit Board (PCB), because the risk of misplacing two core boards is very high, the problems of board placement and board connection are mostly reduced through standard matching and browning in the industry at present, but the problems can not be avoided.
Some products can be intercepted by electrical measurements, FQA shipment skips, and the like. However, some products, especially High Density Interconnect (HDI) printed circuit boards, are difficult to find once the core board is misplaced, and can only be found when the client end parts are used and tested.
Therefore, a printed circuit board with easy detection of the reverse placement of the core is needed.
Disclosure of Invention
The invention provides a printed circuit board and a printed circuit board, which are used for reducing the difficulty in detecting the reverse arrangement of a core board of the printed circuit board.
An embodiment of the present invention provides a printed circuit board, including: the core plate comprises at least an L2/L3 core plate and an L4/L5 core plate, and at least two core plates are sequentially stacked;
on the basis of comprising an L2/L3 core board and an L4/L5 core board, 2N test holes are added to the printed circuit board every time N core boards are added, and the value of N comprises an integer which is greater than or equal to 0;
the short circuit condition or the open circuit condition between the test holes is related to whether the core plate is placed reversely.
Optionally, the test hole of the printed circuit board includes: 1-step blind hole, 2-step blind hole, … … (2N +1) -step blind hole and (2N +2) -step blind hole; the blind holes are positioned on the surface of the printed circuit board, the blind holes are provided with orifice welding rings, and the orifice welding rings of different blind holes are arranged in an insulating way;
in the printed circuit board with the core-board-free reverse placement, a hole bottom pad of the 2k-1 order blind hole corresponds to the 2k-1 order blind hole; a hole bottom pad of the 2 k-order blind hole corresponds to the 2 k-1-order blind hole and the 2 k-order blind hole, and the value of k comprises an integer which is greater than or equal to 1;
in the printed circuit board with the core-free board placed in the reverse direction, the printed circuit board is an M-layer board, wherein the value of M comprises an even number which is greater than or equal to 6;
the LS laminate corresponds to the 1-step blind hole, the 2-step blind hole … … and the S-2-step blind hole, and is designed for copper laying in the same network, wherein the value of S comprises an even number which is greater than or equal to 4 and less than or equal to M-2.
Optionally, all the blind holes are open-circuited, and the coreless board is placed upside down.
Optionally, the i-order blind hole, the i-1 blind hole … … 1-order blind hole are short-circuited, the i + 1-order blind hole … … (2N +2) -order blind hole is open-circuited, the L2/L3 core plate and the Li +2/Li +3 core plate are reversed, and the value of i includes an even number greater than or equal to 2.
Optionally, the i-1 order blind hole and the i order blind hole are short-circuited, other blind holes are open-circuited, the Li/Li +1 core plate and the Li +2/Li +3 core plate are reversed, and the value of i includes an even number greater than or equal to 2.
Optionally, all the blind holes are short-circuited, and the L2/L3 core plate and the lowest core plate are reversed.
Optionally, the i-1 order blind hole, the i order blind hole, the … … (2N +1) order blind hole, and the (2N +2) order blind hole are short-circuited, other blind holes are open-circuited, the Li/Li +1 core plate and the lowest core plate are reversed, and the value of i includes an even number greater than or equal to 2.
Optionally, on the basis of including an L2/L3 core plate and an L4/L5 core plate, a jth core plate is added, a value of j includes an integer greater than or equal to 1, the jth core plate is L (2j +4)/L (2j +5), and the added test holes are (2j +1) -order blind holes and (2j +2) -order blind holes.
Optionally, the blind holes in the short circuit connection expose the same hole bottom pad;
the blind holes of the open connections expose the via bottom pads at different layers.
Optionally, the external measuring arrangement and the blind hole constitute a conductive path.
The technical scheme that this embodiment provided, according to the short circuit condition between the test hole or the condition of opening a way, judge whether printed circuit board has two cores and put the condition of turning over, realized that one kind detects the printed circuit board that two cores were placed in opposite directions easily, compare and just can discover when client's upper part uses, tests, reduced two cores among the printed circuit board and put the detection degree of difficulty of turning over.
Drawings
Fig. 1 is a schematic structural diagram of a printed circuit board according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of another printed circuit board according to an embodiment of the present invention;
FIG. 3 is a schematic structural diagram of another PCB provided by the embodiment of the invention;
FIG. 4 is a schematic structural view of the core board L2/L3 and the core board L4/L5 in FIG. 1;
FIG. 5 is a schematic structural view of the core board L4/L5 and the core board L6/L7 in FIG. 2;
FIG. 6 is a schematic structural view of the core board L2/L3 and the core board L6/L7 in FIG. 2;
FIG. 7 is a schematic structural view of the core board L6/L7 and the core board L8/L9 shown in FIG. 3;
FIG. 8 is a schematic structural view of the core plate L2/L3 and the core plate L8/L9 shown in FIG. 3;
FIG. 9 is a schematic structural view of the L4/L5 core board and the L8/L9 core board in FIG. 3.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
An embodiment of the present invention provides a printed circuit board, including: the core plate comprises at least an L2/L3 core plate and an L4/L5 core plate, and at least two core plates are sequentially stacked; on the basis of comprising an L2/L3 core board and an L4/L5 core board, 2N test holes are added to the printed circuit board every time N core boards are added, and the value of N comprises an integer which is greater than or equal to 0; the short circuit condition or the open circuit condition between the test holes is related to whether the core plate is placed reversely.
Illustratively, referring to FIG. 1, the printed circuit board includes an L2/L3 core board and an L4/L5 core board, and the test holes of the printed circuit board include a 1-step blind hole and a 2-step blind hole.
Referring to fig. 2, the printed circuit board is additionally provided with an L6/L7 core board on the basis of an L2/L3 core board and an L4/L5 core board, and is additionally provided with 2 test holes on the basis of a 1-step blind hole and a 2-step blind hole, namely a 3-step blind hole and a 4-step blind hole.
Referring to fig. 3, the printed circuit board is additionally provided with an L6/L7 core board and an L8/L9 core board on the basis of an L2/L3 core board and an L4/L5 core board, and the printed circuit board is additionally provided with 4 test holes which are respectively a 3-order blind hole, a 4-order blind hole, a 5-order blind hole and a 6-order blind hole on the basis of a 1-order blind hole and a 2-order blind hole.
The technical scheme that this embodiment provided, according to the short circuit condition between the test hole or the condition of opening a way, judge whether printed circuit board has two cores and put the condition of turning over, realized that one kind detects the printed circuit board that two cores were placed in opposite directions easily, compare and just can discover when client's upper part uses, tests, reduced two cores among the printed circuit board and put the detection degree of difficulty of turning over.
Optionally, the test hole of the printed circuit board includes: 1-step blind hole, 2-step blind hole, … … (2N +1) -step blind hole and (2N +2) -step blind hole; the blind holes are positioned on the surface of the printed circuit board and are provided with orifice welding rings, and the orifice welding rings of different blind holes are arranged in an insulating way; in the printed circuit board with the core-board-free reverse placement, a hole bottom pad of the 2k-1 order blind hole corresponds to the 2k-1 order blind hole; the hole bottom bonding pad of the 2 k-order blind hole corresponds to the 2 k-1-order blind hole and the 2 k-order blind hole, and the value of k comprises an integer which is greater than or equal to 1; in the printed circuit board with the core-free board placed in the reverse direction, the printed circuit board is an M-layer board, wherein the value of M comprises an even number which is more than or equal to 6; the LS laminate corresponds to the 1-step blind hole, the 2-step blind hole … … and the S-2-step blind hole, and is designed for copper laying in the same network, wherein the value of S comprises an even number which is greater than or equal to 4 and less than or equal to M-2.
The printed circuit board of fig. 1-3 has the coreless board placed upside down. The blind hole is located the surface of printed circuit board, and the blind hole is provided with drill way welding ring, and the drill way welding ring of different blind holes sets up in insulating.
Referring to fig. 1, the printed circuit board is a 6-layer board, namely an L1 layer board and an L2 layer board … … L6 layer board. The printed circuit board comprises 2 core boards, namely an L2/L3 core board and an L4/L5 core board, and the test holes of the printed circuit board comprise 1-step blind holes and 2-step blind holes. Wherein, the hole bottom pad W1b of the 1 st order blind hole corresponds to the 1 st order blind hole. The via bottom pads W2b of the 2-step blind via correspond to the 1-step blind via and the 2-step blind via. The L4 laminate corresponds to the 1-step blind hole and the 2-step blind hole, and the L4 laminate is designed for the same network copper laying. The 1 st order blind hole is provided with an orifice weld ring W1a, and the 2 nd order blind hole is provided with an orifice weld ring W2 a.
Referring to fig. 2, the printed circuit board is an 8-layer board, namely an L1 layer board and an L2 layer board … … L8 layer board. The printed circuit board comprises 3 core boards which are respectively an L2/L3 core board, an L4/L5 core board and an L6/L7 core board, and the test holes of the printed circuit board comprise a 1-step blind hole, a 2-step blind hole, a 3-step blind hole and a 4-step blind hole. Wherein, the hole bottom pad W1b of the 1 st order blind hole corresponds to the 1 st order blind hole. The via bottom pads W2b of the 2-step blind via correspond to the 1-step blind via and the 2-step blind via. The via bottom pads W3b of the 3-step blind via correspond to the 3-step blind via. The via bottom pads W4b of the 4-step blind via correspond to the 3-step blind via and the 4-step blind via. The L4 laminate corresponds to the 1-step blind hole and the 2-step blind hole, and the L4 laminate is designed for the same network copper laying. The L6 laminated board corresponds to a 1-order blind hole, a 2-order blind hole, a 3-order blind hole and a 4-order blind hole, and the L6 laminated board is designed for the same network copper laying. The 1 st order blind hole is provided with an orifice weld ring W1a, and the 2 nd order blind hole is provided with an orifice weld ring W2 a. The 3-step blind hole is provided with an orifice welding ring W3 a. The 4-step blind hole is provided with an orifice welding ring W4 a.
Referring to fig. 3, the printed circuit board has 10 layers, i.e., an L1 layer and an L2 layer … … L10 layer. The printed circuit board comprises 4 core boards which are respectively an L2/L3 core board, an L4/L5 core board, an L6/L7 core board and an L8/L9 core board, and the test holes of the printed circuit board comprise a 1-step blind hole, a 2-step blind hole, a 3-step blind hole, a 4-step blind hole, a 5-step blind hole and a 6-step blind hole. Wherein, the hole bottom pad W1b of the 1 st order blind hole corresponds to the 1 st order blind hole. The via bottom pads W2b of the 2-step blind via correspond to the 1-step blind via and the 2-step blind via. The via bottom pads W3b of the 3-step blind via correspond to the 3-step blind via. The via bottom pads W4b of the 4-step blind via correspond to the 3-step blind via and the 4-step blind via. The via bottom pads W5b of the 5 th order blind via correspond to the 5 th order blind via. The via bottom pads W6b of the 6-step blind via correspond to the 5-step blind via and the 6-step blind via. The L4 laminate corresponds to the 1-step blind hole and the 2-step blind hole, and the L4 laminate is designed for the same network copper laying. The L6 laminated board corresponds to a 1-order blind hole, a 2-order blind hole, a 3-order blind hole and a 4-order blind hole, and the L6 laminated board is designed for the same network copper laying. The L8 laminated board corresponds to a 1-step blind hole, a 2-step blind hole, a 3-step blind hole, a 4-step blind hole, a 5-step blind hole and a 6-step blind hole, and the L8 laminated board is designed by laying copper on the same network. The 1 st order blind hole is provided with an orifice weld ring W1a, and the 2 nd order blind hole is provided with an orifice weld ring W2 a. The 3-step blind hole is provided with an orifice welding ring W3 a. The 4-step blind hole is provided with an orifice welding ring W4 a. The 5-step blind hole is provided with an orifice welding ring W5 a. The 6-step blind hole is provided with an orifice welding ring W6 a.
Referring to fig. 1, the printed circuit board is a 6-layer board. Referring to fig. 2, the printed circuit board is an 8-layer board. Referring to fig. 3, the printed circuit board is a 10-layer board. The number of layers of the network copper-paving layer in the printed circuit board determines the value of M layers of boards in the printed circuit board. The thickness of the network-paved copper layer is larger than or equal to 5 ounces, so that the copper layer can have certain heat dissipation performance and matching conduction capacity with conduction current within a preset value range.
The printed circuit board of fig. 1-3 has no core board placed upside down. When two core boards are placed reversely in the printed circuit boards of fig. 1 to 3, whether the two core boards are placed reversely in the printed circuit board can be determined according to the following technical scheme.
Optionally, all the blind holes are open-circuited, and the coreless board is placed upside down.
For example, referring to fig. 1, the 1 st order blind via and the 2 nd order blind via are both open, and there is no situation that the two core boards are placed in reverse in the printed circuit board. Referring to fig. 2, the 1-step blind hole, the 2-step blind hole, the 3-step blind hole and the 4-step blind hole are all open, and the printed circuit board does not have the condition that the two core boards are placed in reverse. Referring to fig. 3, the 1-step blind hole, the 2-step blind hole, the 3-step blind hole, the 4-step blind hole, the 5-step blind hole and the 6-step blind hole are all open, and the printed circuit board does not have the condition that two core boards are placed in reverse.
Optionally, the i-step blind hole, the i-1 blind hole … … 1-step blind hole are short-circuited, the i + 1-step blind hole … … (2N +2) step blind hole is open-circuited, the L2/L3 core plate and the Li +2/Li + 3 core plate are reversed, and the value of i includes an even number greater than or equal to 2.
For example, referring to fig. 4, when i takes 2, the 2-step blind hole and the 1-step blind hole are short-circuited, and the other open-circuited, the L2/L3 core board is inverted from the L4/L5 core board. Referring to FIG. 6, when i is 4, the 4-step blind hole, the 3-step blind hole, the 2-step blind hole and the 1-step blind hole are short-circuited, and the L2/L3 core plate and the L6/L7 core plate are reversed. Referring to FIG. 8, when i is 6, the 6-step blind hole, the 5-step blind hole, the 4-step blind hole, the 3-step blind hole, the 2-step blind hole and the 1-step blind hole are short-circuited, and the L2/L3 core plate and the L8/L9 core plate are reversed.
Optionally, the i-1 order blind hole and the i order blind hole are short-circuited, other blind holes are open-circuited, the Li/Li + 1 core plate and the Li +2/Li + 3 core plate are reversed, and the value of i includes an even number greater than or equal to 2.
For example, referring to FIG. 4, when i is 2, the 1 st order blind hole and the 2 nd order blind hole are short-circuited, the other blind holes are open-circuited, and the L2/L3 core plate and the L4/L5 core plate are reversed. Referring to FIG. 5, when i is 4, the 3 rd-order blind hole and the 4 th-order blind hole are short-circuited, the other blind holes are open-circuited, and the L4/L5 core plate and the L6/L7 core plate are reversed. Referring to FIG. 7, when i is 6, the 5 th-order blind hole and the 6 th-order blind hole are short-circuited, the other blind holes are open-circuited, and the L6/L7 core plate and the L8/L9 core plate are reversed.
Optionally, all the blind holes are short-circuited, and the L2/L3 core plate and the lowest core plate are reversed.
Referring to FIG. 4, both the 1 st and 2 nd order blind vias are shorted, and the L2/L3 core plate and the lowest core plate are inverted. The lowermost core plate is the L4/L5 core plate. Referring to fig. 6, the 1 st, 2 nd, 3 rd and 4 th order blind vias are all shorted, and the L2/L3 core board and the lowest core board are reversed. The lowermost core plate is the L6/L7 core plate. Referring to fig. 8, the 1 st, 2 nd, 3 rd, 4 th, 5 th and 6 th order blind vias are all shorted, and the L2/L3 core plate and the lowest core plate are reversed. The lowermost core plate is the L8/L9 core plate.
Optionally, the i-1 order blind hole, the i order blind hole, the … … (2N +1) order blind hole, and the (2N +2) order blind hole are short-circuited, other blind holes are open-circuited, the Li/Li + 1 core plate and the lowest core plate are reversed, and the value of i includes an even number greater than or equal to 2.
Referring to fig. 8, the value of i is 2, the 1-step blind hole, the 2-step blind hole, the 3-step blind hole, the 4-step blind hole, the 5-step blind hole and the 6-step blind hole are all short-circuited, and the L2/L3 core plate and the lowest core plate are reversed. The lowermost core plate is the L8/L9 core plate.
Referring to fig. 9, i is 4, the 3-step blind holes, the 4-step blind holes, the 5-step blind holes and the 6-step blind holes are all short-circuited, the 1-step blind holes and the 2-step blind holes are open-circuited, and the L4/L5 core plate and the lowest core plate are reversed. The lowermost core plate is the L8/L9 core plate.
Referring to fig. 7, the value of i is 6, the 5-step blind holes and the 6-step blind holes are short-circuited, the 1-step blind holes, the 2-step blind holes, the 3-step blind holes and the 4-step blind holes are open-circuited, and the L6/L7 core plate and the lowest core plate are reversed. The lowermost core plate is the L8/L9 core plate.
Optionally, on the basis of including an L2/L3 core board and an L4/L5 core board, a jth core board is added, j includes an integer greater than or equal to 1, the jth core board is L (2j +4)/L (2j +5), and the added test holes are (2j +1) -step blind holes and (2j +2) -step blind holes.
Referring to FIG. 1, the printed circuit board comprises an L2/L3 core board and an L4/L5 core board, and the test holes of the printed circuit board comprise 1-step blind holes and 2-step blind holes.
For example, referring to fig. 2, the printed circuit board is additionally provided with a 1 st core board on the basis of an L2/L3 core board and an L4/L5 core board, wherein the core board is an L6/L7 core board, and the added test holes are a 3-step blind hole and a 4-step blind hole.
Referring to fig. 3, on the basis of the printed circuit board comprising an L2/L3 core board and an L4/L5 core board, a 1 st core board is added, the core board is an L6/L7 core board, and the added test holes are a 3-step blind hole and a 4-step blind hole. And adding a 2 nd core plate which is an L8/L9 core plate, wherein the added test holes are a 5-step blind hole and a 6-step blind hole.
Alternatively, referring to fig. 4-9, the blind via of the shorting connection exposes the same via landing pad. Referring to fig. 1-3, the blind holes in open circuit connection expose the hole bottom pads on different layers, so that whether the printed circuit board has the condition that the two core boards are placed in reverse can be judged according to the short circuit condition or the open circuit condition between the test holes, the printed circuit board with the two core boards placed in reverse can be easily detected, and compared with the printed circuit board with the two core boards placed in reverse in the use and test of a client-side upper part, the detection difficulty of the two core boards placed in reverse in the printed circuit board is reduced.
Optionally, the external measuring arrangement and the blind hole constitute a conductive path.
Specifically, the blind hole is equivalent to a resistor, and an external measuring device and the test hole form a conductive path. Illustratively, the external measurement device may be selected to be a multimeter. When the test holes are short-circuited, referring to fig. 4-9, the blind holes connected in a short circuit expose the same hole bottom pad, and current flows through the external measuring equipment. Referring to fig. 1-3, when the test holes are opened, the blind holes connected in an open circuit are exposed out of the hole bottom pads on different layers, and no current flows through an external measuring device, so that whether the printed circuit board has the condition that the two core boards are placed in reverse can be judged according to the short circuit condition or the open circuit condition between the test holes, the printed circuit board with the two core boards placed in reverse can be easily detected, compared with the printed circuit board with the client end, the printed circuit board can be found when the client end is used and tested, and the difficulty in detecting the reverse placement of the two core boards in the printed circuit board is reduced.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A printed circuit board, comprising: the core plate comprises at least an L2/L3 core plate and an L4/L5 core plate, and at least two core plates are sequentially stacked;
on the basis of comprising an L2/L3 core board and an L4/L5 core board, 2N test holes are added to the printed circuit board every time N core boards are added, and the value of N comprises an integer which is greater than or equal to 0;
the short circuit condition or the open circuit condition between the test holes is related to whether the core plate is placed reversely.
2. The printed circuit board of claim 1, wherein the test hole of the printed circuit board comprises: 1-step blind hole, 2-step blind hole, … … (2N +1) -step blind hole and (2N +2) -step blind hole; the blind holes are positioned on the surface of the printed circuit board, the blind holes are provided with orifice welding rings, and the orifice welding rings of different blind holes are arranged in an insulating way;
in the printed circuit board with the core-board-free reverse placement, a hole bottom pad of the 2k-1 order blind hole corresponds to the 2k-1 order blind hole; a hole bottom pad of the 2 k-order blind hole corresponds to the 2 k-1-order blind hole and the 2 k-order blind hole, and the value of k comprises an integer greater than or equal to 1;
in the printed circuit board with the core-free board placed in the reverse direction, the printed circuit board is an M-layer board, wherein the value of M comprises an even number which is greater than or equal to 6;
the LS laminate corresponds to the 1-step blind hole, the 2-step blind hole … … and the S-2-step blind hole, and is designed for copper laying in the same network, wherein the value of S comprises an even number which is greater than or equal to 4 and less than or equal to M-2.
3. The printed circuit board of claim 2, wherein all blind vias are open and the coreless board is inverted.
4. The printed circuit board of claim 2, wherein the i-step blind via, the i-1 blind via … … 1-step blind via short circuit, the i + 1-step blind via … … (2N +2) step blind via open circuit, the L2/L3 core board is inverted from the Li +2/Li +3 core board, and the value of i comprises an even number greater than or equal to 2.
5. The printed circuit board of claim 2, wherein the i-1 order blind via and the i-order blind via are shorted, the other blind vias are open, the Li/Li +1 core and the Li +2/Li +3 core are inverted, and the value of i comprises an even number greater than or equal to 2.
6. The printed circuit board of claim 2, wherein all blind vias are shorted, and the L2/L3 core and the lowest core are reversed.
7. The printed circuit board of claim 2, wherein the i-1 step blind via, the i-step blind via, the … … (2N +1) step blind via, the (2N +2) step blind via are shorted, the other blind vias are open, the Li/Li +1 core board and the lowest core board are inverted, and the value of i comprises an even number greater than or equal to 2.
8. The printed circuit board of claim 2, wherein a jth core board is added on the basis of an L2/L3 core board and an L4/L5 core board, the value of j includes an integer greater than or equal to 1, the jth core board is L (2j +4)/L (2j +5), and the added test holes are (2j +1) -step blind holes and (2j +2) -step blind holes.
9. The printed circuit board of claim 2, wherein the blind vias of the shorting connection expose the same via landing pad;
the blind holes of the open connections expose the via bottom pads at different layers.
10. A printed circuit board according to claim 9, characterized in that the external measuring arrangement and the blind hole constitute a conductive path.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210208435.XA CN114531775A (en) | 2022-03-04 | 2022-03-04 | Printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210208435.XA CN114531775A (en) | 2022-03-04 | 2022-03-04 | Printed circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114531775A true CN114531775A (en) | 2022-05-24 |
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| WO2015096666A1 (en) * | 2013-12-27 | 2015-07-02 | 广州兴森快捷电路科技有限公司 | Method and device for testing electrical properties of electrically-conductive via of pcb |
| WO2019019339A1 (en) * | 2017-07-28 | 2019-01-31 | 胜宏科技（惠州）股份有限公司 | Multi-functional circuit board detection module and detection method |
| US20190059154A1 (en) * | 2017-08-18 | 2019-02-21 | Kinsus Interconnect Technology Corp. | Multi-layer circuit board capable of being applied with electrical testing and method for manufacturing the same |
| US20210204413A1 (en) * | 2019-12-31 | 2021-07-01 | Shennan Circuits Co., Ltd. | Manufacturing method of printed circuit board |
| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
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| WO2010140224A1 (en) * | 2009-06-02 | 2010-12-09 | 三菱電機株式会社 | Method for manufacturing semiconductor device, printed circuit board, and method for manufacturing the printed circuit board |
| WO2015096666A1 (en) * | 2013-12-27 | 2015-07-02 | 广州兴森快捷电路科技有限公司 | Method and device for testing electrical properties of electrically-conductive via of pcb |
| CN204217205U (en) * | 2014-11-14 | 2015-03-18 | 广州兴森快捷电路科技有限公司 | Printed circuit board and the anti-antistructure of lamination thereof |
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| US20190059154A1 (en) * | 2017-08-18 | 2019-02-21 | Kinsus Interconnect Technology Corp. | Multi-layer circuit board capable of being applied with electrical testing and method for manufacturing the same |
| US20210204413A1 (en) * | 2019-12-31 | 2021-07-01 | Shennan Circuits Co., Ltd. | Manufacturing method of printed circuit board |
| CN113556886A (en) * | 2020-04-23 | 2021-10-26 | 深南电路股份有限公司 | Manufacturing method of multi-order blind hole circuit board and multi-order blind hole circuit board |
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