CN113990856A

CN113990856A - Optical sensing package

Info

Publication number: CN113990856A
Application number: CN202111261442.8A
Authority: CN
Inventors: 周正三; 范成至
Original assignee: Egis Technology Inc
Current assignee: Egis Technology Inc
Priority date: 2020-11-10
Filing date: 2021-10-28
Publication date: 2022-01-28
Also published as: TW202220224A; CN215955279U; TWM625090U; WO2022100443A1

Abstract

An optical sensing package, comprising: a photosensitive chip; and a chip packaging layer which surrounds a plurality of side surfaces of the photosensitive chip, partially covers a front surface of the photosensitive chip, and is provided with a first window, so that the front surface of the photosensitive chip receives the sensing light through the first window.

Description

Optical sensing package

Technical Field

The present invention relates to an optical sensing package, and more particularly, to an optical sensing package that surrounds a side surface of a photo sensor chip with a chip package layer and defines a first window for the photo sensor chip to receive sensing light.

Background

Today, smart phones, tablet computers, or other handheld devices are equipped with an optical module, such as a Time Of Flight (TOF) sensor, to achieve functions such as gesture detection, three-dimensional (3D) imaging or proximity detection, or camera focusing. In operation, the TOF sensor emits near-infrared light into the scene, which, using the time-of-flight information of the light, measures the distance of objects in the scene. TOF sensors have been favored because of their small depth information computation, high interference immunity, and long measurement range.

The core components of the TOF sensor include: a light source, in particular an infrared Vertical Cavity Surface Emitting Laser (VCSEL); photosensors, in particular Single Photon Avalanche Diodes (SPAD); and a Time To Digital Converter (TDC). The SPAD is a photoelectric detection avalanche diode with single photon detection capability, and can generate current only by weak optical signals. VCSELs in the TOF sensor emit pulse waves to a scene, SPADs receive the pulse waves reflected back from an object to be detected, a TDC records the time interval between the emission of the pulse waves and the reception of the pulse waves, and the depth information of the object to be detected is calculated by using the flight time.

Fig. 1 shows a schematic diagram of a conventional TOF optical sensing module 300. As shown in FIG. 1, the TOF optical sensing module 300 includes a cap (cap)310, a light emitting unit 320, a sensor chip 330, and a substrate 350. The substrate 350 is, for example, a printed circuit board. The light emitting unit 320 and the sensor chip 330 are disposed on the substrate 350 through an adhesive material. The light emitting unit 320 and the sensor chip 330 are electrically connected to the substrate 350. At least one sensing pixel 341 and/or at least one reference pixel 331 are formed on the sensor chip 330. The cap 310 has an emitting window 314 and a receiving window 312, and is disposed above the substrate 350 to accommodate the light emitting unit 320 and the sensor chip 330 on the substrate 350 in a cavity 315 of the cap 310. The light emitting unit 320 emits the measurement light L1 to an object (not shown) through the emission window 314, and the sensing pixel 341 receives the sensing light L3 reflected by the object through the reception window 312. The measurement light L1 is reflected by the cap 310 to generate the reference light L2 to travel toward the reference pixel 331. By calculating the time difference between the light received by the sensing pixel 341 and the light received by the reference pixel 331, the distance information can be converted.

In the optical sensing module 300, the sensing pixel 341, the reference pixel 331 and the light emitting unit 320 are disposed above the substrate 350 by a conventional pick and place (pick and place) method. Then, the sensing pixels 341, the reference pixels 331 and the light emitting units 320 are electrically connected to the substrate 350 by bonding wires 351, and the electrical connection points are pulled out from one side of the substrate 350 to the circuit board. Then, the bonding wire 351 is fixed by using the packaging adhesive 352. Next, the cap 310 is assembled to the substrate 350. Since the sensing pixel 341, the reference pixel 331 and the light emitting unit 320 are disposed in a pick-and-place manner, errors (e.g., several tens of micrometers) in placement can be easily generated during production. Furthermore, when assembling the cap 310, the alignment of the receiving window 312 and the corresponding sensing pixel 341 and/or the transmitting window 314 and the corresponding light emitting unit 320 also has a production problem in terms of assembly accuracy. More importantly, the geometric size and thickness of the conventional package are not easily reduced due to the placement and routing and the wire bonding, for example, the area ratio of the sensor chip 330 and the light-emitting unit 320 in the conventional package is about 30% to 35%, which means that if the requirements of the electronic product for being light, thin, short and small are required, the related electronic components are required to have the features of light, thin, short and small of the package and the module. On the other hand, when the gap between the sensing pixel 341 and the light emitting unit 320 is reduced to reduce the size of the optical sensing module 300, the wire bonding process is very challenging, and the conventional package is a device independent manufacturing process, which is another problem in terms of cost.

Disclosure of Invention

Therefore, an object of the present invention is to provide an optical sensing package, which utilizes chip scale packaging technology and helps to reduce the volume of the optical sensing package.

To achieve the above object, the present invention provides an optical sensing package, comprising: a photosensitive chip; and a chip packaging layer which surrounds a plurality of side surfaces of the photosensitive chip, partially covers a front surface of the photosensitive chip, and is provided with a first window, so that the front surface of the photosensitive chip receives the sensing light through the first window.

In the optical sensing package, the chip package layer may include: the molding plastic layer surrounds the plurality of side surfaces of the photosensitive chip; a plurality of conductors extending through the mold plastic layer; and a window defining layer located on the molding plastic layer and the photosensitive chip and having a plurality of first wires and an insulating material covering the plurality of first wires, wherein a plurality of electrical contacts on the front surface of the photosensitive chip are electrically connected to a plurality of contacts on a back surface of the chip packaging layer through the plurality of first wires and the plurality of conductors, respectively, wherein the window defining layer has a first window. The optical sensing package body can further comprise a light emitting chip arranged on one side of the photosensitive chip and surrounded and fixed by the molding compound layer. The window defining layer is also located on the light emitting chip and is also provided with a plurality of second wires, the light emitting chip is electrically connected to the photosensitive chip, and the window defining layer is also provided with a second window to expose a part of the light emitting chip to emit measuring light.

By the embodiment, the photosensitive chip can be packaged by using a molding compound of a packaging process and the light receiving window of the photosensitive chip can be defined, the light receiving window of the photosensitive chip can be defined by using the window defining layer, the electric connection output and input of the photosensitive chip and the light emitting chip can be completed by using a conductor matched with a rewiring mode, the array packaging of the electric connection points is realized, the volume of the optical sensing packaging body is reduced, and the light emitting range and the light receiving range which are controlled can be redefined by using the rewiring layer.

In order to make the aforementioned and other objects of the present invention comprehensible, preferred embodiments accompanied with figures are described in detail below.

Drawings

Fig. 1 shows a schematic diagram of a conventional optical sensing module.

Fig. 2A and 2B are schematic structural diagrams illustrating partial steps of a method for manufacturing an optical sensing package according to an embodiment of the invention.

Fig. 2C and fig. 2D are schematic structural diagrams illustrating partial steps of a manufacturing method of another example of an optical sensing package according to a preferred embodiment of the invention.

FIG. 3 is a schematic diagram of an optical sensing package according to a preferred embodiment of the invention.

Fig. 4 to 8 are schematic diagrams illustrating several variations of the optical sensing package of fig. 3.

Reference numerals:

a1 area

A2 area

CL cutting line

G is clearance

L1 measuring light

L2 reference light

L3 sensing light

10 processing wafers

20, photosensitive chip

22 side surface

23 electric contact

24 front side

30 chip packaging layer

40 molding compound layer

50: conductor

52 contact point

60 window definition layer

61 first conductive line

62 second conductive line

63 insulating material

64 first window

65 second window

66 optical lens

67 optical lens

70 light emitting chip

80 retaining wall

84 first middle window

85 second middle window

90: cap

91 first optical element

92 second optical element

93 main body

94 first upper window

96 second upper window

100 optical sensing package

300 TOF optical sensing module

310: cap

312 receiving window

314 emission window

315 chamber

320 light emitting unit

330 sensor chip

331 reference pixel

341 sense pixel

350 base plate

351, routing

352 packaging adhesive

Detailed Description

The present invention mainly uses the wafer level packaging technology to manufacture an optical sensing package, wherein the plane size of the package is close to the plane size of the photosensitive chip, which can improve the size and thickness defects of the prior art, and the manufacturing is different from the arrangement and wire bonding of individual chips of the prior art, but the present invention can use the wafer level batch manufacturing process to mass-produce and reduce the cost, and greatly improve the accuracy (even to micron-level accuracy) of the arrangement of the light emitting chip and the photosensitive chip through the integrated optical manufacturing, completely solving the problems encountered by the prior art, and the detailed description is as follows.

Fig. 2A to 2B are schematic structural diagrams illustrating partial steps of a method for manufacturing an optical sensing package according to a preferred embodiment of the invention. As shown in fig. 2A, in manufacturing, a plurality of photosensitive chips 20 are first arranged on a handling wafer (handling wafer)10 at intervals, so that a gap G is formed between adjacent photosensitive chips 20. Of course, in order to make the processing wafer 10 capable of being peeled for reuse, a peeling layer (not shown) may be disposed between the photosensitive chips 20 and the processing wafer 10, since it is understood by those skilled in the art that the illustration is not explicitly shown. Then, a molding compound is filled in the gap G to form a molding compound layer 40. In one example, the molding layer 40 may be formed by hot press molding, but the present invention is not limited thereto. In another example, the molding compound may be overflowed over the photo sensor chip 20, and then the molding compound over the photo sensor chip 20 may be left, or the molding compound on the surface of the photo sensor chip 20 may be removed by, for example, grinding. Then, a window defining layer 60 having a first window 64 (also called a sensing window) is formed above the photo chip 20 and the molding layer 40. In this embodiment, the molding compound of the molding compound layer 40 is an opaque material and is located in the gap G, and the window defining layer 60 partially covers the photo chip 20, and a transparent material (such as an organic or inorganic dielectric material) can be filled into the first window 64 to form a transparent layer as a light transmission medium, but an Optical lens 66 with a focusing function, such as a curved mirror, a Diffractive Optical Element (DOE), a filter Element or other Optical elements, can also be formed on the material surface of the first window 64. In the case where the molding compound is only filled in the gap G, the window defining Layer 60 can be formed by another material (such as an opaque molding compound, other opaque organic material, other opaque inorganic material, or a combination of both opaque organic and inorganic materials), or a Redistribution Layer (RDL) on the photo-sensing chip 20, wherein the RDL includes a metal material forming a conductive line and an insulating material covering the conductive line. In the case where the molding compound overflows from the gap G over the photo chip 20, the window defining layer 60 may be formed by the molding compound, i.e., the molding compound layer 40 provides the first window 64. In yet another example, a conductor 50, such as a Through-filling Via (TMV), may be further included Through the Molding compound layer 40 in the gap G. Conductor 50 is located between handle wafer 10 and window defining layer 60. A first redistribution layer (not shown) may be disposed on the surface of the handle wafer 10, and a second redistribution layer (not shown) may be disposed in the window defining layer 60. By means of the first redistribution, the second redistribution and the conductor 50, a new wire connection, such as a fan-out (fan-out) wire connection, is constructed for the purpose of rearranging the electrical connection.

After the packaging is completed, the handle wafer 10 may be peeled off by a physical or chemical process (e.g., by irradiating the peeling layer with a laser), as shown in fig. 2B, and cut along the cutting lines CL to generate a plurality of optical sensing packages. The conductors 50 provide a conductive path from electrical connections (not shown) near the front Surface of the die 20 to electrical connections (not shown) near the back Surface of the die 20, so that the optical sensing package can be mounted on a motherboard (not shown) by Surface Mount Technology (SMT). Therefore, the wafer level chip scale package process can be used to place some or all of the components of the optical sensing package on the handle wafer 10, so as to achieve the purpose of reducing the package area or volume.

Fig. 2C and fig. 2D are schematic structural diagrams illustrating partial steps of a manufacturing method of another example of an optical sensing package according to a preferred embodiment of the invention. As shown in fig. 2C and fig. 2D, the manufacturing method is similar to that of fig. 2A or fig. 2B, and the light emitting chip 70 is further disposed beside the photo sensor chip 20 and in the gap G by the precise alignment effect of the wafer level manufacturing technique, and the molding compound layer 40 is filled in the gap G to fix the photo sensor chip 20 and the light emitting chip 70, thereby realizing a light, thin, short and small-sized optical device. In addition, the electrical connection of the light emitting chip 70 is completed by the conductor 50, the window defining layer 60 and the RDL, so as to solve the problems of difficult wire bonding and glue overflow, and the molding compound layer 40 is configured with a transparent second window 65 (also called as an emission window) and a transparent layer filled in the second window 65 as a light transmission medium in a manner similar to the first window 64. Of course, an optical lens 67 similar to the optical lens 66 may also be disposed above the second window 65 and the transparent layer to control the emission angle and the light emission characteristic of the light emitting chip 70. In another embodiment, the optical sensing package may further include a light emitting driving module (not shown) for controlling the operation of the light emitting chip 70. It is understood that the light emitting driving module may be integrated with the light sensing chip 20, or may be separated from the light sensing chip 20 and the light emitting chip 70 and electrically connected together by a wire, so that it is not limited thereto.

FIG. 3 is a schematic diagram of an optical sensing package according to a preferred embodiment of the invention. The same reference numerals as those in fig. 2A to 2D denote the same functions, and are not described again. As shown in fig. 3, the optical sensing package 100 at least includes the photo sensor chip 20 and a chip package layer 30. The function of the optical sensing package 100 is not particularly limited to the measurement of the time of flight of light, and may be a single light receiving function, or a transmitting plus receiving function. The chip-packaging layer 30 surrounds the plurality of side surfaces 22 of the photosensitive chip 20, partially covers a front surface 24 of the photosensitive chip 20, and has a first window 64, so that the front surface 24 of the photosensitive chip 20 is partially exposed out of the chip-packaging layer 30 and receives the sensed light L3 from an object (not shown) through the first window 64. The chip package layer 30 provides a partial fixation to the outer surface of the photo sensor chip 20, forms a first window 64 matching the photo sensing function of the photo sensor chip 20, and provides some protection to the photo sensor chip 20. Alternatively, a transparent layer may be formed in the first window 64 as a light transmitting medium while protecting the surface of the photosensitive chip 20. In another embodiment, it is of course possible to form the above optical lens 66, DOE, filter element or other optical element, etc. on the surface of the transparent layer of the first window 64, and to dispose an optical lens 67 similar to the optical lens 66 above the second window 65 and the transparent layer. Since the wafer level packaging technology is used, a wire bonding process is not required, and an area ratio A1/A2 of an area A1 of the photo sensor chip 20 to an area A2 of the entire optical sensing package 100 is less than 1 and greater than or equal to 0.5, 0.6, 0.7 or 0.8.

The die encapsulation layer 30 includes a molding compound layer 40, a conductor 50, and a window defining layer 60 (having RDL therein), wherein the molding compound layer 40 surrounds the side surface 22 of the photo chip 20 to fix the photo chip 20 and provide a flat surface flush with the photo chip 20. In this embodiment, since the molding compound layer 40 is fixed, the package substrate is not required to support the photo sensor chip 20 upward, so that the overall thickness of the optical sensing package 100 can be reduced and the optical sensing package can be thinned. The conductors 50 extend through the molding layer 40 to provide electrical connections in a vertical direction. The window defining layer 60 is disposed on the molding compound layer 40 and the photosensitive chip 20, and has a plurality of first conductive lines 61 and an insulating material 63 covering the plurality of first conductive lines 61, wherein the first conductive lines 61 provide electrical connection in the horizontal direction and the vertical direction. The plurality of electrical contacts 23 on the front surface 24 of the light sensing chip 20 are electrically connected to the contacts 52 (schematically indicated by arrows) on the back surface of the optical sensing package 100 through the plurality of first wires 61 and the plurality of conductors 50, respectively. The contact may be implemented in many ways, and is not particularly limited. In one example, the contact includes a pad or a solder Ball, and may be a Ball Grid Array (BGA) or a Land Grid Array (LGA) package. In another example, an additional RDL (not shown) may be disposed on the back surface of the optical sensing package 100 to redistribute the solder pads or solder balls of the package. Therefore, by using the RDL in combination with the TMV, a wire bonding process is not required, the package area or volume can be reduced, and at the same time, since the metal material in the RDL can also isolate light, the first window 64 can be configured by using the metal material of the RDL in addition to the insulating material of the RDL, so as to control the light receiving range of the light sensing chip 20.

The side surfaces of the light emitting chip 70 are also surrounded and fixed by the molding compound layer 40. In actual manufacturing, the light-emitting chips 70 and the light-sensing chips 20 can be disposed on the processing wafer 10 (see fig. 2C) by the precise alignment effect of the wafer-level manufacturing technique, and then the light-emitting chips 70 and the light-sensing chips 20 are fixed by the molding compound layer 40. Next, a window defining layer 60 is formed on the photosensitive chip 20, the light emitting chip 70 and the molding compound layer 40. The window defining layer 60 may have a plurality of second wires 62 providing an electrical connection path for the light emitting chip 70 to the outside. The insulating material 63 of the window defining layer 60 is disposed between the second conductive line 62 and the first conductive line 61 and covers the second conductive line 62 and the first conductive line 61. Therefore, in the present embodiment, the window defining layer 60 also includes the redistribution layer and the first and

second wires

61 and 62 disposed therein, so that the light sensing chip 20 and the light emitting chip 70 can be electrically connected to the outside through the conductor 50, the first and

second wires

61 and 62. In fig. 3, the light emitting chip 70 is electrically connected to the photosensitive chip 20 through the second wires 62, which is advantageous in that the size of the light emitting chip 70 is generally much smaller than that of the photosensitive chip 20, so that it is convenient to make the electrical connection points of the light emitting chip 70 be uniformly managed on the photosensitive chip 20. The second window 65 of the window defining layer 60 exposes a portion of the light emitting chip 70 to emit the measuring light L1, and the light emitting range of the light emitting chip 70 may be controlled such that the measuring light L1 hits an object to be measured within the light emitting range to generate sensing light L3.

In one embodiment, the photo sensor chip 20 has: photosensitive structures such as photodiodes, Avalanche Photo Diodes (APDs), and the like; a collimating structure (not shown) over the photosensitive structure, wherein the collimating structure may comprise optical elements such as microlenses, filter layers, apertures, etc.; and a sensing circuit for processing the electrical signal from the photosensitive structure. The photo-sensing chip 20 can be manufactured by using, for example, a Complementary Metal-Oxide Semiconductor (CMOS) process, such as a Front Side Illumination (FSI) or Back Side Illumination (BSI) process, or other Semiconductor processes, but the invention is not limited thereto. The material of the photosensitive chip 20 may include a semiconductor material such as silicon, germanium, gallium nitride, silicon carbide, gallium arsenide, gallium phosphide, indium arsenide, indium antimonide, silicon germanium alloy, gallium arsenic phosphide alloy, aluminum indium arsenide alloy, aluminum gallium arsenide alloy, indium gallium phosphide alloy, indium gallium arsenide phosphide alloy, or combinations thereof. One or more electrical components (e.g., integrated circuits) may also be included on the pixel substrate. The integrated circuit may be an analog or digital circuit that may be implemented as active elements, passive elements, conductive and dielectric layers, etc., formed within the chip and electrically connected according to the electrical design and function of the chip. In addition, the Light Emitting chip 70 may have a VCSEL or a Light Emitting Diode (LED), such as an infrared LED.

Fig. 4 to 8 are schematic diagrams illustrating several variations of the optical sensing package of fig. 3. As shown in fig. 4, the present embodiment is similar to fig. 3, except that the optical sensing package 100 further includes a blocking wall 80, which may be disposed on the window defining layer 60 by Wafer-Level Molding (Wafer-Level Molding) or assembly, and the blocking wall 80 has a first middle window 84 and a second middle window 85. The first middle window 84 and the second middle window 85 are respectively communicated with the first window 64 and the second window 65, and serve as light limiting structures for the sensing light L3 and the measuring light L1, so that the angles of light emission and light reception are further limited, and stray light is prevented from entering the light sensing chip 20. The material of the dam 80 may be the same as or different from the material of the molding compound layer 40.

As shown in fig. 5, this embodiment is similar to fig. 4, except that the optical sensing package 100 further includes a first optical element 91 located above the first middle window 84. In another embodiment, the optical sensing package 100 further includes a second optical element 92 located above the second middle window 85, the first optical element 91 may be an optical lens assembly required by the light sensing chip 20, and the second optical element 92 may be an optical lens assembly required by the light emitting chip 70, the optical lens assembly includes, but is not limited to, a light transmitting element or an optical device with a special optical function, such as a filter element with a specific wavelength or the like, or a lens or DOE with a light scattering or condensing function, or a combination of multiple optical functions. The first optical element 91 covering the first middle window 84 or the second optical element 92 covering the second middle window 85 may be disposed on the blocking body 80 in an assembling manner, and serve as a light processing structure for the sensing light L3 and the measuring light L1. Thereby, the first optical element 91 or the second optical element 92 provides a cap-like structure, integrally protects the photosensitive chip 20 or the light emitting chip 70, and provides a function of required optical processing, thereby realizing a packaged optical device.

It is understood that the light sensing chip 20 may also have a reference pixel. The second optical element 92 reflects a portion of the measuring light L1 to generate a reference light, the reference pixel receives the reference light, and the distance between the optical sensing package 100 and the target object is determined according to the time difference between the light receiving time of the reference pixel and the light receiving time of the sensing pixel.

As shown in fig. 6, this embodiment is similar to fig. 3, except that the optical sensing package 100 further includes a cap 90 disposed on the window defining layer 60 by assembling, and partially disposed on the first window 64 and the second window 65, as a light confining structure and a light guiding structure for the sensing light L3 and the measuring light L1. The cap 90 includes a body 93 serving as a light confinement structure, and a first optical element 91 and a second optical element 92 serving as a light guide structure and connected to the body 93. The first optical element 91 and the second optical element 92 enclose a first upper window 94 and a second upper window 96 of the body 93. Therefore, a package protection cover can be formed as the body 93 by an injection molding method, the optical lens assembly is completed or assembled in the package protection cover to form the cap 90, and then the cap 90 is attached to the window defining layer 60 by an adhesive along the arrow direction. The assembly process may be performed in a chip-scale or wafer-scale manner.

As shown in fig. 7, this example is similar to fig. 3, except that the light emitting chip 70 is disposed on the window defining layer 60, and the light emitting chip 70 is electrically connected to the photosensitive chip 20 through an RDL (not shown) in the window defining layer 60. Although the structure shown in fig. 7 does not overlap the area of the light emitting chip 70 and the light sensing chip 20 projected on the horizontal plane, in another example, the light emitting chip 70 and the light sensing chip 20 projected on the horizontal plane may partially overlap each other, so as to reduce the lateral dimension of the optical sensing package 100.

As shown in fig. 8, this example is similar to fig. 7, except that a cap 90 similar to fig. 6 is provided, and the cap 90 is disposed on the window defining layer 60, which has the integration advantage of fig. 7 and 6.

The invention can adopt wafer-level manufacturing method except that the procedure of arranging the photosensitive chip and the luminous chip on the processing wafer is the picking and placing process of the amorphous wafer-level process, and can simultaneously manufacture corresponding optical elements such as the curved mirror, the DOE, the filtering element or other optical components and the like above the photosensitive chip and the luminous chip, and can also avoid the problem of relative error during assembly and solve the problems of assembly and cost of individual optical elements.

The optical sensing package of the above embodiments can effectively reduce the area or volume of the package, regardless of the manufacture of integrated optical devices or the assembly of individual optical devices. In addition, the fixing of the photosensitive chip can be achieved by using the molding compound, and the electric connection output and input of the photosensitive chip and the light-emitting chip can be completed by using the rewiring layer, so that the problem of glue overflow during routing of the photosensitive chip can be solved because a routing process is not needed. In addition, the package of BGA or LGA can be realized, and the volume of the optical sensing package body is reduced, so as to meet the requirements of light, thin, short and small electronic devices. The wall and the cap can be used to cooperate with the optical element to provide a cladding optical sensing package body, so as to realize the effects of receiving and transmitting light or sensing the flight time.

The detailed description of the preferred embodiments is provided only for the convenience of describing the technical contents of the present invention, and the present invention is not limited to the above embodiments in a narrow sense, and various modifications made without departing from the spirit and scope of the present invention are included in the scope of the present invention.

Claims

1. An optical sensing package, comprising:

a photosensitive chip; and

a chip packaging layer, surrounds a plurality of sides of sensitization chip, and local cover a front of sensitization chip to have a first window, make the sensitization chip openly pass through sense light is received to first window.

2. The optical sensing package of claim 1, wherein an area ratio of the photo sensing chip to the optical sensing package is less than 1 and greater than or equal to 0.5.

3. The optical sensing package of claim 1, wherein the chip packaging layer comprises:

and the plastic molding layer surrounds the plurality of side surfaces of the photosensitive chip.

4. The optical sensing package as claimed in claim 1, further comprising a transparent layer disposed in the first window, wherein the transparent layer is light transmissive.

5. The optical sensing package as claimed in claim 4, further comprising an optical lens disposed on the transparent layer.

6. The optical sensing package as claimed in claim 1, further comprising a wall disposed on the chip package layer and having a first central window as a light confinement structure for the sensing light.

7. The optical sensing package as claimed in claim 6, further comprising a first optical element disposed on the blocking wall and covering the first middle windows respectively as a light processing structure for the sensing light.

8. The optical sensing package as claimed in claim 1, further comprising a cap disposed on the chip package layer and partially over the first window, for serving as a light confinement structure and a light guide structure for the sensing light.

9. The optical sensing package as claimed in claim 1, further comprising a light emitting chip disposed on one side of the light sensing chip and surrounded and fixed by the chip package layer.

10. The optical sensing package of claim 1, wherein the chip packaging layer comprises:

the molding plastic layer surrounds the plurality of side surfaces of the photosensitive chip;

a plurality of conductors extending through the molded plastic layer; and

and the window defining layer is positioned on the molding plastic layer and the photosensitive chip and is provided with a plurality of first conducting wires and an insulating material for coating the plurality of first conducting wires.

11. The optical sensing package as claimed in claim 10, wherein the electrical contacts on the front surface of the light sensing chip are electrically connected to the contacts on a back surface of the chip package layer through the first conductive lines and the conductors, respectively, wherein the window defining layer has the first window.

12. The optical sensing package of claim 10, further comprising:

and the window defining layer is also provided with a second window to expose a part of the light-emitting chip to emit measuring light.

13. The optical sensing package as claimed in claim 12, further comprising a transparent layer disposed in the first window and the second window, wherein the transparent layer is transparent to light and the molding compound layer is opaque to light.

14. The optical sensing package as claimed in claim 12, further comprising a blocking wall disposed on the window defining layer and having a first central window and a second central window as light confining structures for the sensing light and the measuring light.

15. The optical sensing package as claimed in claim 14, further comprising a first optical element and a second optical element disposed on the blocking wall and covering the first central window and the second central window, respectively, for the light processing structures of the sensing light and the measuring light.

16. The optical sensing package as claimed in claim 14, further comprising a cap disposed on the window defining layer and partially over the first and second windows to serve as a light confining structure and a light guiding structure for the sensing light and the measuring light.

17. The optical sensing package of claim 1, further comprising:

and the light-emitting chip is used for emitting the measuring light and is arranged on the chip packaging layer.

18. The optical sensing package as claimed in claim 17, further comprising a cap disposed on the chip package layer and covering the first window to serve as a light confinement structure and a light guide structure for the sensing light and the measuring light.

19. The optical sensing package of claim 18, wherein the cap comprises:

a body as the light confining structure; and

and the first optical element is connected to the body and serves as the light guide structure.

20. The optical sensing package of claim 19, wherein the cap further comprises a second optical element coupled to the body and acting as the light guiding structure.

21. The optical sensing package of claim 1, wherein an area ratio of the photo sensing chip to the optical sensing package is less than 1 and greater than or equal to 0.8.