CN113419594B - Quiescent current control circuit capable of being used for operational amplifier - Google Patents
Quiescent current control circuit capable of being used for operational amplifier Download PDFInfo
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- G05F3/02—Regulating voltage or current
- G05F3/08—Regulating voltage or current wherein the variable is dc
- G05F3/10—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics
- G05F3/16—Regulating voltage or current wherein the variable is dc using uncontrolled devices with non-linear characteristics being semiconductor devices
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Abstract
The invention discloses a static current control circuit which can be used for an operational amplifier, and the static current control circuit comprises a folding cascode circuit, an output stage circuit and a static output current control circuit, wherein the input end of the output stage circuit is connected with the folding cascode circuit, and the static output current control circuit is connected with the output stage circuit. The invention uses the current generated by a simpler static circuit to stably control the output of the output stage, so that when the circuit outputs large current or flows in large current, the static current of the output stage is a determined value, and the power consumption of the circuit can be controlled.
Description
Technical Field
The invention relates to the technical field of operational amplifiers, in particular to a quiescent current control circuit which can be used for an operational amplifier.
Background
The operational amplifier is a common module in an integrated circuit, and in most circuit designs, the operational amplifier needs to drive various loads, and in low-voltage integrated circuit designs, driving various large loads and large-swing outputs becomes a key of a low-voltage circuit, and designing and controlling a driving output circuit becomes a key.
The static current of the existing output circuit for driving a small resistor and a large capacitor is not very definite, so that the output circuit consumes overlarge current, the static current of the output circuit can be small by using an auxiliary circuit, and the output circuit can provide large current when the large current is dynamically needed.
Disclosure of Invention
The invention aims to provide a quiescent current control circuit which can be used for an operational amplifier, so that when the circuit outputs or flows in large current, the quiescent current of an output stage is a determined value, the power consumption of the circuit can be controlled, the circuit cost is low, and the application range is wide.
In order to achieve the purpose, the invention provides the following technical scheme: a static current control circuit used for an operational amplifier comprises a folding cascode circuit, an output stage circuit and a static output current control circuit, wherein the input end of the output stage circuit is connected with the folding cascode circuit, the static output current control circuit is connected with the output stage circuit, the output stage circuit comprises a first MOS tube, a second MOS tube, a third MOS tube and a fourth MOS tube, the grid electrode of the first MOS tube and the grid electrode of the third MOS tube are connected with the output end of the folding cascode circuit, the drain electrode of the first MOS tube is connected with the drain electrode of the second MOS tube, the source electrode of the first MOS tube and the drain electrode of the third MOS tube are connected with a power supply voltage, the source electrode of the third MOS tube is connected with the drain electrode of the fourth MOS tube and the grid electrode of the second MOS tube are connected with a power supply ground, and the grid electrode of the fourth MOS tube is connected with the output end of the static output current control circuit, the static output current control circuit comprises a fifth MOS tube, a sixth MOS tube, a seventh MOS tube, an eighth MOS tube, a ninth MOS tube, a tenth MOS tube and a current source, wherein the grid electrode of the fifth MOS tube is connected with the drain electrode of the seventh MOS tube and the drain electrode of the eighth MOS tube, the drain electrode of the fifth MOS tube is connected with the drain electrode and the grid electrode of the sixth MOS tube and the grid electrode of the tenth MOS tube, the grid electrode of the eighth MOS tube is connected with the drain electrode of the tenth MOS tube and the source electrode of the ninth MOS tube, the grid electrode of the ninth MOS tube is connected with the grid electrode of the seventh MOS tube, the grid electrode and the drain electrode of the eleventh MOS tube and one end of the current source, the source electrode of the eleventh MOS tube, the source electrode of the seventh MOS tube and the source electrode of the fifth MOS tube are connected with a power supply voltage, and the other end of the current source, the source electrode of the tenth MOS tube, the source electrode of the eighth MOS tube and the source electrode of the sixth MOS tube are connected with a power supply ground.
Preferably, the folded cascode circuit comprises a second MOS transistor to a third MOS transistor, the drain electrode of the second MOS tube is connected with the source electrode of the second MOS tube and the source electrode of the second MOS tube, the drain electrode of the second MOS tube is connected with the drain electrode of the third MOS tube and the source electrode of the second nine MOS tube, the drain electrode of the second third MOS tube is connected with the source electrode of the second eighth MOS tube and the drain electrode of the thirtieth MOS tube, the grid electrode of the thirtieth MOS tube is connected with the grid electrode of the third MOS tube, the grid electrode of the second eight MOS tube is connected with the grid electrode of the second nine MOS tube, the drain electrode of the second eight MOS tube is connected with the drain electrode of the second six MOS tube, the grid electrode of the second four MOS tube and the grid electrode of the second five MOS tube, and the source electrode of the second sixth MOS tube is connected with the drain electrode of the second fourth MOS tube, the drain electrode of the second ninth MOS tube is connected with the drain electrode of the second seventh MOS tube, and the source electrode of the second seventh MOS tube is connected with the drain electrode of the second fifth MOS tube.
Preferably, the source of the thirtieth MOS transistor and the source of the thirty-first MOS transistor are connected to a power supply voltage, and the source of the second fourth MOS transistor and the source of the second fifth MOS transistor and the source of the second first MOS transistor are connected to a power supply ground.
Preferably, a connection point of the drain of the second ninth MOS transistor and the drain of the second seventh MOS transistor is an output end of the folded cascode circuit.
Preferably, the first MOS transistor, the fifth MOS transistor, the seventh MOS transistor, the eleventh MOS transistor, the second eighth MOS transistor, the second ninth MOS transistor, the thirty MOS transistor, and the thirty-first MOS transistor are PMOS transistors.
Preferably, the second MOS transistor, the third MOS transistor, the fourth MOS transistor, the sixth MOS transistor, the eighth MOS transistor, the ninth MOS transistor, the tenth MOS transistor, and the seventh MOS transistor are NMOS transistors.
Preferably, the seventh MOS transistor, the eighth MOS transistor, the ninth MOS transistor, and the tenth MOS transistor are mirror images of the first MOS transistor, the second MOS transistor, the third MOS transistor, and the fourth MOS transistor, and the sizes are reduced in equal proportion.
Preferably, the gate voltage of the fourth MOS transistor is output by a static output current control circuit.
Preferably, an RC circuit is connected between the output terminal of the folded cascode circuit and the output terminal of the output stage circuit.
Preferably, the RC circuit is used to compensate for the phase margin of the folded cascode circuit, and the RC circuit includes a resistor and a capacitor connected in series.
Compared with the prior art, the invention has the beneficial effects that:
1. the invention uses the current generated by a simpler static circuit to stably control the output of the output stage, so that when the circuit outputs large current or flows in large current, the static current of the output stage is a determined value, and the power consumption of the circuit can be controlled.
2. According to the invention, the seventh MOS tube MQ1, the eighth MOS tube MQ2, the ninth MOS tube MQ3 and the tenth MOS tube MQ4 are mirror images of the first MOS tube MO1, the second MOS tube MO2, the third MOS tube MO3 and the fourth MOS tube MO4, the size is reduced in equal proportion, and according to the mirror image characteristic, when the current generated by the current source IQ is copied to the leakage currents of the MQ3 and the MQ1 through the MQ connected with the diode, the leakage current of the IQ can be obtained at the output stage, and the current is the static control current of the output stage, so that the static control current of the output stage can be stably controlled.
3. The invention has the advantages of simple structure, small quantity of components, low price, low cost and wide application range.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a block diagram of the structural connections of the present invention;
FIG. 2 is a schematic circuit diagram of the folded cascode circuit of the present invention connected to an output stage circuit;
fig. 3 is a schematic circuit diagram of the connection between the quiescent output current control circuit and the output stage circuit according to the present invention.
In the figure: MO1, a first MOS tube; MO2, a second MOS tube; MO3, a third MOS tube; MO4, a fourth MOS tube; MI1, fifth MOS pipe; MI2, sixth MOS pipe; MQ1 and a seventh MOS transistor; MQ2 and an eighth MOS transistor; MQ3 and a ninth MOS transistor; MQ4 and a tenth MOS tube; MQ and an eleventh MOS tube; IQ, current source; m1, a second MOS tube; m2, a second MOS tube; m3, a second MOS tube; m4 and a second four MOS tube; m5 and a second fifth MOS tube; m6 and a second sixth MOS tube; m7 and a second seventh MOS tube; m8, a second eight MOS tube; m9, a second nine MOS tube; m10 and a thirtieth MOS tube; m11 and a third MOS tube;
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally connected; can be mechanically or electrically connected; they may be connected directly or indirectly through intervening media, or they may be interconnected between two elements. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
The invention provides a technical scheme that: as shown in fig. 1-3, a static current control circuit that can be used for an operational amplifier includes a folded cascode circuit, an output stage circuit, and a static output current control circuit, where an input terminal of the output stage circuit is connected to the folded cascode circuit, the folded cascode circuit and the output stage circuit constitute a folded cascode operational amplifier, as shown in fig. 2, the folded cascode circuit includes a second MOS transistor M1 to a third MOS transistor M11, a drain of the second MOS transistor M1 is connected to a source of the second MOS transistor M2 and a source of the second MOS transistor M3, a drain of the second MOS transistor M2 is connected to a drain of the third MOS transistor M11 and a source of a second ninth MOS transistor M9, a drain of the second MOS transistor M3 is connected to a source of the second eighth MOS transistor M8 and a drain of the thirty MOS transistor M2, a gate of the thirty MOS transistor M10 is connected to a gate of the third MOS transistor M11, and a gate of the eighth MOS 3884 is connected to a gate of the ninth MOS transistor M68542, the drain of the second eight MOS transistor M8 is connected to the drain of the second sixth MOS transistor M6, the gate of the second fourth MOS transistor M4, and the gate of the second fifth MOS transistor M5, the source of the second sixth MOS transistor M6 is connected to the drain of the second fourth MOS transistor M4, the drain of the second ninth MOS transistor M9 is connected to the drain of the second seventh MOS transistor M7, and the source of the second seventh MOS transistor M7 is connected to the drain of the second fifth MOS transistor M5. The source of the thirtieth MOS tube M10 and the source of the thirty-first MOS tube are connected with the power voltage, and the source of the second fourth MOS tube M4 and the source of the second fifth MOS tube M5 and the source of the second first MOS tube M1 are connected with the power ground. The connection point of the drain of the second ninth MOS transistor M9 and the drain of the second seventh MOS transistor M7 is the output end of the folded cascode circuit.
The second MOS transistor M2 and the second MOS transistor M3 are input MOS transistors, which convert the input voltage into a current, and the current at the node E and the current of the gain stage satisfy the following condition: i11 ═ I2+ I9, and similarly, at node F: i10 ═ I3+ I8. The operational amplifier can provide larger gain, and the application range of the operational amplifier with the folded structure is wider due to the fact that input and output are required to be short-circuited when the buffer is made. The folded cascode circuit needs to be added with an output stage circuit when a small load impedance needs to be driven because of its large output impedance and small amplitude of the output voltage.
The output stage circuit of fig. 2 is one of them, and it can drive small impedance and large capacitance load, and at the same time, it can greatly increase the output swing of the circuit.
The output stage circuit comprises a first MOS tube MO1, a second MOS tube MO2, a third MOS tube MO3 and a fourth MOS tube MO4, wherein the grid electrode of the first MOS tube MO1 and the grid electrode of the third MOS tube MO3 are connected with the output end of the folded cascode circuit, the drain electrode of the first MOS tube MO1 is connected with the drain electrode of the second MOS tube MO2, the connection point of the first MOS tube MO1 and the third MOS tube MO3 serves as an output node, and the output voltage is Vout. The source of the first MOS transistor MO1 and the drain of the third MOS transistor MO3 are connected to a power supply voltage, the source of the third MOS transistor MO3 is connected to the drain of the fourth MOS transistor MO4 and the gate of the second MOS transistor MO2, the source of the fourth MOS transistor MO4 is connected to the source of the second MOS transistor MO2 and the ground, the gate of the fourth MOS transistor MO4 is connected to the output terminal of the static output current control circuit, and the gate voltage of the fourth MOS transistor MO4 is output by the static output current control circuit.
And an RC circuit is also connected between the output end of the folded cascode circuit and the output end of the output stage circuit. The phase margin of the folded cascode circuit is compensated by an RC circuit which comprises a resistor and a capacitor which are connected in series.
As shown in fig. 3, the static output current control circuit is connected to the output stage circuit, the static output current control circuit includes a fifth MOS transistor MI1, a sixth MOS transistor MI2, a seventh MOS transistor MQ1, an eighth MOS transistor MQ2, a ninth MOS transistor MQ3, a tenth MOS transistor MQ4 and a current source IQ, the gate of the fifth MOS transistor MI1 is connected to the drain of the seventh MOS transistor MQ1 and the drain of the eighth MOS transistor MQ2, the drain of the fifth MOS transistor MI1 is connected to the drain and gate of the sixth MOS transistor MI2 and the gate of the tenth MOS transistor MQ4, the gate of the eighth MOS transistor 2 is connected to the drain of the tenth MOS transistor MQ4 and the source of the ninth MOS transistor 3, the gate of the ninth MOS transistor MQ3 is connected to the gate of the seventh MOS transistor MQ1, the gate and the drain of the source of the eleventh MOS transistor MQ3, the source of the eleventh MOS transistor MQ and the source of the ninth MOS transistor MQ 4684, the seventh MOS transistor MQ 4642, and the source of the tenth MOS transistor MQ4 are connected to the source of the fifth MOS transistor MQ1, and the other end of the source of the tenth MOS transistor MQ1, and the source of the fifth MOS transistor MQ 27 are connected to the source of the tenth MOS transistor MQ4, The source electrode of the eighth MOS transistor MQ2 and the source electrode of the sixth MOS transistor MI2 are connected to the power ground, and the seventh MOS transistor MQ1, the eighth MOS transistor MQ2, the ninth MOS transistor MQ3 and the tenth MOS transistor MQ4 are mirror images of the first MOS transistor MO1, the second MOS transistor MO2, the third MOS transistor MO3 and the fourth MOS transistor MO4, and the sizes of the mirror images are reduced in equal proportion.
The first MOS transistor MO1, the fifth MOS transistor MI1, the seventh MOS transistor MQ1, the eleventh MOS transistor MQ, the second eighth MOS transistor M8, the second ninth MOS transistor M9, the thirty MOS transistor M10 and the thirty-first MOS transistor are PMOS transistors. The second MOS transistor MO2, the third MOS transistor MO3, the fourth MOS transistor MO4, the sixth MOS transistor MI2, the eighth MOS transistor MQ2, the ninth MOS transistor MQ3, the tenth MOS transistor MQ4, and the second to seventh MOS transistors M1 to M7 are NMOS transistors.
The first MOS tube MO1 and the third MOS tube MO3 of the output stage circuit are directly connected by an output VOUT1 of the operational amplifier, a difference between a gate voltage of the second MOS tube MO2 and a voltage VOUT1 is a VGS voltage of the third MOS tube MO3, the VGS voltage is a voltage difference between a gate and a source of the third MOS tube MO3, the VGS voltage is determined by currents flowing through the third MOS tube MO3 and the fourth MOS tube MO4, and quiescent currents of the first MOS tube MO1 and the second MOS tube MO2 of the output tube are determined, so that the quiescent current of the output stage circuit can be determined by accurately adjusting a gate bias voltage VQ of the fourth MOS tube MO 4. The static output current control circuit is a circuit introduced for reasonably biasing the gate voltage of the fourth MOS transistor MO 4. The current generated by the current source IQ is copied to the leakage current of the ninth MOS transistor MQ3 and the seventh MOS transistor MQ1 through the eleventh MOS transistor MQ connected with the diode, so that the eighth MOS transistor MQ2 can obtain the leakage current of an IQ, and due to the similar characteristics of the first MOS transistor MO1, the second MOS transistor MO2, the third MOS transistor MO3, the fourth MOS transistor MO4, the seventh MOS transistor MQ1, the eighth MOS transistor MQ2, the ninth MOS transistor MQ3 and the tenth MOS transistor MQ4, the leakage current of an IQ can be obtained at the output stage, and the current is the static control current of the output stage.
In the whole static output current control circuit, in a loop path of VA (voltage at a point a), VB (voltage at a point B) and VC (voltage at a point C), due to the connection relationship of MOS transistors, when VA rises, VB falls, VC rises, VC equals to VQ, and finally the gate voltages of MO4 and MQ4 are controlled, and since the sources of MO4 and MQ4 are grounded and are connected with a common source amplifier, VQ rises and finally falls, similarly, the voltage at a point D is also controlled by the loop, so that the static current of an output stage is stabilized at IQ, and thus, the IQ current is always the static current of the output stage circuit no matter whether the first MOS transistor MO1 and the second MOS transistor MO2 are externally sink currents or sink currents.
The invention uses the current generated by a simpler static circuit to stably control the output of the output stage, so that when the circuit outputs large current or flows in large current, the static current of the output stage is a determined value, and the power consumption of the circuit can be controlled.
In the description of the present invention, it is to be understood that the indicated orientations or positional relationships are based on the orientations or positional relationships shown in the drawings and are only for convenience in describing the present invention and simplifying the description, but are not intended to indicate or imply that the indicated devices or elements must have a particular orientation, be constructed and operated in a particular orientation, and are not to be construed as limiting the present invention.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that changes, modifications, substitutions and alterations can be made in these embodiments without departing from the principles and spirit of the invention, the scope of which is defined in the appended claims and their equivalents.
Claims (10)
1. A quiescent current control circuit that can be used in an operational amplifier, comprising a folded cascode circuit, characterized in that: the output stage circuit comprises a first MOS tube (MO1), a second MOS tube (MO2), a third MOS tube (MO3) and a fourth MOS tube (MO4), wherein the grid electrode of the first MOS tube (MO1) and the grid electrode of the third MOS tube (MO3) are connected with the output end of the folded cascode circuit, the drain electrode of the first MOS tube (MO1) is connected with the drain electrode of the second MOS tube (MO2), the source electrode of the first MOS tube (MO1) and the drain electrode of the third MOS tube (MO3) are connected with the power supply voltage, the source electrode of the third MOS tube (MO3) is connected with the drain electrode of the fourth MOS tube (MO4), the gate electrode of the second MOS tube (MO2), and the source electrode of the fourth MOS tube (MO4) is connected with the ground of the second MOS tube (MO2), the gate of the fourth MOS transistor (MO4) is connected to the output terminal of the static output current control circuit, the static output current control circuit includes a fifth MOS transistor (MI1), a sixth MOS transistor (MI2), a seventh MOS transistor (MQ1), an eighth MOS transistor (MQ2), a ninth MOS transistor (MQ3), a tenth MOS transistor (MQ4), and a current source (IQ), the gate of the fifth MOS transistor (MI1) is connected to the drain of the seventh MOS transistor (MQ1) and the drain of the eighth MOS transistor (MQ2), the drain of the fifth MOS transistor (MI1) is connected to the drain and gate of the sixth MOS transistor (MI2) and the gate of the tenth MOS transistor (MQ4), the gate of the eighth MOS transistor (2) is connected to the drain of the tenth MOS transistor (MQ4) and the source of the ninth MOS transistor (3), the drain of the ninth MOS transistor (3) is connected to the drain of the seventh MOS transistor (MO1), the drain of the eleventh MOS transistor (MQ1) and the drain of the ninth MOS transistor (MQ) and the source (MQ) and the drain of the eleventh MOS transistor (3), and the drain of the eleventh MOS transistor (MQ) are connected to the drain of the eleventh MOS transistor (3, The source electrode of the seventh MOS transistor (MQ1) and the source electrode of the fifth MOS transistor (MI1) are connected with the power supply voltage, and the other end of the current source (IQ) is connected with the source electrode of the tenth MOS transistor (MQ4), the source electrode of the eighth MOS transistor (MQ2) and the source electrode of the sixth MOS transistor (MI2) to be connected with the power supply ground.
2. The quiescent current control circuit according to claim 1, wherein: the folding cascode circuit comprises a second MOS tube (M1) to a third MOS tube (M11), the drain of the second MOS tube (M1) is connected with the source of the second MOS tube (M2) and the source of the second MOS tube (M3), the drain of the second MOS tube (M2) is connected with the drain of the third MOS tube (M11) and the source of the second ninth MOS tube (M9), the drain of the second MOS tube (M3) is connected with the source of the second eight MOS tube (M8) and the drain of the thirty MOS tube (M10), the gate of the thirty MOS tube (M10) is connected with the gate of the third MOS tube (M588), the gate of the second eight MOS tube (M8) is connected with the gate of the second ninth MOS tube (M9), the drain of the second MOS tube (M8) is connected with the drain of the second MOS tube (M68629), the drain of the second MOS tube (M3684) is connected with the drain of the sixth MOS tube (M4642), the drain of the fourth MOS tube (M6) is connected with the drain of the fourth MOS tube (M4642), the drain electrode of the second ninth MOS tube (M9) is connected with the drain electrode of a second seventh MOS tube (M7), and the source electrode of the second seventh MOS tube (M7) is connected with the drain electrode of a second fifth MOS tube (M5).
3. The quiescent current control circuit according to claim 2, wherein: the source electrode of the thirty-first MOS transistor (M10) and the source electrode of the thirty-first MOS transistor are connected with a power voltage, and the source electrode of the second fourth MOS transistor (M4), the source electrode of the second fifth MOS transistor (M5) and the source electrode of the second first MOS transistor (M1) are connected with a power ground.
4. The quiescent current control circuit according to claim 2, wherein: and the connection point of the drain electrode of the second ninth MOS transistor (M9) and the drain electrode of the second seventh MOS transistor (M7) is the output end of the folded cascode circuit.
5. The quiescent current control circuit according to claim 2, wherein: the first MOS transistor (MO1), the fifth MOS transistor (MI1), the seventh MOS transistor (MQ1), the eleventh MOS transistor (MQ), the second eighth MOS transistor (M8), the second ninth MOS transistor (M9), the thirty MOS transistor (M10) and the thirty-first MOS transistor are PMOS transistors.
6. The quiescent current control circuit according to claim 2, wherein: the second MOS transistor (MO2), the third MOS transistor (MO3), the fourth MOS transistor (MO4), the sixth MOS transistor (MI2), the eighth MOS transistor (MQ2), the ninth MOS transistor (MQ3), the tenth MOS transistor (MQ4), and the second MOS transistor (M1) to the seventh MOS transistor (M7) are NMOS transistors.
7. The quiescent current control circuit according to claim 1, wherein: the seventh MOS transistor (MQ1), the eighth MOS transistor (MQ2), the ninth MOS transistor (MQ3) and the tenth MOS transistor (MQ4) are mirror images of the first MOS transistor (MO1), the second MOS transistor (MO2), the third MOS transistor (MO3) and the fourth MOS transistor (MO4), and the sizes of the mirror images are reduced in equal proportion.
8. The quiescent current control circuit according to claim 1, wherein: the grid voltage of the fourth MOS tube (MO4) is output by a static output current control circuit.
9. The quiescent current control circuit according to claim 1, wherein: and an RC circuit is connected between the output end of the folded cascode circuit and the output end of the output stage circuit.
10. The quiescent current control circuit according to claim 9, wherein: the RC circuit is used for compensating the phase margin of the folded cascode circuit and comprises a resistor and a capacitor which are connected in series.
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| CN202110751393.XA CN113419594B (en) | 2021-07-02 | 2021-07-02 | Quiescent current control circuit capable of being used for operational amplifier |
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| CN202110751393.XA CN113419594B (en) | 2021-07-02 | 2021-07-02 | Quiescent current control circuit capable of being used for operational amplifier |
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| CN113419594B true CN113419594B (en) | 2022-02-11 |
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| CN108599731A (en) * | 2018-08-15 | 2018-09-28 | 广东工业大学 | A kind of low-power consumption broadband mutual conductance error amplifier |
| CN110212866A (en) * | 2019-04-29 | 2019-09-06 | 西安电子科技大学 | A kind of low-power consumption three-stage operational amplifier driving heavy load capacitor |
| CN112821875A (en) * | 2019-11-15 | 2021-05-18 | 北京兆易创新科技股份有限公司 | Amplifier circuit |
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- 2021-07-02 CN CN202110751393.XA patent/CN113419594B/en active Active
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| WO2002021682A1 (en) * | 2000-09-08 | 2002-03-14 | Neo Tek Research Co., Ltd | High gain low power op amp for driving the flat panel display |
| CN102035484A (en) * | 2009-09-29 | 2011-04-27 | 精工电子有限公司 | Differential amplifier |
| CN104253589A (en) * | 2013-06-27 | 2014-12-31 | 快捷半导体(苏州)有限公司 | Static current balance method, output stage circuit, AB type amplifier and electronic equipment |
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