CN111402741A

CN111402741A - Display panel and display device

Info

Publication number: CN111402741A
Application number: CN202010346077.XA
Authority: CN
Inventors: 马向文; 汪雅君; 敦栋梁; 夏志强; 周瑞渊
Original assignee: Wuhan Tianma Microelectronics Co Ltd
Current assignee: Wuhan Tianma Microelectronics Co Ltd
Priority date: 2020-04-27
Filing date: 2020-04-27
Publication date: 2020-07-10
Anticipated expiration: 2040-04-27
Also published as: CN111402741B

Abstract

The invention provides a display panel and a display device, wherein the display panel comprises a plurality of folding areas, each folding area comprises a display area, and each display area comprises a plurality of scanning lines; the plurality of fold regions includes a first region, a second region, a third region, a fourth region, a fifth region, a sixth region, a seventh region, an eighth region, a ninth region, a tenth region, and an eleventh region; the second region connects the first region with the third region, the fourth region connects the third region with the fifth region, the first region connects the sixth region with the ninth region, the third region connects the seventh region with the tenth region, and the fifth region connects the eighth region with the eleventh region; the second region comprises a first grid driving circuit which is electrically connected with the scanning lines in the first region, the second region and the third region; the fourth region includes a second gate driving circuit electrically connected to the scan lines in the third, fourth, and fifth regions. The invention realizes six-surface full-viewing-angle display of the display panel and the display device.

Description

Display panel and display device

Technical Field

The invention relates to the technical field of display, in particular to a display panel and a display device.

Background

With the development of scientific technology and the progress of society, people increasingly depend on the aspects of information communication and transmission, and display devices as main carriers and material bases for information exchange and transmission become hot spots of research of many scientists.

In recent years, display devices are expected to be applied to various applications, and are required to be diversified. For example, portable information terminals such as smart phones and tablet terminals having touch panels have been rapidly becoming thinner, higher in performance, and more versatile.

Disclosure of Invention

The invention provides a display panel and a display device, which are used for realizing six-side full-viewing-angle display of the display panel and the display device.

In a first aspect, an embodiment of the present invention provides a display panel, including a plurality of folding regions, where each folding region includes a display area, and each display area includes a plurality of scan lines; the plurality of fold regions comprises a first region, a second region, a third region, a fourth region, a fifth region, a sixth region, a seventh region, an eighth region, a ninth region, a tenth region, and an eleventh region;

the second region connects the first region and the third region, the fourth region connects the third region and the fifth region, the first region connects the sixth region and the ninth region, the third region connects the seventh region and the tenth region, and the fifth region connects the eighth region and the eleventh region;

the second region includes a first gate driving circuit electrically connected to the scan lines in the first, second, and third regions; the fourth region includes a second gate driving circuit electrically connected to the scan lines in the third, fourth, and fifth regions;

after the plurality of folding areas are folded to form a hexahedron, any surface of the hexahedron comprises at least one display area, the first area and the fifth area are located on the same surface of the hexahedron, the first area and the third area are located on two opposite surfaces of the hexahedron, and the second area and the fourth area are located on two opposite surfaces of the hexahedron; the sixth area, the seventh area and the eighth area are located on the same surface of the hexahedron, the ninth area, the tenth area and the eleventh area are located on the same surface of the hexahedron, and the ninth area and the sixth area are located on two opposite surfaces of the hexahedron.

In a second aspect, an embodiment of the present invention provides a display device, including the display panel of the first aspect, and a driving chip.

In the display panel provided by the embodiment of the invention, after the plurality of folding areas are folded to form the hexahedron, any surface of the hexahedron comprises at least one display area, so that the display panel can realize six-surface full-view display. On one hand, after the display panel is folded to form a hexahedron, the first gate driving circuit and the second gate driving circuit are respectively positioned on the left side surface and the right side surface of the hexahedron, so that the display panel does not occupy the display area of the top surface (namely the front surface) of the display panel, and full-screen display of the top surface can be realized. On the other hand, the first gate driving circuit drives the scanning lines in the first region and the scanning lines in the third region, and the first gate driving circuit is arranged in the second region between the first region and the third region instead of being arranged in the first region, so that the attenuation of scanning signals when the scanning lines are too long is avoided. Similarly, the second gate driving circuit drives the scanning lines in the third region and the scanning lines in the fifth region, and the second gate driving circuit is arranged in the fourth region between the third region and the fifth region instead of being arranged in the fifth region, so that the attenuation of scanning signals when the scanning lines are too long is avoided.

Drawings

Fig. 1 is a top view of a display panel according to an embodiment of the present invention in an unfolded state;

FIG. 2 is a folded perspective view of the display panel shown in FIG. 1;

FIG. 3 is an enlarged schematic view of the region S1 in FIG. 1;

fig. 4 is a schematic structural diagram of a gate driving circuit according to an embodiment of the invention;

FIG. 5 is a top view of another display panel according to an embodiment of the present invention in an unfolded state;

FIG. 6 is a folded state perspective view of the display panel shown in FIG. 5;

FIG. 7 is an enlarged schematic view of the area S2 in FIG. 5;

FIG. 8 is a top view of another display panel according to an embodiment of the present invention in an unfolded state;

FIG. 9 is a folded perspective view of the display panel shown in FIG. 8;

FIG. 10 is a top view of another display panel according to an embodiment of the present invention in an unfolded state;

FIG. 11 is a folded perspective view of the display panel shown in FIG. 10;

fig. 12 is an enlarged schematic view of the region S3 in fig. 10;

FIG. 13 is a top view of another display panel according to an embodiment of the present invention in an expanded state;

FIG. 14 is a folded state perspective view of the display panel shown in FIG. 13;

FIG. 15 is a top view of a display device according to an embodiment of the present invention in an expanded state;

fig. 16 is a folded perspective view of the display device shown in fig. 15.

Detailed Description

The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.

Fig. 1 is a top view of an unfolded state of a display panel according to an embodiment of the present invention, fig. 2 is a perspective view of a folded state of the display panel shown in fig. 1, and referring to fig. 1 and fig. 2, the display panel includes a plurality of folding AREAs AREA, it should be noted that, in order to distinguish the range of two adjacent folding AREAs AREA, a gap is provided between two adjacent folding AREAs AREA in fig. 1, actually, there is no gap between two adjacent folding AREAs AREA, and all folding AREAs AREA in an embodiment of the present invention form a whole, that is, the display panel provided in an embodiment of the present invention is a whole, and the display panel shown in fig. 1 is folded to form a hexahedron shown in fig. 2.

The folding AREA includes a display AREA AA including a plurality of scan lines 31. The plurality of folding regions AREA includes a first region 1, a second region 2, a third region 3, a fourth region 4, a fifth region 5, a sixth region 6, a seventh region 7, an eighth region 8, a ninth region 9, a tenth region 10, and an eleventh region 11. The second region 2 connects the first region 1 with the third region 3, the fourth region 4 connects the third region 3 with the fifth region 5, the first region 1 connects the sixth region 6 with the ninth region 9, the third region 3 connects the seventh region 7 with the tenth region 10, and the fifth region 5 connects the eighth region 8 with the eleventh region 11. The second region 2 includes a first gate driver circuit 21 electrically connected to the scan lines 31 in the first region 1, the second region 2, and the third region 3. The fourth region 4 includes the second gate driver circuit 22 electrically connected to the scan lines 31 in the third region 3, the fourth region 4, and the fifth region 5.

After the plurality of folding AREAs are folded to form the hexahedron, any surface of the hexahedron includes at least one display AREA AA. The first region 1 and the fifth region 5 are located on the same surface of the hexahedron, and the first region 1 and the third region 3 are located on two opposite surfaces of the hexahedron. The second region 2 and the fourth region 4 are located on two opposite surfaces of the hexahedron. The sixth region 6, the seventh region 7 and the eighth region 8 are located on the same surface of the hexahedron. The ninth zone 9, the tenth zone 10 and the eleventh zone 11 are located on the same surface of the hexahedron, the ninth zone 9 and the sixth zone 6 being located on two opposite surfaces of the hexahedron.

Illustratively, the first region 1 and the fifth region 5 are located on the bottom surface of the hexahedron, the third region 3 is located on the top surface of the hexahedron, the second region 2 is located on the left side surface of the hexahedron, the fourth region 4 is located on the right side surface of the hexahedron, the sixth region 6, the seventh region 7, and the eighth region 8 are located on the rear side surface of the hexahedron, and the ninth region 9, the tenth region 10, and the eleventh region 11 are located on the front side surface of the hexahedron.

In the display panel provided in the embodiment of the present invention, after the plurality of folding AREAs are folded to form the hexahedron, any surface of the hexahedron includes at least one display AREA AA, so that the display panel can realize six-sided full-view display, the display panel in the embodiment of the present invention further includes a first gate driving circuit 21 and a second gate driving circuit 22, on one hand, after the hexahedron is folded, the first gate driving circuit 21 and the second gate driving circuit 22 are respectively located on the left and right side surfaces of the hexahedron, so as not to occupy the display AREA of the top surface (i.e., the front surface) of the display panel, and can realize full-screen display of the top surface, on the other hand, the first gate driving circuit 21 drives both the scanning lines 31 in the first AREA 1 and the scanning lines 31 in the third AREA 3, the first gate driving circuit 21 is disposed in the second AREA 2 between the first AREA 1 and the third AREA 3, instead of disposing the first gate driving circuit 21 in the first AREA 1, and avoiding attenuation of the scanning signals when the scanning lines 21 are too long, similarly, the second gate driving circuit 22 is disposed in the third AREA 3, the second AREA 355, and the third AREA 3, and optionally disposing the third AREA 3, the third AREA is disposed in the third AREA 3, and the third AREA is disposed in the third AREA 3, and the third AREA of the second AREA of the AMO, and the third AREA, the third AREA 3, and the third AREA, the third AREA of the third AREA, the.

Fig. 3 is an enlarged structural schematic diagram of a region S1 in fig. 1, and referring to fig. 1, 2 and 3, the sixth region 6, the eighth region 8, the ninth region 9 and the eleventh region 11 all include the third gate driving circuit 23. In the same folding AREA, the third gate driver circuit 23 is electrically connected to the scanning line 31. The third gate driver circuit 23 in the sixth region 6 is electrically connected to drive the scan line 31 in the sixth region 6, the third gate driver circuit 23 in the eighth region 8 is electrically connected to the scan line 31 in the eighth region 8, the third gate driver circuit 23 in the ninth region 9 is electrically connected to the scan line 31 in the ninth region 9, and the third gate driver circuit 23 in the eleventh region 11 is electrically connected to the scan line 31 in the eleventh region 11. The seventh region 7 and the tenth region 10 each include the fourth gate driving circuit 24, and in the same folding region AREA, the fourth gate driving circuit 24 is electrically connected to the scanning line 31. The fourth gate driver circuit 24 in the seventh region 7 is electrically connected to the scan line 31 in the seventh region 7, and the fourth gate driver circuit 24 in the tenth region 10 is electrically connected to the scan line 31 in the tenth region 10.

In other embodiments, the third gate driving circuit 23 may not be disposed in the sixth, eighth, ninth, and

eleventh regions

6, 8, 9, and 11, and the fourth gate driving circuit 24 may not be disposed in the seventh and

tenth regions

7, 10, and the first gate driving circuit 21 may be electrically connected to the scanning lines 31 in the sixth and

ninth regions

6, 9, the first gate driving circuit 21 may be electrically connected to a portion of the scanning lines 31 in the seventh region 7, and the first gate driving circuit 21 may be electrically connected to a portion of the scanning lines 31 in the tenth region 10, the second gate driving circuit 22 may be electrically connected to the scanning lines 31 in the eighth and

eleventh regions

8, 11, the second gate driving circuit 22 may be electrically connected to another portion of the scanning lines 31 in the seventh region 7, and the second gate driving circuit 22 may be electrically connected to another portion of the scanning lines 31 in the tenth region 10.

Alternatively, referring to fig. 1, 2, and 3, the sixth, seventh, eighth, ninth, tenth, and

eleventh regions

6, 7, 8, 9, 10, and 11 each include a plurality of patch cords 33 that are different in layer from the plurality of scan lines 31. In the same folding AREA, the extending direction of the third gate driver circuit 23 is parallel to the extending direction of the scanning line 31, and the third gate driver circuit 23 is electrically connected to the scanning line 31 through the transfer line 33. That is, the third gate driving circuit 23 in the sixth region 6 and the scanning line 31 in the sixth region 6 have the same extending direction, and the third gate driving circuit 23 and the scanning line 31 in the sixth region 6 are electrically connected through the transfer line 33. The third gate driving circuit 23 in the eighth region 8 has the same extending direction as the scanning line 31 in the eighth region 8, and the third gate driving circuit 23 and the scanning line 31 in the eighth region 8 are electrically connected through a transfer line 33. The third gate driving circuit 23 in the ninth region 9 has the same extending direction as the scanning line 31 in the ninth region 9, and the third gate driving circuit 23 and the scanning line 31 in the ninth region 9 are electrically connected by a transfer line 33. The third gate driving circuit 23 in the eleventh region 11 has the same extending direction as the scanning line 31 in the eleventh region 11, and the third gate driving circuit 23 and the scanning line 31 in the eleventh region 11 are electrically connected by a transfer line 33. In the same folding AREA, the extending direction of the fourth gate driving circuit 24 is parallel to the extending direction of the scanning line 31, and the fourth gate driving circuit 24 is electrically connected to the scanning line 31 through the transfer line 33. That is, the fourth gate driving circuit 24 in the seventh region 7 and the scanning line 31 in the seventh region 7 have the same extending direction, and the fourth gate driving circuit 24 and the scanning line 31 in the seventh region 7 are electrically connected through the transfer line 33. The fourth gate driving circuit 24 in the tenth region 10 has the same extending direction as the scanning line 31 in the tenth region 10, and the fourth gate driving circuit 24 and the scanning line 31 in the tenth region 10 are electrically connected through a transfer line 33.

Referring to fig. 1 and 2, the sum of the widths of the first region 1 and the fifth region 5 is smaller than the width of the third region 3, in the embodiment of the present invention, the sum of the widths of the first region 1 and the fifth region 5 is smaller than the width of the third region 3, and therefore, after the plurality of folding regions are folded to form a hexahedron, a second blank region B L ANK2 is provided between the first region 1 and the fifth region 5, and a rear camera or the like may be provided in the second blank region B L ANK2, for example.

Illustratively, referring to fig. 1 and 2, the third gate driving circuit 23 in the sixth AREA 6 and the display AREA AA in the sixth AREA 6 have the same width, the third gate driving circuit 23 in the eighth AREA 8 and the display AREA AA in the eighth AREA 8 have the same width, the third gate driving circuit 23 in the ninth AREA 9 and the display AREA AA in the ninth AREA 9 have the same width, the third gate driving circuit 23 in the eleventh AREA 11 and the display AREA AA in the eleventh AREA 11 have the same width, the fourth gate driving circuit 24 in the seventh AREA 7 and the display AREA AA in the seventh AREA 7 have the same width, the fourth gate driving circuit 24 in the tenth AREA 10 and the display AREA AA in the tenth AREA 10 have the same width, all the third gate driving circuits 23 have the same width along the extending direction of the scanning line 31, the third gate driving circuit 23, the display AREA AA in the first AREA 1 and the fifth AREA 5 have the same width, the third gate driving circuit 23, the fourth gate driving circuit 24 in the first AREA 1 and the display AREA AA in the fifth AREA 5 have the same width, the same width along the extending direction of the scanning line 31, and the third gate driving circuit 23, the fourth gate driving circuit may be disposed between the third gate driving circuit, the fourth gate driving circuit 35, the fourth gate driving circuit may be disposed between the fourth gate driving circuit 35, the fourth gate driving AREA, the fourth gate driving circuit, the fourth gate driving AREA 12, the fourth gate driving circuit, the fifth AREA 12, the fourth gate driving AREA, the fourth.

Alternatively, referring to fig. 1, 2 and 3, the second region 2 includes a first sub-display region a1 and a second sub-display region a2, and the first sub-display region a1 and the second sub-display region a2 are respectively located at both sides of the first gate driving circuit 21 along the extending direction of the scan line 31. The fourth region 4 includes a third sub-display region A3 and a fourth sub-display region a4, and the third sub-display region A3 and the fourth sub-display region a4 are respectively located at both sides of the second gate driving circuit 22 along the extending direction of the scan line 31. In any one of the sixth AREA 6 and the ninth AREA 9, the third gate driving circuit 23 is located on a side of the display AREA AA away from the first AREA 1 in the same folding AREA. That is, the third gate driving circuit 23 in the sixth area 6 is located on the side of the display area AA in the sixth area 6 away from the first area 1, and the third gate driving circuit 23 in the ninth area 9 is located on the side of the display area AA in the ninth area 9 away from the first area 1. In any one of the seventh AREA 7 and the tenth AREA 10, the fourth gate driving circuit 24 is located on a side of the display AREA AA away from the third AREA 3 in the same folding AREA. That is, the fourth gate driving circuit 24 in the seventh area 7 is located on the side of the display area AA in the seventh area 7 away from the third area 3, and the fourth gate driving circuit 24 in the tenth area 10 is located on the side of the display area AA in the tenth area 10 away from the third area 3. In any one of the eighth and

eleventh regions

8 and 11, the third gate driving circuit 23 is located on a side of the display AREA AA away from the fifth region 5 in the same folding region AREA. That is, the third gate driving circuit 23 in the eighth area 8 is located at a side of the display area AA in the eighth area 8 away from the fifth area 5, and the third gate driving circuit 23 in the eleventh area 11 is located at a side of the display area AA in the eleventh area 11 away from the fifth area 5. After the plurality of folding regions are folded to form a hexahedron, the first gate driving circuit 21, the second gate driving circuit 22, the four third gate driving circuits 23, and the two fourth gate driving circuits 24 are spliced to form a first continuous pattern 41, and the first continuous pattern 41 surrounds four sides of the hexahedron. In the embodiment of the present invention, after the plurality of folding AREAs are folded to form the hexahedron, the gate driving circuit (for example, the first gate driving circuit 21) that does not perform light emitting display forms the first continuous pattern 41, and the first continuous pattern 41 surrounds a circumference of four sides of the hexahedron, so that a circle of black edges is displayed in the hexahedron, thereby increasing the aesthetic feeling of the streamline of the display panel.

Exemplarily, referring to fig. 1 and 2, the first sub-display AREA a1 and the second sub-display AREA a2 are symmetrical with respect to the first gate driving circuit 21, and the third sub-display AREA A3 and the fourth sub-display AREA a4 are symmetrical with respect to the second gate driving circuit 22, so that after the plurality of folding AREAs are folded to form a hexahedron, the first continuous graphic 41 is located at a center position of a side of the hexahedron, further increasing the streamline aesthetic sense of the display panel.

Alternatively, referring to fig. 1, 2 and 3, the first gate driving circuit 21 includes a first sub-gate driving circuit 211 and a second sub-gate driving circuit 212 arranged along the extending direction of the scanning line 31, and the extending directions of the first sub-gate driving circuit 211 and the second sub-gate driving circuit 212 each intersect with the extending direction of the scanning line 31. The second gate driving circuit 22 includes a third sub-gate driving circuit 221 and a fourth sub-gate driving circuit 222 arranged along the extending direction of the scanning line 31, and the extending directions of the third sub-gate driving circuit 221 and the fourth sub-gate driving circuit 222 both intersect with the extending direction of the scanning line 31. The first sub-gate driving circuit 211, the second sub-gate driving circuit 212, the third sub-gate driving circuit 221, the fourth sub-gate driving circuit 222, the third gate driving circuit 23, and the fourth gate driving circuit 24 each include a row of cascaded shift registers 20. In the embodiment of the present invention, each of the third gate driving circuit 23 and the fourth gate driving circuit 24 includes one row of cascaded shift registers 20, and each of the first gate driving circuit 21 and the second gate driving circuit 22 includes two rows of cascaded shift registers 20. After the plurality of folding AREAs are folded to form a hexahedron, the third gate driving circuit 23 and the fourth gate driving circuit 24 are butted to form two rows of cascaded shift registers 20. Therefore, the width of the occupied area of the third gate driving circuit 23 and the fourth gate driving circuit 24 in the direction perpendicular to the extending direction of the scanning line 31 is equal to the width of the first gate driving circuit 21 and the second gate driving circuit 22, and the first continuous patterns 41 have uniform thickness on the four sides of the hexahedron, thereby further increasing the streamline aesthetic feeling of the display panel. The width of the area occupied by the third gate driver circuit 23 and the fourth gate driver circuit 24 means a distance perpendicular to the direction in which the area occupied by the third gate driver circuit 23 and the fourth gate driver circuit 24 extends.

Alternatively, referring to fig. 1 and 3, the display area AA includes a plurality of sub-pixel pixels. The second region 2 includes a first sub-display region a1 and a second sub-display region a2, the first sub-gate driving circuit 211 is positioned between the first sub-display region a1 and the second sub-gate driving circuit 212, and the second sub-gate driving circuit 212 is positioned between the first sub-gate driving circuit 211 and the second sub-display region a 2. The fourth region 4 includes a third sub-display region A3 and a fourth sub-display region a4, the third sub-gate driving circuit 221 is located between the third sub-display region A3 and the fourth sub-gate driving circuit 222, and the fourth sub-gate driving circuit 222 is located between the third sub-gate driving circuit 221 and the fourth sub-display region a 4. Along the extending direction of the scan line 31, the plurality of sub-pixel pixels in the first area 1 and the first sub-display area a1 share the same scan line 31, that is, the plurality of sub-pixel pixels in the first area 1 and the first sub-display area a1 are electrically connected to the same scan line 31. The plurality of sub-pixel pixels in the second, third, and third sub-display regions a2, A3, and A3 share the same scan line 31, that is, the plurality of sub-pixel pixels in the second, third, and third sub-display regions a2, A3, and A3 are electrically connected to the same scan line 31. The fourth sub-display area a4 and the plurality of sub-pixel pixels in the fifth area 5 share the same scan line 31, that is, the fourth sub-display area a4 and the plurality of sub-pixel pixels in the fifth area 5 are electrically connected to the same scan line 31.

Exemplarily, referring to fig. 1 and 3, the same scan line 31 in the first region 1 and the first sub display area a1 is electrically connected to the first sub gate driving circuit 211. The same scanning line 31 in the fourth sub-display area a4 and the fifth area 5 is electrically connected to the fourth sub-gate driving circuit 222. The same scan line 31 in the second sub-display area a2, the third area 3, and the third sub-display area A3 is electrically connected to both the second sub-gate driving circuit 212 and the third sub-gate driving circuit 221. Since the sum of the widths of the first region 1 and the fifth region 5 is less than or equal to the width of the third region 3, the single-side driving is applied to the same scan line 31 in the first region 1 and the first sub-display region a1, the single-side driving is applied to the same scan line 31 in the fourth sub-display region a4 and the fifth region 5, and the double-side driving is applied to the same scan line 31 in the second sub-display region a2, the third region 3, and the third sub-display region A3, so that the single-side driving is applied to the scan line 31 with the shorter length, the double-side driving is applied to the scan line 31 with the longer length, and the attenuation of the scan signal when the scan line 31 is too long is avoided.

Exemplarily, referring to fig. 1 and 3, one scan line 31 in the sixth region 6 is electrically connected to an output terminal of one shift register 20 of the third gate driving circuit 23, one scan line 3 in the eighth region 8 is electrically connected to an output terminal of one shift register 20 of the third gate driving circuit 23, and one scan line 3 in the seventh region 7 is electrically connected to output terminals of two shift registers 20 of the fourth gate driving circuit 24, so that the scan line 31 with the shorter length is driven by a single side, and the scan line 31 with the longer length is driven by two shift registers 20 (similar to the double side drive), thereby avoiding attenuation of the scan signal when the scan line 31 is too long. The electrical connection between the scan lines and the shift register 20 in the ninth region 9, the tenth region 10 and the eleventh region 11 is similar to the electrical connection in the sixth region 6, the seventh region 7 and the eighth region 8, and is not described again here.

Alternatively, referring to fig. 1, 2 and 3, the first gate driving circuit 21 includes a first sub-gate driving circuit 211 and a second sub-gate driving circuit 212 arranged along the extending direction of the scanning line 31, and the second gate driving circuit 22 includes a third sub-gate driving circuit 221 and a fourth sub-gate driving circuit 222 arranged along the extending direction of the scanning line 31. A first terminal of the first sub-gate driving circuit 211 is cascaded with the third gate driving circuit 23 in the sixth region 6, and a second terminal of the first sub-gate driving circuit 211 is cascaded with the third gate driving circuit 23 in the ninth region 9. A first terminal of the second sub-gate driving circuit 212 is cascaded with the first terminal of the fourth gate driving circuit 24 in the seventh region 7, and a second terminal of the second sub-gate driving circuit 212 is cascaded with the first terminal of the fourth gate driving circuit 24 in the tenth region 10. A first terminal of the third sub-gate driving circuit 221 is cascaded with the second terminal of the fourth gate driving circuit 24 in the seventh region 7, and a second terminal of the third sub-gate driving circuit 221 is cascaded with the second terminal of the fourth gate driving circuit 24 in the tenth region 10. A first terminal of the fourth sub-gate driving circuit 222 is cascade-connected to the third gate driving circuit 23 in the eighth region 8, and a second terminal of the fourth sub-gate driving circuit 222 is cascade-connected to the third gate driving circuit 23 in the eleventh region 11.

Illustratively, the display panel further includes a cascade line 34, and two shift registers 20 in the same gate driving circuit (e.g., the third gate driving circuit 23) are cascaded by the cascade line 34. Two shift registers 20 in different gate drive circuits (e.g., the third gate drive circuit 23 and the first sub-gate drive circuit 211) are cascaded by a cascade line 34.

Fig. 4 is a schematic structural diagram of a gate driving circuit according to an embodiment of the invention, and referring to fig. 4, the gate driving circuit (e.g., the third gate driving circuit 23) includes an input signal line S, a first clock signal line CK, and a second clock signal line CKB. The odd-numbered shift registers, such as the first-stage shift register a1 and the third-stage shift register, have a first clock signal terminal CK1 electrically connected to the first clock signal line CK, and a second clock signal terminal CK2 electrically connected to the second clock signal line CKB. The even-numbered stages of shift registers, such as the second stage shift register a2 and the fourth stage shift register, have the first clock signal terminal CK1 electrically connected to the second clock signal line CKB, and the second clock signal terminal CK2 electrically connected to the first clock signal line CK. AN input signal terminal IN of the first-stage shift register A1 is electrically connected to AN input signal line S, AN input signal terminal of the second-stage shift register A2 is electrically connected to AN output terminal GOUT1 of the first-stage shift register A1, that is, AN input signal terminal IN of the Nth-stage shift register AN-1 is electrically connected to AN output terminal GOUTN-1 of the N-1 th-stage shift register AN-1. And the signal output by the output end of the shift register of the previous stage is used as the input signal of the shift register of the next stage to form shift output.

Alternatively, referring to fig. 1 and 3, the display area AA includes a plurality of sub-pixel pixels. The display panel includes a plurality of data lines 32, and the plurality of data lines 32 are insulated from and cross the plurality of scan lines 31. Along the extending direction of the data line 32, the plurality of sub-pixel pixels in the first region 1, the sixth region 6, and the ninth region 9 share the same data line 32, that is, the plurality of sub-pixel pixels in the first region 1, the sixth region 6, and the ninth region 9 are electrically connected to the same data line 32. The plurality of sub-pixel pixels in the third, seventh and

tenth regions

3, 7 and 10 share the same data line 32, i.e., the plurality of sub-pixel pixels in the third, seventh and

tenth regions

3, 7 and 10 are electrically connected to the same data line 32. The plurality of sub-pixel pixels in the fifth, eighth, and

eleventh regions

5, 8, and 11 share the same data line 32, i.e., the plurality of sub-pixel pixels in the fifth, eighth, and

eleventh regions

5, 8, and 11 are electrically connected to the same data line 32.

Exemplarily, referring to fig. 3, a plurality of sub-pixel pixels in the second area 2 are electrically connected to the same data line 32, and a plurality of sub-pixel pixels in the fourth area 4 are electrically connected to the same data line 32.

Fig. 5 is a top view of another display panel according to an embodiment of the present invention in an unfolded state, fig. 6 is a perspective view of a folded state of the display panel shown in fig. 5, fig. 7 is an enlarged structural schematic diagram of a region S2 in fig. 5, and referring to fig. 5, fig. 6 and fig. 7, in any one of a sixth region 6, an eighth region 8, a ninth region 9 and an eleventh region 11, along an extending direction of a scan line 31, a width of a third gate driving circuit 23 is greater than a width of a display AREA AA in the same folded region AREA. That is, the width of the third gate driving circuit 23 in the sixth area 6 is greater than the width of the display area AA in the sixth area 6, the width of the third gate driving circuit 23 in the eighth area 8 is greater than the width of the display area AA in the eighth area 8, the width of the third gate driving circuit 23 in the ninth area 9 is greater than the width of the display area AA in the ninth area 9, and the width of the third gate driving circuit 23 in the eleventh area 11 is greater than the width of the display area AA in the eleventh area 11. In the seventh AREA 7 and the tenth AREA 10, the fourth gate driving circuit 24 and the display AREA AA in the same folding AREA have the same width. That is, the width of the fourth gate driving circuit 24 in the seventh area 7 is equal to the width of the display area AA in the seventh area 7, and the width of the fourth gate driving circuit 24 in the tenth area 10 is equal to the width of the display area AA in the tenth area 10. Wherein the sum of the widths of the two third gate driving circuits 23 is equal to the width of one fourth gate driving circuit 24. In the embodiment of the present invention, the sum of the widths of the two third gate driving circuits 23 is equal to the width of one fourth gate driving circuit 24, so that after the plurality of folding AREAs are folded to form a hexahedron, the two third gate driving circuits 23 located on the same surface of the hexahedron are butted, thereby further increasing the streamline aesthetic feeling of the display panel.

Fig. 8 is a top view of another display panel according to an embodiment of the present invention in an unfolded state, fig. 9 is a perspective view of the display panel shown in fig. 8 in a folded state, and referring to fig. 8 and fig. 9, the first gate driving circuit 21, the second gate driving circuit 22, and the fourth gate driving circuit 24 are all adjacent to the third region 3. That is, the first gate driving circuit 21 in the second area 2 is located between the display area AA and the third area 3 in the second area 2, the second gate driving circuit 22 in the fourth area 4 is located between the display area AA and the third area 3 in the fourth area 4, the fourth gate driving circuit 24 in the seventh area 7 is located between the display area AA and the third area 3 in the seventh area 7, and the fourth gate driving circuit 24 in the tenth area 10 is located between the display area AA and the third area 3 in the tenth area. The third gate drive circuits 23 in the sixth region 6 and the ninth region 9 are both adjacent to the first region 1. That is, the third gate driving circuit 23 in the sixth area 6 is located between the display area AA and the first area 1 in the sixth area 6, and the third gate driving circuit 23 in the ninth area 9 is located between the display area AA and the first area 1 in the ninth area 9. The third gate driver circuits 23 in the eighth region 8 and the eleventh region 11 are both adjacent to the fifth region 5. That is, the third gate driving circuit 23 in the eighth area 8 is located between the display area AA and the fifth area 5 in the eighth area 8, and the third gate driving circuit 23 in the eleventh area 11 is located between the display area AA and the fifth area 5 in the eleventh area 11. After the plurality of folding regions are folded to form a hexahedron, the first gate driving circuit 21, the second gate driving circuit 22, and the two fourth gate driving circuits 24 are spliced to form a second continuous pattern 42, and the second continuous pattern 42 surrounds four sides of the hexahedron. In the embodiment of the present invention, after the plurality of folding AREAs are folded to form the hexahedron, the gate driving circuit (for example, the first gate driving circuit 21) that does not perform light emitting display forms the second continuous pattern 42, and the second continuous pattern 42 surrounds a circumference of four sides of the hexahedron, so that a circle of black edges is displayed in the hexahedron, and the streamline aesthetic feeling of the display panel is increased.

Illustratively, referring to fig. 8 and 9, after the plurality of folding AREAs are folded to form the hexahedron, in addition to forming the second continuous pattern 42, non-display AREAs (e.g., AREAs where four third gate driving circuits 23 are located) separated from the second continuous pattern 42 are formed on the front and rear sides of the hexahedron.

Fig. 10 is a top view of another display panel according to an embodiment of the present invention in an unfolded state, fig. 11 is a perspective view of the display panel shown in fig. 10 in a folded state, fig. 12 is an enlarged structural schematic diagram of a region S3 in fig. 10, and referring to fig. 10, fig. 11 and fig. 12, in the same folding region AREA, an extending direction of the third gate driving circuit 23 intersects with an extending direction of the scanning line 31, and an extending direction of the fourth gate driving circuit 24 intersects with an extending direction of the scanning line 31. In the embodiment of the present invention, the patch cord 33 is not required to be disposed in the sixth region 6, the eighth region 8, the ninth region 9 and the eleventh region 11, and the scan line 31 may be directly electrically connected to the third gate driving circuit 23. The patch cord 33 need not be provided in the seventh and

tenth regions

7 and 10, and the scan line 31 may be directly electrically connected to the fourth gate driving circuit 24.

Alternatively, referring to fig. 10, 11 and 12, the first gate driving circuit 21 includes a first sub-gate driving circuit 211 and a second sub-gate driving circuit 212 arranged along the extending direction of the scan line 31, and the second gate driving circuit 22 includes a third sub-gate driving circuit 221 and a fourth sub-gate driving circuit 222 arranged along the extending direction of the scan line 31 (due to the limitation of the space of the drawing, the third sub-gate driving circuit 221 and the fourth sub-gate driving circuit 222 are not shown in fig. 12, please refer to fig. 3 in conjunction with the arrangement of the third sub-gate driving circuit 221 and the fourth sub-gate driving circuit 222). The two fourth gate driving circuits 24 in the seventh region 7 are a fifth sub-gate driving circuit 241 and a sixth sub-gate driving circuit 242, respectively. The two fourth gate driving circuits 24 in the tenth region 10 are a seventh sub-gate driving circuit 243 and an eighth sub-gate driving circuit 244, respectively. A first terminal of the first sub-gate driving circuit 211 is cascaded with the third gate driving circuit 23 in the sixth region 6, and a second terminal of the first sub-gate driving circuit 211 is cascaded with the third gate driving circuit 23 in the ninth region 9. A first terminal of the second sub-gate driving circuit 212 is cascaded with the fifth sub-gate driving circuit 241, and a second terminal of the second sub-gate driving circuit 212 is cascaded with the seventh sub-gate driving circuit 243. A first terminal of the third sub-gate driving circuit 221 is cascade-connected to the sixth sub-gate driving circuit 242, and a second terminal of the third sub-gate driving circuit 221 is cascade-connected to the eighth sub-gate driving circuit 244. A first terminal of the fourth sub-gate driving circuit 222 is cascade-connected to the third gate driving circuit 23 in the eighth region 8, and a second terminal of the fourth sub-gate driving circuit 222 is cascade-connected to the third gate driving circuit 23 in the eleventh region 11.

Fig. 13 is a top view of another display panel according to an embodiment of the present invention in an unfolded state, fig. 14 is a perspective view of a folded state of the display panel shown in fig. 13, and referring to fig. 13 and 14, a first region 1 includes a first sub-region 1a and a second sub-region 1B, the first sub-region 1a connects the second sub-region 1B with a sixth region 6, a fifth region 5 includes a third sub-region 5a and a fourth sub-region 5B, the third sub-region 5a connects the fourth sub-region 5B with an eighth region 8, along an extending direction of a scan line 31, a display region AA in the first sub-region 1a, a display region AA in the third sub-region 5a, a display region AA in the sixth region 6, a display region AA in the eighth region 8, a display region AA in the ninth region 9 and a display region AA in the eleventh region 11 have the same width, and a sum of widths of the first sub-region 1a and the third sub-region 5a is smaller than a width of the third region 3, a sum of widths of the second sub-region 1B and the fourth sub-region 355B is equal to a width of a third sub-region 355B 3, a third sub-a-5B 3, a-a folding sub-5B is connected to a third sub-5B-region L, a-B is connected to a-B, and a-B, and a-B is connected to a-B, and a-B is connected to a third sub-B, and a third sub.

Fig. 15 is a plan view showing an unfolded state of a display device according to an embodiment of the present invention, and fig. 16 is a perspective view showing a folded state of the display device shown in fig. 15, and referring to fig. 15 and 16, a cascade line is omitted in fig. 15. The display device includes the display panel and the driving chip IC in the above embodiments. Since the display device in the embodiment of the present invention includes the display panel in the above embodiment, the display device can realize six-sided full-view display.

Alternatively, referring to fig. 15 and 16, the display device includes at least three driving chip ICs including a first driving chip IC1, a second driving chip IC2, and a third driving chip IC 3. The display panel includes a plurality of data lines 32, and the plurality of data lines 32 are insulated from and cross the plurality of scan lines 31. The first driving chip IC1 is electrically connected to the plurality of data lines 32 in the first, sixth, and

ninth regions

1, 6, and 9. The second driving chip IC2 is electrically connected to the plurality of data lines 32 in the third, seventh and

tenth regions

3, 7 and 10. The third driver chip IC3 is electrically connected to the plurality of data lines 32 in the fifth, eighth, and

eleventh regions

5, 8, and 11. In the embodiment of the invention, at least three driving chips IC respectively drive the data lines 32 in different folding AREAs AREA, thereby reducing the requirement on the driving capability of the driving chips IC. In other embodiments, all the data lines 32 may also be driven by one driving chip IC.

Exemplarily, referring to fig. 15 and 16, the second region 2 includes a first sub-display region a1 and a second sub-display region a2, and the first sub-display region a1 and the second sub-display region a2 are respectively located at both sides of the first gate driving circuit 21 along the extending direction of the scan line 31. The fourth region 4 includes a third sub-display region A3 and a fourth sub-display region a4, and the third sub-display region A3 and the fourth sub-display region a4 are respectively located at both sides of the second gate driving circuit 22 along the extending direction of the scan line 31. The first driving chip IC1 is also electrically connected to the plurality of data lines 32 in the first sub-display area a1, the second driving chip IC2 is also electrically connected to the plurality of data lines 32 in the second sub-display area a2 and the third sub-display area A3, and the third driving chip IC3 is also electrically connected to the plurality of data lines 32 in the fourth sub-display area a 4.

In other embodiments, when the display panel shown in fig. 8 is driven, both the first gate driving circuit 21 and the second gate driving circuit 22 are adjacent to the third region 3. The display area AA in the second area 2 is located between the first gate driving circuit 21 and the first area 1. The display area AA in the fourth area 4 is located between the second gate driving circuit 22 and the fifth area 5. The first driver chip IC1 may also be electrically connected to the plurality of data lines 32 in the second area 2. The third driver chip IC3 may also be electrically connected to the plurality of data lines 32 in the fourth area 4.

Alternatively, referring to fig. 15 and 16, after the plurality of folding AREAs AREA of the display panel are folded to form a hexahedron, at least three driving chips IC are located inside the hexahedron. In the embodiment of the invention, the driving chip IC is arranged in the hexahedron, so that the driving chip IC is prevented from occupying the outer side surface of the hexahedron, namely the driving chip IC is prevented from occupying the display area of the display device, and the display area of the display device is enlarged.

It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A display panel comprising a plurality of folding regions, the folding regions comprising a display area, the display area comprising a plurality of scan lines; the plurality of fold regions comprises a first region, a second region, a third region, a fourth region, a fifth region, a sixth region, a seventh region, an eighth region, a ninth region, a tenth region, and an eleventh region;

2. The display panel according to claim 1, wherein the sixth region, the eighth region, the ninth region, and the eleventh region each include a third gate driver circuit; in the same folding region, the third gate driving circuit is electrically connected with the scanning line;

the seventh region and the tenth region each include a fourth gate driving circuit; in the same folding region, the fourth gate driving circuit is electrically connected to the scan line.

3. The display panel according to claim 2, wherein the sixth region, the seventh region, the eighth region, the ninth region, the tenth region, and the eleventh region each include a plurality of patch cords that are different in layer from the plurality of scan lines;

in the same folding region, the extending direction of the third gate driving circuit is parallel to the extending direction of the scanning line, and the third gate driving circuit is electrically connected with the scanning line through the switching line;

in the same folding region, the extending direction of the fourth gate driving circuit is parallel to the extending direction of the scanning line, and the fourth gate driving circuit is electrically connected with the scanning line through the transfer line.

4. The display panel according to claim 3, wherein the sum of the widths of the first region and the fifth region is smaller than the width of the third region.

5. The display panel according to claim 3, wherein in any one of the sixth region, the eighth region, the ninth region, and the eleventh region, a width of the third gate driver circuit is larger than a width of a display region in the same folding region in an extending direction of the scan line;

in the seventh region and the tenth region, the fourth gate driving circuit and a display region in the same folding region have the same width;

the sum of the widths of the two third gate driving circuits is equal to the width of one fourth gate driving circuit.

6. The display panel according to claim 4 or 5, wherein the second region includes a first sub-display region and a second sub-display region, and the first sub-display region and the second sub-display region are respectively located at two sides of the first gate driving circuit along the extending direction of the scan line;

the fourth area comprises a third sub-display area and a fourth sub-display area, and the third sub-display area and the fourth sub-display area are respectively positioned at two sides of the second gate drive circuit along the extension direction of the scanning line;

in any one of the sixth region and the ninth region, the third gate driving circuit is located on a side of the display region away from the first region in the same folding region;

in any one of the seventh area and the tenth area, the fourth gate driving circuit is located on a side of the display region away from the third area in the same folding area;

in any one of the eighth region and the eleventh region, the third gate driving circuit is located on a side of the display region away from the fifth region in the same folding region;

after the plurality of folding regions are folded to form a hexahedron, the first gate drive circuit, the second gate drive circuit, the four third gate drive circuits and the two fourth gate drive circuits are spliced to form a first continuous graph, and the first continuous graph surrounds the four sides of the hexahedron for a circle.

7. The display panel according to claim 4 or 5, wherein the first gate driver circuit, the second gate driver circuit, and the fourth gate driver circuit are adjacent to the third region;

third gate driver circuits in the sixth and ninth regions are both adjacent to the first region; third gate driver circuits in the eighth region and the eleventh region are both adjacent to the fifth region;

after the plurality of folding regions are folded to form a hexahedron, the first gate drive circuit, the second gate drive circuit and the two fourth gate drive circuits are spliced to form a second continuous graph, and the second continuous graph surrounds the periphery of four side faces of the hexahedron.

8. The display panel according to claim 2, wherein the first gate driving circuit includes a first sub-gate driving circuit and a second sub-gate driving circuit arranged along the extending direction of the scanning lines, and the second gate driving circuit includes a third sub-gate driving circuit and a fourth sub-gate driving circuit arranged along the extending direction of the scanning lines;

the first sub-gate driving circuit, the second sub-gate driving circuit, the third sub-gate driving circuit, the fourth sub-gate driving circuit, the third gate driving circuit and the fourth gate driving circuit all comprise a row of cascaded shift registers.

9. The display panel according to claim 2, wherein an extending direction of the third gate driver circuit intersects an extending direction of the scan line, and an extending direction of the fourth gate driver circuit intersects an extending direction of the scan line in the same folding region.

10. The display panel according to claim 1, wherein the first region includes a first sub-region and a second sub-region, and the first sub-region connects the second sub-region and the sixth region; the fifth region comprises a third sub-region and a fourth sub-region, and the third sub-region connects the fourth sub-region and the eighth region;

along the extending direction of the scanning line, the display area in the first sub-area, the display area in the third sub-area, the display area in the sixth area, the display area in the eighth area, the display area in the ninth area and the display area in the eleventh area have the same width, the sum of the widths of the first sub-area and the third sub-area is smaller than the width of the third area, and the sum of the widths of the second sub-area and the fourth sub-area is equal to the width of the third area.

11. The display panel according to claim 1, wherein the display area includes a plurality of sub-pixels;

the display panel comprises a plurality of data lines, and the data lines and the scanning lines are arranged in an insulated and crossed manner;

in an extending direction of the data line, the plurality of sub-pixels in the first, sixth, and ninth regions share the same data line, the plurality of sub-pixels in the third, seventh, and tenth regions share the same data line, and the plurality of sub-pixels in the fifth, eighth, and eleventh regions share the same data line.

12. The display panel according to claim 8, wherein the display region includes a plurality of sub-pixels;

the second area comprises a first sub-display area and a second sub-display area, the first sub-gate driving circuit is positioned between the first sub-display area and the second sub-gate driving circuit, and the second sub-gate driving circuit is positioned between the first sub-gate driving circuit and the second sub-display area;

the fourth area comprises a third sub-display area and a fourth sub-display area, the third sub-gate driving circuit is positioned between the third sub-display area and the fourth sub-gate driving circuit, and the fourth sub-gate driving circuit is positioned between the third sub-gate driving circuit and the fourth sub-display area;

along the extending direction of the scanning line, the plurality of sub-pixels in the first area and the first sub-display area share the same scanning line; a plurality of sub-pixels in the second sub-display area, the third area and the third sub-display area share the same scanning line; the sub-pixels in the fourth sub-display area and the fifth area share the same scanning line.

13. The display panel according to claim 3, wherein the first gate driving circuit comprises a first sub-gate driving circuit and a second sub-gate driving circuit arranged along the extending direction of the scanning lines, and the second gate driving circuit comprises a third sub-gate driving circuit and a fourth sub-gate driving circuit arranged along the extending direction of the scanning lines;

a first terminal of the first sub-gate driving circuit is cascaded with the third gate driving circuit in the sixth region, and a second terminal of the first sub-gate driving circuit is cascaded with the third gate driving circuit in the ninth region;

a first terminal of the second sub-gate driving circuit is cascaded with a first terminal of the fourth gate driving circuit in the seventh region, and a second terminal of the second sub-gate driving circuit is cascaded with a first terminal of the fourth gate driving circuit in the tenth region;

a first terminal of the third sub-gate driving circuit is cascaded with a second terminal of the fourth gate driving circuit in the seventh region, and a second terminal of the third sub-gate driving circuit is cascaded with a second terminal of the fourth gate driving circuit in the tenth region;

a first end of the fourth sub-gate driving circuit is cascaded with the third gate driving circuit in the eighth region, and a second end of the fourth sub-gate driving circuit is cascaded with the third gate driving circuit in the eleventh region.

14. The display panel according to claim 9, wherein the first gate driving circuit includes a first sub-gate driving circuit and a second sub-gate driving circuit arranged along the extending direction of the scanning lines, and the second gate driving circuit includes a third sub-gate driving circuit and a fourth sub-gate driving circuit arranged along the extending direction of the scanning lines;

the two fourth gate driving circuits in the seventh area are a fifth sub-gate driving circuit and a sixth sub-gate driving circuit respectively; the two fourth gate driving circuits in the tenth area are a seventh sub-gate driving circuit and an eighth sub-gate driving circuit respectively;

the first end of the second sub-gate driving circuit is cascaded with the fifth sub-gate driving circuit, and the second end of the second sub-gate driving circuit is cascaded with the seventh sub-gate driving circuit;

the first end of the third sub-gate driving circuit is cascaded with the sixth sub-gate driving circuit, and the second end of the third sub-gate driving circuit is cascaded with the eighth sub-gate driving circuit;

15. A display device comprising the display panel according to any one of claims 1 to 14, and a driver chip.

16. The display device according to claim 15, comprising at least three of the driving chips, the at least three driving chips comprising a first driving chip, a second driving chip and a third driving chip;

the first driving chip is electrically connected with the data lines in the first area, the sixth area and the ninth area; the second driving chip is electrically connected with the plurality of data lines in the third area, the seventh area and the tenth area; the third driving chip is electrically connected with the plurality of data lines in the fifth area, the eighth area and the eleventh area.

17. The display device according to claim 15, wherein the at least three driving chips are located inside a hexahedron after the plurality of folding regions of the display panel are folded to form the hexahedron.