CN109300432B - Method for driving gray scale image display signal in monochrome display panel - Google Patents

Method for driving gray scale image display signal in monochrome display panel Download PDF

Info

Publication number
CN109300432B
CN109300432B CN201710605620.1A CN201710605620A CN109300432B CN 109300432 B CN109300432 B CN 109300432B CN 201710605620 A CN201710605620 A CN 201710605620A CN 109300432 B CN109300432 B CN 109300432B
Authority
CN
China
Prior art keywords
display
scan line
frame
triggered
pixel
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201710605620.1A
Other languages
Chinese (zh)
Other versions
CN109300432A (en
Inventor
李志伟
赖振雄
吴伟汉
刘元弼
梁龄心
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Solomon Systech Shenzhen Ltd
Original Assignee
Solomon Systech Shenzhen Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Solomon Systech Shenzhen Ltd filed Critical Solomon Systech Shenzhen Ltd
Priority to CN201710605620.1A priority Critical patent/CN109300432B/en
Publication of CN109300432A publication Critical patent/CN109300432A/en
Application granted granted Critical
Publication of CN109300432B publication Critical patent/CN109300432B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3216—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using a passive matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

A method of gray scale image display signal driving in a monochrome display panel allows a gray scale pattern to be generated using a monochrome PMOLED display driver without changing the resolution of a 1-bit digital-to-analog converter (DAC) on a data line (SEG). The method also eliminates the need for an additional frame buffer display memory as required by typical methods; this is achieved by swapping display memory space for the color (grayscale) depth of the pixels of the display image at the expense of display resolution. The method further allows the grayscale pattern data to be written to the frame buffer only once, without requiring additional control by the host controller. In addition, the method also allows the number of selected gray scale scan lines to be dynamically applied, thereby enabling a full gray scale image or a mixture of monochrome and gray scale images to be displayed in a single display panel.

Description

Method for driving gray scale image display signal in monochrome display panel
Technical Field
The present invention relates to a technique of driving a Light Emitting Diode (LED), a monochrome display including an Organic Light Emitting Diode (OLED), to realize a gray image effect.
Background
In existing monochrome Passive Matrix OLED (PMOLED) display applications, it is desirable to display a gray scale pattern or image for at least a short period of time, for example, to display a logo during device start-up, for better visual results. It is not clear whether existing display drivers have a built-in mechanism that provides the above-described functionality. However, there are separate grayscale image display drivers or modules commercially available that provide this functionality in monochrome PMOLED displays. Typically, stand-alone grayscale image display drivers have full-size embedded memory and possess more hardware than monochrome display drivers. When the gray image data is stored in the memory, the gray image display driver can generate the gray image by itself without additional external control. On the other hand, a monochrome image display driver operates on the principle that image data to be displayed for each frame is written to the display driver, and the Frame Rate Control (FRC) is changed to generate a gray scale image. This involves complex control between the host controller and the display driver, such as requiring signal timing synchronization to prevent tearing effects.
Disclosure of Invention
According to various embodiments of the present invention, a method is provided that allows the use of a monochrome PMOLED display driver to generate a grayscale pattern without the need to change the resolution of a 1-bit digital-to-analog converter (DAC) on the data line (SEG). The method can also eliminate the additional frame buffer display memory required by typical methods; this is achieved by swapping display memory space for the color (grayscale) depth of the pixels of the display image at the expense of display resolution. The method also enables the grayscale pattern data to be written to the frame buffer only once, without requiring additional control by the host controller. In addition, the method allows the number of selected gray scan lines to be dynamically applied, thereby enabling a full gray image or a mixture of monochrome and gray images to be displayed in a single display panel. The invention can also be used to improve a grayscale image display driver so that a conventional grayscale image display driver with an n-bit DAC can be enhanced to produce more than 2 n A grey level.
Drawings
Embodiments of the invention are described in more detail below with reference to the accompanying drawings, in which:
FIG. 1a is a pixel circuit diagram of a conventional PMOLED display panel; FIG. 1b is a timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a typical signal driving method;
FIG. 2a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a typical monochrome-only image generating signal driving method; FIG. 2b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 2 a;
fig. 3a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a typical gray scale image generation signal driving method; FIG. 3b is a state diagram of a pixel corresponding to the driving signal shown in FIG. 3 a;
fig. 4a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a gray scale image generation signal driving method provided in the first embodiment of the present invention; FIG. 4b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 4 a;
fig. 5a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a gray scale image generation signal driving method provided in a second embodiment of the present invention; FIG. 5b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 5 a;
fig. 6a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a gray image generating signal driving method provided by a third embodiment of the present invention; FIG. 6b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 6 a;
fig. 7a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a gray scale image generation signal driving method provided in a fourth embodiment of the present invention; FIG. 7b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 7 a;
fig. 8a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel according to a driving method of a gray image generating signal driving method provided in a fifth embodiment of the present invention; FIG. 8b is a state diagram of the pixel corresponding to the drive signal shown in FIG. 8 a;
FIG. 9 is a schematic diagram of a hybrid display of monochrome and grayscale images in a single display panel provided in accordance with various embodiments of the invention;
FIG. 10 is another schematic diagram of a hybrid display of monochrome and grayscale images in a single display panel provided in accordance with various embodiments of the invention;
FIG. 11a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel for a gray scale image generation signal driving scheme suitable for a 2-bit gray scale image display driver, provided in accordance with one embodiment of the present invention; and fig. 11b shows the state of the pixel corresponding to the drive signal shown in fig. 11 a; and
FIG. 12a is an exemplary timing diagram of driving signals on data lines and scan lines of a conventional PMOLED display panel for a grayscale image generating signal driving scheme suitable for a 2-bit grayscale image display driver according to another embodiment of the present invention; and fig. 12b shows the state of the pixel corresponding to the drive signal shown in fig. 12 a.
Detailed Description
The following description will set forth preferred examples of methods and apparatuses for generating a gray scale image in a display and the like. It will be apparent to those skilled in the art that modifications, including additions and/or substitutions, may be made without departing from the scope and spirit of the invention. Although specific details may be omitted in order to avoid obscuring the invention, the present disclosure is set forth in order to allow those skilled in the art to practice the teachings herein without undue experimentation.
Referring to fig. 1a and 1b, the operation of PMOLED is illustrated. In PMOLED display panels, the pixels have the electrical characteristics of diodes that conduct when the voltage across the pixel is greater than a threshold voltage. The brightness of a pixel is also related to the amount of current flowing through the pixel, although the relationship is not linear. However, the luminance of a pixel is almost linearly proportional to its duty cycle, which corresponds to the time the pixel is turned on. A common driving method of the PMOLED display panel includes precharging pixels to their threshold voltages through a data line (SEG) at the start of each line scan; thereafter, a current is driven to SEG to turn on the pixel.
To illustrate the present invention more clearly, the embodiments described herein assume negligible parasitic resistance and parasitic capacitance in PMOLED display panels. Therefore, it can be considered that the pre-charging of the pixel is completed in a time close to 0, and the luminance of the pixel in one line scan is linearly proportional to the ON (ON) time of the pixel. In the remainder of this document, the term "monochrome" means that the DAC on each data line SEGWith 1-bit resolution, the pixel can only be in the OFF or ON state (although the brightness of the pixel is still affected by the duration (e.g. pulse width) or current amplitude of the ON (high level) driving signal waveform ON the data line SEG). The term "grayscale" means that the DAC of each SEG has a resolution of more than 1 bit; thus, using an n-bit DAC, a 2 can be obtained n By 2, while passing through n The data lines SEG are driven by the driving signal waveform pattern of (2), and 2 can be expressed in each scanning line n The brightness of (2).
Refer to fig. 2a and 2b. In a typical monochrome driving method, a scan line (COM) triggers the scan line (COM) one by one at different time slots of one frame (for example, triggering COM (j) at time slot j); then, the state of the pixels on the data line SEG during the time slot j depends on the state of the data line SEG. For example, if SEG (i) is driven by an ON (high level) waveform during time slot j, pixel (i, j) is in an ON state with 100% brightness; if SEG (i + 1) is driven by an OFF (low level) waveform in time slot j +1, pixel (i +1, j + 1) is in an OFF state with a luminance of 0%.
Refer to fig. 3a and 3b. In a typical gray scale driving method, the scan lines COM are triggered one by one at different time slots of one frame (for example, COM (j) is triggered at time slot j); then, the state and brightness of the pixels on the data line SEG during the time slot j depend on the state and duty ratio of the data line SEG. For example, if SEG (i) is driven by an ON waveform with a duty cycle of 100% during time slot j, pixel (i, j) is in an ON state with a brightness of 100%; if SEG (i + 1) is driven by an ON waveform with a duty cycle of 50% during time slot j, then pixel (i +1, j) is in an ON state with a brightness of 50%; if SEG (i) is driven by an ON waveform with a duty cycle of 25% during time slot j +1, then pixel (i, j + 1) is in an ON state with a brightness of 25%; whereas if SEG (i + 1) is driven by the OFF waveform during time slot j +1, pixel (i +1, j + 1) is in the OFF state with 0% brightness. In this case, each DAC on the data line SEG may be considered to have 2-bit resolution.
The method and the device provided by the invention can enable the monochrome display driver with the 1-bit DAC capable of driving the data line SEG to display the gray level image without an additional memory; so that the chip size of the display driver Integrated Circuit (IC) is not affected. The method and apparatus may also be applied to conventional gray scale display drivers to advantageously increase color depth. The concept of the invention is to use a T-bit memory to represent the gray level of each pixel in the same memory space used for the display data, at the expense of the display resolution. Therefore, in order to use a gray level of T bits for each pixel, the display resolution must be reduced by a factor T according to: new display resolution = M × (N/T), where M is the maximum number of columns and N is the maximum number of rows of the original display resolution.
The concept of the invention is also to trigger each scan line COM (j) in a number of time slots (T time slots) within each frame, where 0 ≦ j ≦ N-1, N being the total number of scan lines (or the maximum number of lines of the original display resolution), T ≦ N. Then, each pixel (i, j) is driven by a plurality of driving signal waveform periods on the data line SEG (i) in one frame, where 0 ≦ i ≦ M-1, M being the total number of data lines (or the maximum number of columns of the original display resolution). Since SEG (i) has different ON and OFF states during different time slots, which are controlled by the frame buffer, pixel (i, j) can achieve different levels of brightness. Further, if the driving signal waveform on the SEG is the same in each time slot, the number of obtainable gray levels is T +1; whereas if the drive signal waveform on the SEG is varied in a particular sequence at different time slots, an achievable number of gray levels is 2 T 。
Refer to fig. 4a and 4b. According to a first embodiment of the present invention, there is provided a gray scale image generation method for realizing 2-bit 3-level. In the present embodiment, each scan line COM (j) is triggered during time slots 2j and 2j + 1. The state and brightness of pixel (i, j) during time slots 2j and 2j +1 then depends ON the ON/OFF state of data line SEG (i). For example, if SEG (i) is driven by an OFF waveform during time slot 2j followed by an ON waveform during time slot 2j +1, then pixel (i, j) is in an ON state at 100% brightness; if SEG (i + 1) is driven by the ON waveform during time slot 2j and then by the OFF waveform during time slot 2j +1, then pixel (i +1, j) remains in the ON state at 100% brightness; if SEG (i) is driven by the OFF waveform during time slot 2j +2 and then by the OFF waveform during time slot 2j +3, then pixel (i, j + 1) is in the OFF state with 0% brightness; whereas if SEG (i + 1) is driven by the ON waveform during time slot 2j +2 and then by the ON waveform during time slot 2j +3, pixel (i +1, j + 1) is in the ON state with a brightness of 200%.
Refer to fig. 5a and 5b. According to a second embodiment, extended from the first embodiment, the generation of a 2-bit 3-level gray-scale image is also achieved by triggering each scan line COM (j) during a plurality of arbitrary time slots. For example, the scan line COM (j-1) is triggered during time slot j-1, and then again at time slot p; triggering the scanning line COM (j) during the time slot j, and then triggering again during the time slot q; scan line COM (j + 1) is triggered during time slot j +1, and then again during time slot r, rather than during consecutive time slots 2j and 2j + 1. In the first and second embodiments, the brightness (or grey level) of the pixel is still determined by the total duration or the total number of time slots of the ON waveform ON the SEG driven to the pixel within a predetermined period of time.
Refer to fig. 6a and 6b. According to the third embodiment, in order to realize a larger number of gray levels, each scan line COM (j) is triggered in a larger number of time slots than in the first two embodiments. For example, to achieve a 4-bit 5-level gray scale, scan line COM (j) may be triggered during time slots 4j, 4j +1, 4j +2, and 4j + 3. Thus, the state and brightness of pixel (i, j) is dependent ON the ON/OFF state of data line SEG (i) during time slots 4j, 4j +1, 4j +2, and 4j + 3. For example, if SEG (i) is driven by the OFF waveform during time slot 4j, then driven by the OFF waveform during time slot 4j +1, then driven by the OFF waveform during time slot 4j +2, and then driven by the ON waveform during time slot 4j +3, then pixel (i, j) is in the ON state with 100% brightness; if SEG (i + 1) is driven by the OFF waveform during time slot 4j, then driven by the OFF waveform during time slot 4j +1, then driven by the ON waveform during time slot 4j +2, and then driven by the ON waveform during time slot 4j +3, then pixel (i +1, j) is in the ON state with a brightness of 200%; if SEG (i) is driven by the OFF waveform during time slot 4j +4, driven by the ON waveform again during time slot 4j +5, driven by the ON waveform during time slot 4j +6, and driven by the ON waveform during time slot 4j +7, then pixel (i, j + 1) is in the ON state with 300% brightness; whereas if SEG (i + 1) is driven by the ON waveform during time slot 4j +4, driven by the ON waveform again during time slot 4j +5, driven by the ON waveform during time slot 4j +6, and driven by the ON waveform at time slot 4j +7 thereafter, pixel (i +1, j + 1) is in the ON state with a brightness of 400%.
Refer to fig. 7a and 7b. According to a fourth embodiment, there is provided a method for implementing 2-bit 4-level gray scale image generation. In this embodiment, each scan line COM (j) is triggered during time slots 2j and 2j + 1. Unlike the first embodiment, the ON-state driving signal waveform driven to the data line SEG during the odd (or even) slot has a duty ratio of 50% or a reduced current level corresponding to 50% of the pixel brightness. This may be considered a "half-ON" (rather than "full-ON") state. Accordingly, the data line SEG may be driven by a signal waveform of an OFF state or a signal waveform of a "half-ON" state during odd (or even) numbered slots, and driven by a signal waveform of an OFF state or a signal waveform of a "full-ON" state during other slots. For example, if SEG (i) is driven by an OFF waveform during time slot 2j, then by a "half-ON" waveform during time slot 2j +1, then pixel (i, j) is in an ON state with 50% brightness; if SEG (i + 1) is driven by the "all-ON" waveform during time slot 2j, and then by the OFF waveform during time slot 2j +1, then pixel (i +1, j) is in the ON state at 100% brightness; if SEG (i) is driven by an OFF waveform during time slot 2j +2 and then by another OFF waveform during time slot 2j +3, then pixel (i, j + 1) is in an OFF state with 0% brightness; whereas if SEG (i + 1) is driven by the "all-ON" waveform during time slot 2j +2, and then driven by the "half-ON" waveform during time slot 2j +3, then the state of pixel (i +1, j + 1) is ON and has a luminance of 150%.
Refer to fig. 8a and 8b. According to a fifth embodiment, a method for implementing 4-bit 16-level gray scale image generation is provided. In this fifth embodiment, at time slot 4j + k, during which k =0,1,2,3,4,5,6,7, the ON state drive signal waveform driven to data line SEG has a duty cycle of 100% or an undeduced current level ("all-ON") corresponding to 100% pixel brightness, a duty cycle of 50% or a reduced current level ("half-ON") corresponding to 50% pixel brightness, a duty cycle of 25% or a reduced current level ("1/4-ON") corresponding to 25% pixel brightness, a duty cycle of 12.5% or a reduced current level ("1/8-ON") corresponding to 12.5% pixel brightness, a duty cycle of 100% or an undeduced current level ("all-ON") corresponding to 100% pixel brightness, a duty cycle of 50% or a reduced current level ("half-ON") corresponding to 50% pixel brightness, a duty cycle of 25% or a reduced current level ("half-ON") corresponding to 25% pixel brightness, respectively, and k =0,1,2,3,4,5,6, 7. This provides 16 possible pixel brightness levels, ranging from 0% to 187.5% in 12.5% increments. For example, if SEG (i) is driven by the OFF waveform during time slot 4j, then driven by the OFF waveform during time slot 4j +1, then driven by the OFF waveform during time slot 4j +2, and then driven by the "1/8-ON" waveform during time slot 4j +3, then pixel (i, j) is in the ON state with a brightness of 12.5%; if SEG (i + 1) is driven by the OFF waveform during time slot 4j, then by the OFF waveform during time slot 4j +1, then by the "1/4-ON" waveform during time slot 4j +2, and then by the "1/8-ON" waveform during time slot 4j +3, then pixel (i +1, j) is in the ON state with 37.5% brightness; if SEG (i) is driven by the OFF waveform during time slot 4j +4, then by the "half-ON" waveform during time slot 4j +5, then by the "1/4-ON" waveform during time slot 4j +6, and then by the "1/8-ON" waveform during time slot 4j +7, then pixel (i, j + 1) is in the ON state with a brightness of 87.5%; whereas if SEG (i + 1) is driven by the full-ON waveform during time slot 4j +4, then by the half-ON waveform during time slot 4j +5, then by the 1/4-ON waveform during time slot 4j +6, and then by the 1/8-ON waveform during time slot 4j +7, pixel (i +1, j + 1) is in the ON state for brightness 187.5%.
Refer to fig. 9. In any of the foregoing embodiments, the grayscale image may not need to occupy the entire screen of the PMOLED display panel. A part of the screen may be dedicated to gray-scale image display and the remaining part to monochrome image display. Assuming that no additional display memory is used, a portion of the space must be reserved in the display memory for the grayscale image pixel color depth information since the grayscale image pixel color depth (gray level) information requires some storage space. This portion of the reserved display memory space is not available for image display, so there is a non-display area in the PMOLED display panel. Further assume that the resolution of the PMOLED display panel is M columns × N rows; if the gray-scale image display uses K lines therein and the gray-scale image generation uses T slots (T bits), then (K × T-1)) lines belong to the non-display area and (N- (K × T)) lines can be used for the monochrome image display.
Refer to fig. 10. The portion of the reserved space in the display memory used to store grayscale image pixel color depth information may be separated into portions corresponding to regions selectively distributed throughout the PMOLED display panel. Thus, the PMOLED display panel that displays both monochrome and gray scale images can be perceived by the viewer as a complete PMOLED display panel, rather than being a scaled down version of the PMOLED display panel due to the non-display area, which is a result of the portion of the display memory that is reserved for storing the color depth of the gray scale image pixels.
The invention can also be used to improve greyscale image display drivers. Recall that the principle of the gray image display driver is that each data line SEG is represented by 2 in each scan line n 2 of brightness n One of the driving signal waveform patterns. In the exemplary embodiment corresponding to fig. 11a and 11b, the original unmodified gray scale image display driver has a 2-bit DAC and is therefore capable of producing four pixel gray levels of 0%,33.3%,66.6% and 100% brightness. Applying the technique of the present invention to this grayscale image display driver, each scan line COM (j) is triggered in a plurality of time slots (T time slots) within each frame (T = 2 in the present exemplary embodiment). This causes the different possible gray levels of the pixel to now depend on the sum of the different SEG drive signal waveform patterns during the multiple COM triggered time slots within each frame. So that the maximum number of grey levels is equal to: (Y-1) T +1, where Y is the number of primitive gray levels that can be generated and T is a scan line COM that can be generated in each frameIn the number of triggered time slots. In this exemplary embodiment, Y is equal to 4 and T is equal to 2, so a total of seven gray levels at 0%,33.3%,66.6%,100%,133.3%, 166.6% and 200% brightness can be generated.
See fig. 12a and 12b. In another embodiment of applying the present invention to a grayscale image display driver, each scan line COM (j) is triggered in two time slots within each frame. With one time slot (odd or even) dedicated to allow each data line SEG to be produced by a display driver representing the original unmodified gray scale image n 2 of brightness n One of the driving signal waveform patterns. The number of gray levels that can be originally generated is represented by Y, and the possible pixel gray levels corresponding to these odd or even slots are: 0%, 1/(Y-1) × 100%, 2/(Y-1) × 100%, (Y-1)/(Y-1) × 100% brightness. The other time slot (even or odd) is dedicated to allow each data line SEG to be driven by 2 with a shortened duty cycle or a reduced current level (amplitude divided by a factor Y) n One of the driving signal waveform patterns. The number of gray levels that can be originally generated is represented by Y, and the possible pixel gray levels corresponding to these odd or even slots are: 0%, 1/(Y-1)/Y100%, 2/(Y-1)/Y100%, (Y-1)/Y100% brightness. This results in that the different possible grey levels of the pixel now depend on the sum of the different SEG drive signal waveform patterns during multiple COM trigger time slots within each frame, and the maximum number of grey levels is equal to: y is T Where Y is the number of primitive gray scale levels that can be generated and T is the number of time slots a scan line COM can be triggered in each frame. In the present exemplary embodiment, the number of original gray levels that can be generated Y is equal to 4, and T is equal to 2, and the maximum number of gray levels that can be generated is 16, which are: 0%,8.33%,16.66%,25%,33.33%, 41.66%,50%,58.33%,66.66%,75%,83.33%,91.66%,100%,108.33%,116.66% and 125% brightness.
Although the embodiments of the multiphase constant current topology described above are applied to OLED light sources, one of ordinary skill in the art will appreciate that the same inventive concepts may be applied to applications such as those employing LED light sources.
The embodiments disclosed herein may be implemented using a general purpose or special purpose computing device, a computer processor, or electronic circuitry including, but not limited to, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA), and other programmable logic devices configured or programmed according to the teachings of the present application. Computer instructions or software code that execute on a general purpose or special purpose computing device, a computer processor, or a programmable logic device may be readily implemented by those of ordinary skill in the software or electronic arts based on the teachings herein.
In some embodiments, the present invention includes a computer storage medium having stored therein computer instructions or software code which can be used to program a computer or microprocessor to perform any of the processes of the present invention. Storage media includes, but is not limited to, ROM, RAM, flash memory devices, or any type of media or device suitable for storing instructions, code, and/or data.
The foregoing description of the present invention has been presented for purposes of illustration and description, and is not intended to be exhaustive or limited to the invention in the precise form disclosed. Many modifications and variations will be apparent to practitioners skilled in the art.
The embodiments were chosen and described in order to best explain the principles of the invention and its practical applications, to thereby enable others skilled in the art to understand the invention for various embodiments and with various modifications as are suited to the particular use contemplated. It is intended that the scope of the invention be defined by the following claims and their equivalents.

Claims (12)

1. A method of gray scale image display signal driving in a monochrome display panel, comprising:
triggering each scan line in T time slots within each frame, wherein only one scan line is triggered in any one time slot, wherein T is the number of time slots in which a scan line can be triggered within each frame;
driving each of the data lines during each time slot within each frame with an ON or OFF drive signal waveform period, wherein all of the ON drive signal waveform periods have the same signal waveform duty cycle and current amplitude;
wherein the luminance of a pixel is determined by the total number of time slots of a corresponding ON drive signal waveform period ON a data line connected to the pixel;
wherein grayscale image pixel grayscale information is stored in a display memory space, the grayscale image pixel grayscale information sharing the display memory space with image display data;
the display storage space is fixed for an original display resolution of a monochrome display panel such that the display resolution is reduced to provide storage of the grayscale image pixel grayscale information stored in a portion of the display storage space reserved for the grayscale image pixel grayscale information; and
a portion of the space reserved for the display memory space for the grayscale image pixel grayscale information is split into portions corresponding to regions distributed across the display panel.
2. The method of claim 1, wherein each scan line is triggered in T consecutive time slots within each frame.
3. The method of claim 1, wherein each scan line is triggered in T non-consecutive time slots within each frame.
4. A method of gray scale image display signal driving in a monochrome display panel, comprising:
triggering each scan line in T time slots within each frame, wherein only one scan line is triggered in any one time slot, wherein T is the number of time slots in which a scan line can be triggered within each frame;
driving each of the data lines with an ON or OFF drive signal waveform period during each time slot within each frame, wherein the ON drive signal waveform periods in different time slots vary in a particular order in signal waveform duty cycle or current amplitude;
wherein the luminance of a pixel is determined by the total number of time slots of the corresponding ON drive signal waveform period ON the data line connected to said pixel;
wherein grayscale image pixel grayscale information is stored in a display memory space, the grayscale image pixel grayscale information sharing the display memory space with image display data;
the display memory space is fixed for an original display resolution of a monochrome display panel such that the display resolution is reduced to provide storage of the grayscale image pixel grayscale information stored in a portion of the display memory space reserved for the grayscale image pixel grayscale information; and
a portion of the space reserved for the display memory space for the grayscale image pixel grayscale information is split into portions corresponding to regions distributed across the display panel.
5. The method of claim 4, wherein each scan line is triggered in T consecutive time slots within each frame.
6. The method of claim 4, wherein each scan line is triggered in non-consecutive T slots within each frame.
7. A method of performing gray scale image display signal driving in a display panel, comprising:
triggering each scan line in T time slots within each frame, wherein only one scan line is triggered in any one time slot, wherein T is the number of time slots in which a scan line can be triggered within each frame, and T is greater than 1;
driving each data line during each time slot within each frame with one of Y different drive signal waveforms, wherein Y is the number of primitive gray scale levels that can be generated and each of the Y different drive signal waveforms corresponds to one possible pixel gray scale level;
wherein the brightness of a pixel is determined by the sum of the drive signal waveforms driven on the data lines connected to that pixel during the triggered scan line time slot;
grayscale image pixel grayscale information is stored in a display memory space, the grayscale image pixel grayscale information sharing the display memory space with image display data;
the display storage space is fixed for an original display resolution of a monochrome display panel such that the display resolution is reduced to provide storage of the grayscale image pixel grayscale information stored in a portion of the display storage space reserved for the grayscale image pixel grayscale information; and
a portion of the space reserved for the display memory space for the grayscale image pixel grayscale information is split into portions corresponding to regions distributed across the display panel.
8. The method of claim 7, wherein each scan line is triggered in T consecutive time slots within each frame.
9. The method of claim 7, wherein each scan line is triggered in T time slots that are not consecutive within each frame.
10. A method of performing gray scale image display signal driving in a display panel, comprising:
triggering each scan line in 2 time slots within each frame, wherein only one scan line is triggered in any one time slot;
driving each data line during a first time slot within each frame by one of Y different drive signal waveforms, wherein Y is the number of primitive gray scale levels that can be generated and each of the Y different drive signal waveforms corresponds to one possible pixel gray scale level;
driving each data line during a second time slot in each frame by one of Y different drive signal waveforms whose amplitude is divided by a factor Y;
wherein the brightness of a pixel is determined by the sum of the drive signal waveforms driven on the data lines connected to that pixel during the triggered scan line time slot;
grayscale image pixel grayscale information is stored in a display memory space, the grayscale image pixel grayscale information sharing the display memory space with image display data;
the display storage space is fixed for an original display resolution of a monochrome display panel such that the display resolution is reduced to provide storage of the grayscale image pixel grayscale information stored in a portion of the display storage space reserved for the grayscale image pixel grayscale information; and
a portion of the space reserved for the display memory space for the grayscale image pixel grayscale information is split into portions corresponding to regions distributed across the display panel.
11. The method of claim 10, wherein each scan line is triggered in T consecutive time slots within each frame, where T is the number of time slots a scan line can be triggered in each frame.
12. The method of claim 10, wherein each scan line is triggered in T time slots that are not consecutive within each frame, where T is the number of time slots in which a scan line can be triggered within each frame.
CN201710605620.1A 2017-07-24 2017-07-24 Method for driving gray scale image display signal in monochrome display panel Active CN109300432B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201710605620.1A CN109300432B (en) 2017-07-24 2017-07-24 Method for driving gray scale image display signal in monochrome display panel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201710605620.1A CN109300432B (en) 2017-07-24 2017-07-24 Method for driving gray scale image display signal in monochrome display panel

Publications (2)

Publication Number Publication Date
CN109300432A CN109300432A (en) 2019-02-01
CN109300432B true CN109300432B (en) 2022-11-08

Family

ID=65167568

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201710605620.1A Active CN109300432B (en) 2017-07-24 2017-07-24 Method for driving gray scale image display signal in monochrome display panel

Country Status (1)

Country Link
CN (1) CN109300432B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109979386B (en) * 2019-05-10 2021-02-26 芯颖科技有限公司 Driving method and device of display panel

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0876726A (en) * 1994-07-08 1996-03-22 Hitachi Ltd Tft liquid crystal display
JP2006030356A (en) * 2004-07-13 2006-02-02 Pioneer Electronic Corp Method and device for driving display panel
JP4753353B2 (en) * 2005-03-31 2011-08-24 東北パイオニア株式会社 Self-luminous display panel driving device, driving method, and electronic apparatus including the driving device
KR100793557B1 (en) * 2006-06-05 2008-01-14 삼성에스디아이 주식회사 Organic electro luminescence display and driving method thereof
US8014030B2 (en) * 2007-09-14 2011-09-06 Kabushiki Kaisha Toshiba Image processing and formation with line thininng by reducing intensity of target pixel based on extracted contour pixel and area connectedness information
JP2010054989A (en) * 2008-08-29 2010-03-11 Mitsubishi Electric Corp Gradation control method and display device
CN101853524A (en) * 2010-05-13 2010-10-06 北京农业信息技术研究中心 Method for generating corn ear panoramic image by using image sequence
CN102158636B (en) * 2010-09-30 2013-03-20 四川虹欧显示器件有限公司 Image processing method and device
JP2013057853A (en) * 2011-09-09 2013-03-28 Japan Display West Co Ltd Display device, driving method of display device, and electronic apparatus
CN102438134B (en) * 2011-11-22 2013-10-23 苏州科雷芯电子科技有限公司 Video transmission apparatus based on visual center principle and transmission method thereof
JP2017058522A (en) * 2015-09-16 2017-03-23 双葉電子工業株式会社 Display drive device, display device and display drive method

Also Published As

Publication number Publication date
CN109300432A (en) 2019-02-01

Similar Documents

Publication Publication Date Title
USRE48358E1 (en) Emission control driver and organic light emitting display device having the same
US9905159B2 (en) Digital driving of active matrix displays
US10643519B2 (en) Method and apparatus of grayscale image generation in monochrome display
US9786226B2 (en) Display panel module, organic light-emitting diode (OLED) display and method of driving the same
US8077189B2 (en) Drive circuit
US8054266B2 (en) Display device, driving apparatus for display device, and driving method of display device
US11004379B2 (en) Display apparatus and method for generating enable signal used in the same
US7864139B2 (en) Organic EL device, driving method thereof, and electronic apparatus
US20160093258A1 (en) Data driver and display apparatus including the same
WO2009101877A1 (en) Display apparatus and method for driving the same
JP7253332B2 (en) Display device and display controller
US8659528B2 (en) Electro-optical device driven by polarity reversal during each sub-field and electronic apparatus having the same
JP2007506135A (en) Bistable display with reduced memory requirements
US10475406B2 (en) Display panel having zigzag connection structure and display device including the same
US8953001B2 (en) Method of digital-driving an organic light emitting display device
CN109300432B (en) Method for driving gray scale image display signal in monochrome display panel
KR102316100B1 (en) Light Emitting Display Device and Driving Method thereof
JP2006284737A (en) Electrode driving circuit
TWI633532B (en) Method and apparatus of grayscale image generation in monochrome display
JP4074995B2 (en) CURRENT DRIVE CIRCUIT, CONTROL METHOD THEREOF, AND DISPLAY DEVICE PROVIDED WITH THE CURRENT DRIVE CIRCUIT
JPWO2006051790A1 (en) Driving apparatus and driving method
US20240185783A1 (en) Display device including an emission driver
CN111354292B (en) Pixel driving method and device, electronic device and storage medium
CN114333703B (en) Display device and electronic apparatus
JP4506355B2 (en) Power supply circuit, drive device, electro-optical device, electronic apparatus, and drive voltage supply method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant