CN108768144A - Driving circuit and electric power variable flow device - Google Patents
Driving circuit and electric power variable flow device Download PDFInfo
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- CN108768144A CN108768144A CN201810522075.4A CN201810522075A CN108768144A CN 108768144 A CN108768144 A CN 108768144A CN 201810522075 A CN201810522075 A CN 201810522075A CN 108768144 A CN108768144 A CN 108768144A
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- 239000004065 semiconductor Substances 0.000 claims description 58
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- 238000003199 nucleic acid amplification method Methods 0.000 claims description 17
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- 238000010586 diagram Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
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Classifications
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M1/00—Details of apparatus for conversion
- H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
- H02M1/088—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters for the simultaneous control of series or parallel connected semiconductor devices
-
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
- H02M3/1584—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load with a plurality of power processing stages connected in parallel
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Electronic Switches (AREA)
Abstract
The invention discloses a kind of driving circuit and electric power variable flow device, which includes:First signal processing circuit,Second signal processing circuit,First gating circuit and the second gating circuit,First signal processing circuit is connect with the first gating circuit,First gating circuit is connect with switch module,The second signal processing circuit is connect with the second gating circuit,Second gating circuit is connect with switch module,Two signal processing circuits are for receiving drive signal,When drive signal is the first level,Turn off the second gating circuit,The first gating circuit is opened after first preset time that is delayed,So that the first gating circuit exports the first predeterminated voltage to switch module,When drive signal is second electrical level,Turn off the first gating circuit,The second gating circuit is opened after second preset time that is delayed,So that the second gating circuit exports the second predeterminated voltage to switch module,Pass through the sequential control method for turning off and opening,To realize very strong driving capability.
Description
Technical field
The present invention relates to driving circuit technical field, more particularly to a kind of driving circuit and electric power variable flow device.
Background technology
Power semiconductor device is the basis of power electronic technique, is the heart of electric power variable flow device, not only it to electric power
Volume, weight, efficiency, performance and reliability of converter plant etc. play the role of it is vital, and to the price of device
Also function to very big influence.And the practical performance of power electronic devices can also rely on circuit condition and switching context.IGBT also not examples
Outside, among the various major loops constituted using IGBT, high-power IGBT drive protection circuit plays the end of vulnerabilities scan forceful electric power
Hold interface (interface) effect.Because of its importance, the design of Drive Protecting Circuit is a critically important link in IGBT applications,
It is the difficult point and key using design.The Drive Protecting Circuit of function admirable be ensure IGBT efficiently, the necessary item of reliability service
Part.
IGBT is in power electronics field using more and more, and IGBT is since there are grid emitter-base bandgap grading input capacitance and collectors
To the Miller capacitance of grid, therefore IGBT is driven to need certain power, German Infineon companies latest version 6500V/750A's
IGBT (model FZ750R65KE3T), grid emitter-base bandgap grading input capacitance can reach 205nF, and gate electric charge reaches 31uC, therefore needs
Want larger driving current that can just ensure that IGBT can quickly open shutdown, when otherwise can lead to switch because of driving power deficiency
Between increase, switching loss increases, and gently then overheats, heavy then burn, therefore studies and High Power IGBT Driver Circuit is driven to become future
Trend also seems and is even more important.
Invention content
The main object of the present invention is to provide a kind of driving circuit, it is intended to improve existing driving circuit to high-power IGBT
Driving capability.
To achieve the above object, driving circuit proposed by the present invention, including the processing of the first signal processing circuit, second signal
Circuit, the first gating circuit and the second gating circuit, first signal processing circuit are connect with first gating circuit, institute
The first gating circuit is stated to connect with switch module;The second signal processing circuit is connect with second gating circuit, described
Second gating circuit is connect with the switch module;Wherein
First signal processing circuit and second signal processing circuit, for receiving drive signal, when drive signal is
When the first level, the second signal processing circuit turns off second gating circuit, described the after first preset time that is delayed
One signal processing circuit opens first gating circuit so that first gating circuit exports the first predeterminated voltage to described
Switch module;
When drive signal is second electrical level, first signal processing circuit turns off first gating circuit, delay
The second signal processing circuit opens second gating circuit after second preset time so that second gating circuit is defeated
Go out the second predeterminated voltage to the switch module.
Preferably, the driving circuit further includes the first signal amplification circuit and second signal amplifying circuit, and described first
Signal amplification circuit is separately connected with first signal processing circuit and the first gating circuit, the second signal amplifying circuit
It is separately connected with the second signal processing circuit and the second gating circuit.
Preferably, first signal processing circuit includes the first NAND gate, the second NAND gate and third NAND gate, described
First NAND gate, the second NAND gate and third NAND gate respectively include first input end, the second input terminal and output end, and described
The first input end of one NAND gate and the second input terminal receive the drive signal jointly, the output end of first NAND gate with
The first input end of second NAND gate connects, and the second input terminal of second NAND gate receives enable signal, and described the
The output end of two NAND gates is connect with the first input end of the third NAND gate and the second input terminal, the third NAND gate
Output end is connect with first signal amplification circuit.
Preferably, first signal processing circuit further includes the first signal protection circuit, the first signal protection electricity
Road is connect with the second input terminal of the output end of first NAND gate and second NAND gate.
Preferably, the second signal processing circuit includes the 4th NAND gate, and the 4th NAND gate includes the first input
The first input end of end, the second input terminal and output end, the 4th NAND gate receives drive signal, the 4th NAND gate
Second input terminal receives enable signal, and the output end of the 4th NAND gate is connect with the second signal amplifying circuit.
Preferably, the second signal processing circuit further includes second signal protection circuit, the second signal protection electricity
Road one end receives the drive signal, and the other end is connect with the first input end of the 4th NAND gate.
Preferably, first gating circuit include the first metal-oxide-semiconductor and first resistor, the grid of first metal-oxide-semiconductor with
The first signal amplification circuit connection, the source electrode ground connection of first metal-oxide-semiconductor, the drain electrode of first metal-oxide-semiconductor are opened with described
Module connection is closed, the first end of the first resistor is connect with the grid of first metal-oxide-semiconductor, the second end of the first resistor
It is connect with the source electrode of first metal-oxide-semiconductor.
Preferably, second gating circuit include the second metal-oxide-semiconductor and second resistance, the grid of second metal-oxide-semiconductor with
Second signal amplifying circuit connection, the source electrode of second metal-oxide-semiconductor are connect with power supply, the drain electrode of second metal-oxide-semiconductor and
The switch module connection, the first end of the second resistance are connect with the grid of second metal-oxide-semiconductor, the second resistance
Second end is connect with the source electrode of second metal-oxide-semiconductor.
Preferably, the driving circuit includes output protection circuit, and the output protection circuit includes 3rd resistor, first
Voltage-stabiliser tube, the second voltage-stabiliser tube and the first capacitance, the first end of the 3rd resistor are connect with the source electrode of first metal-oxide-semiconductor, institute
The second end for stating 3rd resistor is connect with the positive terminal of first voltage-stabiliser tube, the negative pole end of first voltage-stabiliser tube and described the
The drain electrode of one metal-oxide-semiconductor connects, and the positive terminal of second voltage-stabiliser tube is connect with the negative pole end of first voltage-stabiliser tube, and described second
The negative pole end of voltage-stabiliser tube is connect with the negative pole end of first voltage-stabiliser tube, the positive terminal of the capacitance and second voltage-stabiliser tube and
Negative pole end is separately connected.
The present invention also proposes that a kind of electric power variable flow device, the electric power variable flow device include driving circuit as described above.
Technical solution of the present invention is by being arranged the first signal processing circuit, second signal processing circuit, the first gating circuit
With the second gating circuit, first signal processing circuit is connect with the first gating circuit, first gating circuit and switch
Module connects;The second signal processing circuit is connect with the second gating circuit, and second gating circuit connects with switch module
It connects, forms a kind of driving circuit.First signal processing circuit and second signal processing circuit are used to receive drive signal,
When drive signal is the first level, the second gating circuit is turned off, the first gating circuit is opened after first preset time that is delayed, makes
It obtains the first gating circuit and exports the first predeterminated voltage to switch module, when drive signal is second electrical level, shutdown first gates
Circuit opens the second gating circuit after second preset time that is delayed so that the second gating circuit exports the second predeterminated voltage to opening
Module is closed, by the sequential control method for turning off and opening, to realize very strong driving capability.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below
There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is only this
Some embodiments of invention for those of ordinary skill in the art without creative efforts, can be with
The structure shown according to these attached drawings obtains other attached drawings.
Fig. 1 is the functional block diagram of present invention driver circuit first embodiment;
Fig. 2 is the functional block diagram of present invention driver circuit second embodiment;
Fig. 3 is the structural schematic diagram of one embodiment of present invention driver circuit.
Drawing reference numeral explanation:
Label | Title | Label | Title |
100 | First signal processing circuit | Nand2-14-1 | First NAND gate |
200 | Second signal processing circuit | Nand2-14-2 | Second NAND gate |
300 | First gating circuit | Nand2-14-3 | Third NAND gate |
400 | Second gating circuit | Nand2-14-4 | 4th NAND gate |
500 | Switch module | T1~T6 | First metal-oxide-semiconductor to the 6th metal-oxide-semiconductor |
600 | First signal amplification circuit | DZ1~DZ4 | First voltage-stabiliser tube to the 4th voltage-stabiliser tube |
700 | Second signal amplifying circuit | C1-C5 | First capacitance to the 5th capacitance |
800 | First signal protection circuit | D1-D2 | First diode to the second diode |
900 | Second signal protects circuit | VCC | Power supply |
1000 | Output protection circuit | n-IN | Drive signal |
R1~R5 | First resistor is to the 5th resistance | n-EN | Enable signal |
The embodiments will be further described with reference to the accompanying drawings for the realization, the function and the advantages of the object of the present invention.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete
Site preparation describes, it is clear that described embodiment is only a part of the embodiment of the present invention, instead of all the embodiments.Base
Embodiment in the present invention, those of ordinary skill in the art obtained without creative efforts it is all its
His embodiment, shall fall within the protection scope of the present invention.
It is to be appreciated that the directional instruction (such as up, down, left, right, before and after ...) of institute is only used in the embodiment of the present invention
In explaining relative position relation, motion conditions etc. under a certain particular pose (as shown in the picture) between each component, if should
When particular pose changes, then directionality instruction also correspondingly changes correspondingly.
In addition, the description for being related to " first ", " second " etc. in the present invention is used for description purposes only, and should not be understood as referring to
Show or imply its relative importance or implicitly indicates the quantity of indicated technical characteristic." first ", " are defined as a result,
Two " feature can explicitly or implicitly include at least one of the features.In addition, the technical solution between each embodiment can
To be combined with each other, but must can be implemented as basis with those of ordinary skill in the art, when the combination of technical solution occurs
It is conflicting or when cannot achieve should people think that the combination of this technical solution is not present, also not the present invention claims protection
Within the scope of.
The present invention proposes a kind of driving circuit.
Referring to Fig.1, in embodiments of the present invention, the driving circuit, including the first signal processing circuit 100, second signal
Processing circuit 200, the first gating circuit 300 and the second gating circuit 400, first signal processing circuit 100 and described the
One gating circuit 300 connects, and first gating circuit 300 is connect with switch module 500;The second signal processing circuit
200 connect with second gating circuit 400, and second gating circuit 400 is connect with the switch module 500.
First signal processing circuit 100 and second signal processing circuit 200 work as driving for receiving drive signal
When signal is the first level, the second signal processing circuit 200 turns off second gating circuit 400, and delay first is default
First signal processing circuit 100 opens first gating circuit 300 after time so that first gating circuit 300
The first predeterminated voltage is exported to the switch module 500.
When drive signal is second electrical level, first signal processing circuit 100 turns off first gating circuit
300, be delayed the second preset time after the second signal processing circuit 200 open second gating circuit 400 so that it is described
Second gating circuit 400 exports the second predeterminated voltage to the switch module 500.
First gating circuit 300 described in the present embodiment and the second gating circuit 400 are realized by metal-oxide-semiconductor, by the first choosing
Circuit passband 300 and the second gating circuit select different types of metal-oxide-semiconductor, i.e. NPN type and positive-negative-positive respectively, in different electricity
It can be connected under the conditions of pressure.
Technical solution of the present invention is by being arranged the first signal processing circuit, second signal processing circuit, the first gating circuit
With the second gating circuit, first signal processing circuit is connect with the first gating circuit, first gating circuit and switch
Module connects, and the second signal processing circuit is connect with the second gating circuit, and second gating circuit connects with switch module
It connects, forms a kind of driving circuit.First signal processing circuit and second signal processing circuit are used to receive drive signal,
When drive signal is the first level, the second gating circuit is turned off, the first gating circuit is opened after first preset time that is delayed, makes
It obtains the first gating circuit and exports the first predeterminated voltage to switch module, when drive signal is second electrical level, shutdown first gates
Circuit opens the second gating circuit after second preset time that is delayed so that the second gating circuit exports the second predeterminated voltage to opening
Close module, can be connected under different conditions based on first gating circuit and the second gating circuit, by shutdown and
The sequential control method opened, to realize very strong driving capability.
Further, Fig. 2 is can refer to, the driving circuit further includes that the first signal amplification circuit 600 and second signal are put
Big circuit 700, first signal amplification circuit 600 divide with first signal processing circuit, 100 and first gating circuit 300
It does not connect, the second signal amplifying circuit 700 is distinguished with 200 and second gating circuit 400 of the second signal processing circuit
Connection.
In the present embodiment, first signal amplification circuit 600 is made of third metal-oxide-semiconductor T3 and the 4th metal-oxide-semiconductor T4
Push-pull amplifier circuit, the second signal amplifying circuit 700 are put for recommending for being made of the 5th metal-oxide-semiconductor T5 and the 6th metal-oxide-semiconductor T6
Big circuit, to realize the amplification to drive signal.
Specifically, first signal processing circuit 100 includes the first NAND gate Nand2-14-1, the second NAND gate
Nand2-14-2 and third NAND gate Nand2-14-3, first NAND gate, the second NAND gate and third NAND gate are wrapped respectively
First input end, the second input terminal and output end are included, the first input end and the second input terminal of first NAND gate connect jointly
The drive signal is received, the output end of first NAND gate is connect with the first input end of second NAND gate, and described
Second input terminal of two NAND gates receives enable signal, the output end of second NAND gate and the first of the third NAND gate
Input terminal and the connection of the second input terminal, the output end of the third NAND gate are connect with first signal amplification circuit.
Specifically, the second signal processing circuit 200 includes the 4th NAND gate Nand2-14-4, the 4th NAND gate
Including first input end, the second input terminal and output end, the first input end of the 4th NAND gate receives drive signal, described
Second input terminal of the 4th NAND gate receives enable signal, output end and the second signal amplification electricity of the 4th NAND gate
Road 700 connects.
It should be noted that enable signals of the signal network n-EN as drive signal, is handled just in the drive signal
When normal state, high level is exported, when the drive signal handles the abnormalities such as over-voltage and over-current, exports invalid signals, to
It shields to entire circuit, and normal in drive trafficking signal, exports high level always.
It is understood that the first NAND gate Nand2-14-1 play the role of to drive signal have negate, second with
NOT gate Nand2-14-2 and third NAND gate Nand2-14-3 equally play the role of negating drive signal input, that is, are driving
When signal is high level, by first signal processing circuit, i.e. the first NAND gate Nand2-14-1, the second NAND gate
After Nand2-14-2 and third NAND gate Nand2-14-3, low level will be exported, is low level in drive signal correspondingly
When, by first signal processing circuit, i.e. the first NAND gate Nand2-14-1, the second NAND gate Nand2-14-2 and third
After NAND gate Nand2-14-3, high level will be exported.
Meanwhile the 4th the one end NAND gate Nand2-14-1 receive enable signal, one end receives drive signal, and result is also
Drive signal is negated, i.e., when drive signal is high level, have passed through second signal processing circuit 200, low electricity will be exported
It is flat, when drive signal is low level, second signal processing circuit 200 is have passed through, high level will be exported.
In the present embodiment, first gating circuit is turned off and is opened under different conditions with the second gating circuit
It is logical, i.e., after receiving the drive signal, by first signal processing circuit 100 and second signal processing circuit
200, one in first gating circuit and the second gating circuit can be turned off, another is open-minded, to realize shutdown with
Open timing control scheme.
Specifically, first signal processing circuit 100 further includes the first signal protection circuit 800, first signal
Protection circuit 800 is connect with the second input terminal of the output end of first NAND gate and second NAND gate.
Specifically, the second signal processing circuit 200 further includes second signal protection circuit 900, the second signal
900 one end of circuit is protected to receive the drive signal, the other end is connect with the first input end of the 4th NAND gate.
It should be noted that the first signal protection circuit 800 is by parallel group of the 4th resistance R4 and the first diode D1
At the second signal protection circuit 900 is made of the 5th resistance R5 and the second diode D2.
In the present embodiment, the first signal protection circuit 800 can be connect with the first capacitance C1, second signal protection
Circuit 900 can also be connect with the second capacitance C2, play the role of preferably protecting circuit.
It is understood that the 4th resistance R4 is in the first NAND gate Nand2-14-1 and the second NAND gate Nand2-14-2
Between, signal input metering function is played, and the first diode D1 then plays signal clamping action, in input signal by low electricity
It puts down when becoming high level diode anode current potential clamper in 0.7V, the first electricity when input signal becomes low level by high level
Hold C1 and be in cut-off state, the first capacitance C1 is made to be abandoned from 0.7V to supply voltage to play the role of circuit protection, the 5th resistance
R5 and the second diode D2 play the role of circuit protection in the same fashion.
Specifically, first gating circuit includes the first metal-oxide-semiconductor T1 and first resistor R1, the first metal-oxide-semiconductor T1's
Grid is connect with first signal amplification circuit, the source electrode ground connection of the first metal-oxide-semiconductor T1, the leakage of the first metal-oxide-semiconductor T1
Pole is connect with the switch module, and the first end of the first resistor R1 is connect with the grid of the first metal-oxide-semiconductor T1, and described
The second end of one resistance R1 is connect with the source electrode of the first metal-oxide-semiconductor T1.
Specifically, second gating circuit includes the second metal-oxide-semiconductor T2 and second resistance R2, the second metal-oxide-semiconductor T2's
Grid is connect with the second signal amplifying circuit 700, and the source electrode of the second metal-oxide-semiconductor T2 is connect with power supply, the 2nd MOS
The drain electrode of pipe T2 is connect with the switch module, and the first end of the second resistance R2 and the grid of the second metal-oxide-semiconductor T2 connect
It connects, the second end of the second resistance R2 is connect with the source electrode of the second metal-oxide-semiconductor T2.
It is understood that the first metal-oxide-semiconductor T1 in first gating circuit 300 is NPN type, in high input voltage
It is connected, the second metal-oxide-semiconductor T2 in the second choosing energy circuit 400 is positive-negative-positive, is connected when inputting low-voltage, in drive signal
When input is high level, after being handled by first signal processing circuit 100 and second signal processing circuit 200, output
Low level so that the first metal-oxide-semiconductor T1 shutdowns, the second metal-oxide-semiconductor T2 is open-minded, plays before exporting high level, is first turned off the first metal-oxide-semiconductor
T1, then the effect of the second metal-oxide-semiconductor T2 is opened, it similarly, plays before exporting negative level, is first turned off the second metal-oxide-semiconductor T2 and opens again
The effect of one metal-oxide-semiconductor T1.
It in the present embodiment, can also be in first signal amplification circuit and the first gating circuit in the driving circuit
Between the protection circuit that is composed in parallel by third capacitance C3 and third voltage-stabiliser tube DZ3 is set, equally can also be in second letter
The protection electricity that setting is composed in parallel by the 4th capacitance C4 and the 4th voltage-stabiliser tube DZ4 number between amplifying circuit and the second gating circuit
Road, voltage-stabiliser tube DZ3, DZ4 play clamper protective effect, prevent first metal-oxide-semiconductor and the second metal-oxide-semiconductor from opening and shutdown moment
Excessively high due to voltage spikes damages IGBT device, and third capacitance C3 and the 4th capacitance C4 play the role of current potential fixed point lifting, guarantee compared with
High output current potential, to realize very strong driving output.
Specifically, the driving circuit includes output protection circuit 1000, and the output protection circuit 1000 includes third
Resistance R3, the first voltage-stabiliser tube DZ1, the second voltage-stabiliser tube DZ2 and the first capacitance C1, the first end of the 3rd resistor R3 and described the
The source electrode of one metal-oxide-semiconductor T1 connects, and the second end of the 3rd resistor R3 is connect with the positive terminal of the first voltage-stabiliser tube DZ1, institute
The negative pole end for stating the first voltage-stabiliser tube DZ1 is connect with the drain electrode of the first metal-oxide-semiconductor T1, the positive terminal of the second voltage-stabiliser tube DZ2
It is connect with the negative pole end of the first voltage-stabiliser tube DZ1, the negative pole end of the second voltage-stabiliser tube DZ2 and the first voltage-stabiliser tube DZ1
Negative pole end connection, the positive terminal and negative pole end of the first capacitance C1 and the second voltage-stabiliser tube DZ2 are separately connected.
It is understood that since output has peak voltage when off, it is steady to increase the first voltage-stabiliser tube DZ1 and second
Pressure pipe DZ2 can carry out pressure stabilization function, prevent damage IGBT.
The present invention also proposes a kind of electric power variable flow device, which includes power supply VCC and drive as described above
Dynamic circuit, the concrete structure of the driving circuit is with reference to above-described embodiment, since this electric power variable flow device uses above-mentioned all realities
Whole technical solutions of example, therefore at least all advantageous effects caused by the technical solution with above-described embodiment are applied, herein
No longer repeat one by one.
The electric power variable flow device can be applied in the equipment such as air-conditioning, screw machine.
The foregoing is merely the preferred embodiment of the present invention, are not intended to limit the scope of the invention, every at this
Under the inventive concept of invention, using equivalent structure transformation made by description of the invention and accompanying drawing content, or directly/use indirectly
In the scope of patent protection that other related technical areas are included in the present invention.
Claims (10)
1. a kind of driving circuit, which is characterized in that the driving circuit includes:First signal processing circuit, second signal processing
Circuit, the first gating circuit and the second gating circuit, first signal processing circuit are connect with first gating circuit, institute
The first gating circuit is stated to connect with switch module;The second signal processing circuit is connect with second gating circuit, described
Second gating circuit is connect with the switch module;Wherein
First signal processing circuit and second signal processing circuit, for receiving drive signal, when drive signal is first
When level, the second signal processing circuit turns off second gating circuit, first letter after first preset time that is delayed
Number processing circuit opens first gating circuit so that first gating circuit exports the first predeterminated voltage to the switch
Module;
When drive signal is second electrical level, first signal processing circuit turns off first gating circuit, delay second
The second signal processing circuit opens second gating circuit after preset time so that second gating circuit output the
Two predeterminated voltages are to the switch module.
2. driving circuit as described in claim 1, which is characterized in that the driving circuit further includes the first signal amplification circuit
With second signal amplifying circuit, first signal amplification circuit and first signal processing circuit and the first gating circuit point
It does not connect, the second signal amplifying circuit is separately connected with the second signal processing circuit and the second gating circuit.
3. driving circuit as claimed in claim 2, which is characterized in that first signal processing circuit include first with it is non-
Door, the second NAND gate and third NAND gate, it is defeated that first NAND gate, the second NAND gate and third NAND gate respectively include first
Enter end, the second input terminal and output end, the first input end and the second input terminal of first NAND gate and receives the drive jointly
Dynamic signal, the output end of first NAND gate are connect with the first input end of second NAND gate, second NAND gate
The second input terminal receive enable signal, the first input end of the output end of second NAND gate and the third NAND gate and
Second input terminal connects, and the output end of the third NAND gate is connect with first signal amplification circuit.
4. driving circuit as claimed in claim 3, which is characterized in that first signal processing circuit further includes the first signal
Protect circuit, the output end of the first signal protection circuit and first NAND gate and the second of second NAND gate defeated
Enter end connection.
5. driving circuit as claimed in claim 2, which is characterized in that the second signal processing circuit include the 4th with it is non-
Door, the 4th NAND gate includes first input end, the second input terminal and output end, the first input end of the 4th NAND gate
Receive drive signal, the second input terminal of the 4th NAND gate receives enable signal, the output end of the 4th NAND gate with
The second signal amplifying circuit connection.
6. driving circuit as claimed in claim 5, which is characterized in that the second signal processing circuit further includes second signal
Protect circuit, second signal protection circuit on one side receives the drive signal, and the of the other end and the 4th NAND gate
One input terminal connects.
7. the driving circuit as described in any one of claim 1 to 6, which is characterized in that first gating circuit includes
First metal-oxide-semiconductor and first resistor, the grid of first metal-oxide-semiconductor are connect with first signal amplification circuit, the first MOS
The source electrode of pipe is grounded, and the drain electrode of first metal-oxide-semiconductor is connect with the switch module, the first end of the first resistor with it is described
The grid of first metal-oxide-semiconductor connects, and the second end of the first resistor is connect with the source electrode of first metal-oxide-semiconductor.
8. the driving circuit as described in any one of claim 1 to 6, which is characterized in that second gating circuit includes
Second metal-oxide-semiconductor and second resistance, the grid of second metal-oxide-semiconductor are connect with the second signal amplifying circuit, the 2nd MOS
The source electrode of pipe is connect with power supply, and the drain electrode of second metal-oxide-semiconductor is connect with the switch module, the first end of the second resistance
It is connect with the grid of second metal-oxide-semiconductor, the second end of the second resistance is connect with the source electrode of second metal-oxide-semiconductor.
9. driving circuit as claimed in claim 7, which is characterized in that the driving circuit includes output protection circuit, described
Output protection circuit includes 3rd resistor, the first voltage-stabiliser tube, the second voltage-stabiliser tube and the first capacitance, the first end of the 3rd resistor
It is connect with the source electrode of first metal-oxide-semiconductor, the second end of the 3rd resistor is connect with the positive terminal of first voltage-stabiliser tube, institute
The negative pole end for stating the first voltage-stabiliser tube is connect with the drain electrode of first metal-oxide-semiconductor, the positive terminal of second voltage-stabiliser tube and described the
The negative pole end of one voltage-stabiliser tube connects, and the negative pole end of second voltage-stabiliser tube is connect with the negative pole end of first voltage-stabiliser tube, described
The positive terminal and negative pole end of capacitance and second voltage-stabiliser tube are separately connected.
10. a kind of electric power variable flow device, which is characterized in that the electric power variable flow device includes such as claim 1-9 any one
Driving circuit.
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