CN108648999A - Method for packing semiconductor - Google Patents
Method for packing semiconductor Download PDFInfo
- Publication number
- CN108648999A CN108648999A CN201810431453.8A CN201810431453A CN108648999A CN 108648999 A CN108648999 A CN 108648999A CN 201810431453 A CN201810431453 A CN 201810431453A CN 108648999 A CN108648999 A CN 108648999A
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- CN
- China
- Prior art keywords
- machine
- semiconductor
- chip
- production equipment
- road production
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67155—Apparatus for manufacturing or treating in a plurality of work-stations
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67253—Process monitoring, e.g. flow or thickness monitoring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67276—Production flow monitoring, e.g. for increasing throughput
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Automation & Control Theory (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
Abstract
This application discloses a kind of method for packing semiconductor, are packaged to semiconductor using sealed in unit, and the sealed in unit includes preceding road production equipment, rear road production equipment, main control computer and optical detector；Preceding road production equipment includes wafer lapping machine, loader, scribing machine, chip mounter, baking machine and gold thread bonding machine；By transmitting band connection between preceding road production equipment, the exit of wafer lapping machine, chip mounter and gold thread bonding machine is connect with the detection mouth of optical detector respectively, and optical detector is connect with main control computer；Road production equipment includes plastic packaging machine, cutting machine, electroplating machine, apparatus for baking, printing equipment and molding machine afterwards, passes through transmission band connection between rear road production equipment；Plastic packaging machine is with gold thread bonding machine by transmitting band connection.Production line and production equipment all have versatility in the present processes, this is all very convenient for encapsulation user, circuit board producer, semiconductor producer, and convenient for standardization.
Description
Technical field
The present invention relates to technical field of semiconductors, and in particular to a kind of method for packing semiconductor.
Background technology
Semiconductor packages refers to that will process to obtain individual chips according to product type and functional requirement by the wafer of test
Process.Encapsulation process is：Wafer from the preceding road technique of wafer is by being cut into small chip after scribing process（Die）,
Then the chip of well cutting glue is mounted to corresponding substrate（Lead frame）On the island of frame, ultra-fine metal is recycled
（Golden tin copper aluminium）Conducting wire or electroconductive resin are by the landing pad of chip（Bond Pad）It is connected to the respective pins of substrate
（Lead）, and constitute required circuit；Then packaging protection is subject to plastic shell to independent chip again, is gone back after plastic packaging
Sequence of operations is carried out, finished product test is carried out after the completion of encapsulation, is generally gone through into inspection Incoming, test Test and packaging
The processes such as Packing, are finally put in storage shipment.
Semiconductor packing producing line processing step is various, and machine number is big, while the product category produced is generally up to
Ten is several, and the processing step of this ten several prods will appear different degrees of difference, it is assumed that machinery equipment failure etc. is no
The generation of certainty factor so that the abnormal state of semiconductor packages manufacture system is complicated.
Invention content
The object of the present invention is to provide a kind of method for packing semiconductor, realize encapsulation automation, greatly reduce bad
The time that product is reprocessed, production efficiency is improved, has preferable market application prospect.
The invention is realized in this way：
A kind of method for packing semiconductor is packaged semiconductor using sealed in unit, and the sealed in unit includes preceding road life
Produce equipment, rear road production equipment, main control computer and optical detector；
Preceding road production equipment includes wafer lapping machine, loader, scribing machine, chip mounter, baking machine and gold thread bonding machine；Preceding road production is set
By transmitting band connection between standby, the exit of wafer lapping machine, chip mounter and gold thread bonding machine respectively with the detection of optical detector
Mouth connection, optical detector are connect with main control computer；
Road production equipment includes plastic packaging machine, cutting machine, electroplating machine, apparatus for baking, printing equipment and molding machine, rear road production afterwards
By transmitting band connection between equipment；Plastic packaging machine is with gold thread bonding machine by transmitting band connection.
Packaging method is as follows：
（1）Grinding：Semiconductor is sent to by conveyer belt in wafer lapping machine, and the grinding wheel rotated in wafer lapping machine, by wafer wear down, is incited somebody to action from the back side
Wafer is ground to specified thickness；
（2）Load：Semiconductor is sent to by conveyer belt in loader, and semiconductor face down is fixed on the true of workbench in loader
It on suction disk, then spreads stainless steel wafer and fixes iron hoop, then cover the blue film of upper viscosity on iron hoop, finally apply pressure, indigo plant
Film, wafer and iron hoop are bonded together；
（3）Scribing：Semiconductor is sent to by conveyer belt in scribing machine, the diamond blade rotated in scribing machine in cutting groove back and forth
It is mobile, the chip in semiconductor is detached；
（4）Patch：Semiconductor is sent to by conveyer belt in chip mounter, the thimble in chip mounter below up pushes up chip from blue film,
Vacuum slot up inhales chip simultaneously, and chip and film indigo plant are detached from；Liquid-state epoxy resin is coated onto to the platform slide glass of lead frame
On platform；Chip is pasted on the lead frame for coating epoxy resin；
（5）Wire bonding：Semiconductor is sent to by conveyer belt in gold thread bonding machine, with gold thread by the pin of lead frame and chip
Pad connects；
（6）Postchannel process：Chip and lead frame for carrying chip are encapsulated by plastic packaging machine epoxy resin together, are cut
Off line cuts company's muscle between pin, and after the plating of electroplating machine, semiconductor is fixed in apparatus for baking to electroplated layer
High temperature ageing processing is carried out, then identification is stamped by printing equipment, then semiconductor is fixed on die forming machine, knife
Then tool detaches device with lead frame from upper toward stamping, with machine die that semiconductor is stamping.
Main control computer uses windows10 operating systems；32 or 64 storage servers can be used in hardware architecture,
4G-8G memories, 4 core high-performance CPU, 128 strong encryption fire walls.
The advantages of the application, is as follows：
1, the application method for packing semiconductor, easy to operate, reliability is high, reduces the frequency participated in by hand, maximumlly real
Existing automatic test, effectively solves the problems, such as various existing for current semiconductor packages；
2, the application method for packing semiconductor, production line and production equipment all have versatility, this is for encapsulation user, circuit
Plate producer, semiconductor producer are all very convenient, and convenient for standardization.
3, the application method for packing semiconductor realizes encapsulation automation, greatly reduces the time that bad products are reprocessed,
Production efficiency is improved, has preferable market application prospect.
Description of the drawings
Fig. 1 is the process route chart of the application method for packing semiconductor.
Specific implementation mode
The application method for packing semiconductor is further described below in conjunction with attached drawing.
As shown in Figure 1, a kind of method for packing semiconductor, is packaged semiconductor using sealed in unit, the encapsulation
Equipment includes preceding road production equipment, rear road production equipment, main control computer and optical detector；
Preceding road production equipment includes wafer lapping machine, loader, scribing machine, chip mounter, baking machine and gold thread bonding machine；Preceding road production is set
By transmitting band connection between standby, the exit of wafer lapping machine, chip mounter and gold thread bonding machine respectively with the detection of optical detector
Mouth connection, optical detector are connect with main control computer；
Road production equipment includes plastic packaging machine, cutting machine, electroplating machine, apparatus for baking, printing equipment and molding machine, rear road production afterwards
By transmitting band connection between equipment；Plastic packaging machine is with gold thread bonding machine by transmitting band connection.
Packaging method is as follows：
（1）Grinding：Semiconductor is sent to by conveyer belt in wafer lapping machine, and the grinding wheel rotated in wafer lapping machine, by wafer wear down, is incited somebody to action from the back side
Wafer is ground to specified thickness；
（2）Load：Semiconductor is sent to by conveyer belt in loader, and semiconductor face down is fixed on the true of workbench in loader
It on suction disk, then spreads stainless steel wafer and fixes iron hoop, then cover the blue film of upper viscosity on iron hoop, finally apply pressure, indigo plant
Film, wafer and iron hoop are bonded together；
（3）Scribing：Semiconductor is sent to by conveyer belt in scribing machine, the diamond blade rotated in scribing machine in cutting groove back and forth
It is mobile, the chip in semiconductor is detached；
（4）Patch：Semiconductor is sent to by conveyer belt in chip mounter, the thimble in chip mounter below up pushes up chip from blue film,
Vacuum slot up inhales chip simultaneously, and chip and film indigo plant are detached from；Liquid-state epoxy resin is coated onto to the platform slide glass of lead frame
On platform；Chip is pasted on the lead frame for coating epoxy resin；
（5）Wire bonding：Semiconductor is sent to by conveyer belt in gold thread bonding machine, with gold thread by the pin of lead frame and chip
Pad connects；
（6）Postchannel process：Chip and lead frame for carrying chip are encapsulated by plastic packaging machine epoxy resin together, are cut
Off line cuts company's muscle between pin, and after the plating of electroplating machine, semiconductor is fixed in apparatus for baking to electroplated layer
High temperature ageing processing is carried out, then identification is stamped by printing equipment, then semiconductor is fixed on die forming machine, knife
Then tool detaches device with lead frame from upper toward stamping, with machine die that semiconductor is stamping.
Main control computer uses windows10 operating systems；32 or 64 storage servers can be used in hardware architecture,
4G-8G memories, 4 core high-performance CPU, 128 strong encryption fire walls.
Although the embodiments of the present invention have been disclosed as above, but its is not only in the description and the implementation listed
With it can be fully applied to various fields suitable for the present invention, for those skilled in the art, can be easily
Realize other modification, therefore without departing from the general concept defined in the claims and the equivalent scope, the present invention is simultaneously unlimited
In specific details and legend shown and described herein.
Claims (2)
1. a kind of method for packing semiconductor, it is characterised in that：Semiconductor is packaged using sealed in unit, the encapsulation is set
Standby includes preceding road production equipment, rear road production equipment, main control computer and optical detector；
Preceding road production equipment includes wafer lapping machine, loader, scribing machine, chip mounter, baking machine and gold thread bonding machine；Preceding road production is set
By transmitting band connection between standby, the exit of wafer lapping machine, chip mounter and gold thread bonding machine respectively with the detection of optical detector
Mouth connection, optical detector are connect with main control computer；
Road production equipment includes plastic packaging machine, cutting machine, electroplating machine, apparatus for baking, printing equipment and molding machine, rear road production afterwards
By transmitting band connection between equipment；Plastic packaging machine is with gold thread bonding machine by transmitting band connection；
Packaging method is as follows：
（1）Grinding：Semiconductor is sent to by conveyer belt in wafer lapping machine, and the grinding wheel rotated in wafer lapping machine, by wafer wear down, is incited somebody to action from the back side
Wafer is ground to specified thickness；
（2）Load：Semiconductor is sent to by conveyer belt in loader, and semiconductor face down is fixed on the true of workbench in loader
It on suction disk, then spreads stainless steel wafer and fixes iron hoop, then cover the blue film of upper viscosity on iron hoop, finally apply pressure, indigo plant
Film, wafer and iron hoop are bonded together；
（3）Scribing：Semiconductor is sent to by conveyer belt in scribing machine, the diamond blade rotated in scribing machine in cutting groove back and forth
It is mobile, the chip in semiconductor is detached；
（4）Patch：Semiconductor is sent to by conveyer belt in chip mounter, the thimble in chip mounter below up pushes up chip from blue film,
Vacuum slot up inhales chip simultaneously, and chip and film indigo plant are detached from；Liquid-state epoxy resin is coated onto to the platform slide glass of lead frame
On platform；Chip is pasted on the lead frame for coating epoxy resin；
（5）Wire bonding：Semiconductor is sent to by conveyer belt in gold thread bonding machine, with gold thread by the pin of lead frame and chip
Pad connects；
（6）Postchannel process：Chip and lead frame for carrying chip are encapsulated by plastic packaging machine epoxy resin together, are cut
Off line cuts company's muscle between pin, and after the plating of electroplating machine, semiconductor is fixed in apparatus for baking to electroplated layer
High temperature ageing processing is carried out, then identification is stamped by printing equipment, then semiconductor is fixed on die forming machine, knife
Then tool detaches device with lead frame from upper toward stamping, with machine die that semiconductor is stamping.
2. method for packing semiconductor according to claim 1, it is characterised in that：The main control computer uses
Windows10 operating systems；Hardware architecture can be used 32 or 64 storage servers, 4G-8G memories, 4 core high-performance CPU,
128 strong encryption fire walls.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810431453.8A CN108648999A (en) | 2018-05-08 | 2018-05-08 | Method for packing semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810431453.8A CN108648999A (en) | 2018-05-08 | 2018-05-08 | Method for packing semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108648999A true CN108648999A (en) | 2018-10-12 |
Family
ID=63749752
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810431453.8A Pending CN108648999A (en) | 2018-05-08 | 2018-05-08 | Method for packing semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108648999A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109473361A (en) * | 2018-10-24 | 2019-03-15 | 深圳赛意法微电子有限公司 | The parallel test method of semiconductor power device |
| CN115954275A (en) * | 2022-12-28 | 2023-04-11 | 无锡市宏湖微电子有限公司 | Chip packaging method and device based on hot-pressing spherical bonding and chip packaging structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102983108A (en) * | 2012-11-27 | 2013-03-20 | 杭州士兰集成电路有限公司 | Packaging structure and packaging technology |
| CN204067310U (en) * | 2014-05-30 | 2014-12-31 | 上海芯哲微电子科技有限公司 | A kind of SMT paster encapsulating structure |
| CN106328517A (en) * | 2016-10-29 | 2017-01-11 | 揭阳市先捷电子有限公司 | Diode packaging process |
-
2018
- 2018-05-08 CN CN201810431453.8A patent/CN108648999A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102983108A (en) * | 2012-11-27 | 2013-03-20 | 杭州士兰集成电路有限公司 | Packaging structure and packaging technology |
| CN204067310U (en) * | 2014-05-30 | 2014-12-31 | 上海芯哲微电子科技有限公司 | A kind of SMT paster encapsulating structure |
| CN106328517A (en) * | 2016-10-29 | 2017-01-11 | 揭阳市先捷电子有限公司 | Diode packaging process |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN109473361A (en) * | 2018-10-24 | 2019-03-15 | 深圳赛意法微电子有限公司 | The parallel test method of semiconductor power device |
| CN115954275A (en) * | 2022-12-28 | 2023-04-11 | 无锡市宏湖微电子有限公司 | Chip packaging method and device based on hot-pressing spherical bonding and chip packaging structure |
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| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
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| WD01 | Invention patent application deemed withdrawn after publication | ||
| WD01 | Invention patent application deemed withdrawn after publication |
Application publication date: 20181012 |