CN108362408B - Pressure sensor and method for manufacturing the same - Google Patents
Pressure sensor and method for manufacturing the same Download PDFInfo
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- CN108362408B CN108362408B CN201810190163.9A CN201810190163A CN108362408B CN 108362408 B CN108362408 B CN 108362408B CN 201810190163 A CN201810190163 A CN 201810190163A CN 108362408 B CN108362408 B CN 108362408B
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- G01—MEASURING; TESTING
- G01L—MEASURING FORCE, STRESS, TORQUE, WORK, MECHANICAL POWER, MECHANICAL EFFICIENCY, OR FLUID PRESSURE
- G01L1/00—Measuring force or stress, in general
- G01L1/14—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators
- G01L1/142—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors
- G01L1/148—Measuring force or stress, in general by measuring variations in capacitance or inductance of electrical elements, e.g. by measuring variations of frequency of electrical oscillators using capacitors using semiconductive material, e.g. silicon
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Abstract
The present invention relates to a pressure sensor and a method of manufacturing the same, the pressure sensor including: a substrate; the passivation layer is positioned on the surface of the substrate; the first lower electrode, the second lower electrode and the connecting electrode are positioned on the surface of the passivation layer, and the connecting electrode is connected with the first lower electrode and the second lower electrode; the first upper electrode is supported above the first lower electrode, and the first upper electrode and the first lower electrode form an induction capacitor; a second upper electrode supported above the second lower electrode, wherein a supporting part is arranged between the first upper electrode and the first lower electrode, and the second upper electrode and the second lower electrode form a reference capacitor; and the insulating layer covers the first upper electrode and the second upper electrode. The method has simple manufacturing steps and improves the manufacturability of the process.
Description
Technical Field
The invention relates to the technical field of MEMS, in particular to a pressure sensor and a manufacturing method thereof.
Background
A pressure sensor is a transducer that converts a pressure signal into an electrical signal.
According to different working principles, pressure sensors are mainly classified into piezoresistive type, capacitive type, piezoelectric type, and the like. At present, the piezoresistive pressure sensor is the mainstream technology of the pressure sensor at present due to the advantages of high compatibility between the manufacturing process and the semiconductor process, simple manufacturing process, simple interface circuit and the like. However, the piezoresistive pressure sensor has the disadvantages of poor temperature characteristics, low sensitivity, large power consumption and the like, and is not suitable for application fields with low power consumption and high precision.
The capacitive pressure sensor has the advantages of small size, low cost, good temperature characteristic, high precision, low power consumption and the like, so that the capacitive pressure sensor technology is paid more and more attention. A capacitive pressure sensor is a transducer that converts a pressure signal into a capacitive signal. The capacitance type pressure sensor comprises a variable capacitor, wherein one or two electrodes of the variable capacitor are formed by a pressure sensitive film, under the action of external pressure, the pressure sensitive film serving as a capacitance electrode deforms to change a capacitance gap, so that a capacitance value is changed, and the change of the capacitance value is converted into a voltage or current signal through the processing of a subsequent circuit. The capacitance type pressure sensor has high precision and good temperature stability, and can be well applied to altimeters and other related applications.
However, in the manufacturing process of the capacitive pressure sensor in the prior art, a complicated silicon oxide sacrificial layer hollowing process and a process of sealing the release hole to form the vacuum cavity are involved, so that the process steps are complicated, and the process manufacturability is poor.
Disclosure of Invention
The invention aims to provide a pressure sensor and a manufacturing method thereof, which have simple manufacturing steps and improve the manufacturability of the process.
In order to solve the above problem, the present invention provides a pressure sensor including a pressure sensing chip, the pressure sensing chip including: a substrate; the passivation layer is positioned on the surface of the substrate; the first lower electrode, the second lower electrode, the peripheral electrode and the connecting electrode are positioned on the surface of the passivation layer, the connecting electrode is connected with the first lower electrode and the second lower electrode, and the peripheral electrode is positioned on the surface of the passivation layer and surrounds the first lower electrode, the second lower electrode and the connecting electrode; a support layer positioned on the surfaces of the connection electrode and the peripheral electrode and surrounding the first lower electrode, the second lower electrode and the connection electrode; an insulating layer, a first upper electrode and a second upper electrode on a surface of one side of the insulating layer;
the insulating layer is bonded on the top of the supporting layer, and a cavity is formed between the insulating layer and the passivation layer, so that the first upper electrode is positioned above the first lower electrode, the second upper electrode is positioned above the second lower electrode, the first upper electrode and the first lower electrode form an induction capacitor, and the second upper electrode and the second lower electrode form a reference capacitor.
Optionally, the pressure sensing chip further includes a peripheral electrode located on the surface of the passivation layer and surrounding the first lower electrode, the second lower electrode and the connection electrode.
Optionally, the pressure sensing chip further includes: the first through hole penetrates through the insulating layer and is positioned on the surfaces of the first upper electrode and the second upper electrode; the first metal connecting line is filled in the first through hole, and the first bonding pad is positioned on the surface of the insulating layer and connected with the first metal connecting line; the second through hole penetrates through the insulating layer and is positioned on the surface of the peripheral electrode; and the second metal connecting wire is filled in the second through hole, and the second bonding pad is positioned on the surface of the insulating layer and connected with the second metal connecting wire and used for connecting direct current bias.
Optionally, the pressure sensing chip includes: two sensing capacitors and two reference capacitors.
Optionally, the pressure sensing chip further includes: and the stress layers are positioned on the surfaces of the insulating layer, the first upper electrode and the second upper electrode.
Optionally, the stress layer is a composite film including silicon nitride and tetraethoxysilane.
Optionally, the support portion includes two or more support columns; or the supporting part comprises more than two long-strip-shaped supporting strips which are arranged in a crossed or parallel mode.
Optionally, the method further includes: the circuit board, the application specific integrated circuit chip and the metal cap with the air hole; the special integrated circuit chip is adhered to the surface of the circuit board through a first silica gel layer; the pressure sensing chip is adhered to the surface of the special integrated circuit chip through a second silica gel layer; the metal cap is positioned on the surface of the circuit board, and forms a cavity for accommodating the application specific integrated circuit chip and the pressure sensing chip together with the circuit board.
In order to solve the above problem, an embodiment of the present invention further provides a method for manufacturing a pressure sensor, including forming a pressure sensing chip, the method for forming the pressure sensing chip further including: providing a first substrate; forming a passivation layer on the surface of the first substrate; forming a first lower electrode, a second lower electrode and a connecting electrode on the surface of the passivation layer, wherein the connecting electrode is connected with the first lower electrode and the second lower electrode; forming a support part on the surface of the second lower electrode; providing a second substrate; forming an insulating layer on the surface of the second substrate; forming a first upper electrode and a second upper electrode on the surface of the insulating layer; bonding the second substrate and the first substrate to enable the first upper electrode to be located above the first lower electrode, the first upper electrode and the first lower electrode form an induction capacitor, the second upper electrode is located above the second lower electrode, and the second upper electrode and the second lower electrode form a reference capacitor; and removing the second substrate.
Alternatively, the peripheral electrode disposed around the first lower electrode, the second lower electrode, and the connection electrode is formed at the same time as the first lower electrode, the second lower electrode, and the connection electrode are formed.
Optionally, the method further includes: etching the insulating layer to the surfaces of the first upper electrode and the second upper electrode to form a first through hole; etching the insulating layer to the surface of the peripheral electrode to form a second through hole; and filling metal materials in the first through hole and the second through hole to form a first metal connecting line positioned in the first through hole, a second metal connecting line positioned in the second through hole, a first bonding pad positioned on the surface of the insulating layer and connected with the first metal connecting line, and a second bonding pad positioned on the surface of the insulating layer and connected with the second metal connecting line.
Optionally, two sensing capacitors and two reference capacitors are formed.
Optionally, the method further includes: before bonding, forming a stress material layer on the surfaces of the insulating layer, the first upper electrode and the second upper electrode, and flattening the stress material layer to form a stress layer covering the insulating layer, the first upper electrode and the second upper electrode.
Optionally, the stress layer is a composite film including silicon nitride and tetraethoxysilane.
Optionally, the support part comprises two upper support columns; or the supporting part comprises more than two long-strip-shaped supporting strips which are arranged in a crossed or parallel mode.
Optionally, the method further includes: providing a circuit board, an application specific integrated circuit chip and a metal cap with air holes; coating a first silica gel layer on the surface of the circuit board, and placing the special integrated circuit chip on the surface of the first silica gel layer; coating a second silica gel layer on the surface of the special integrated circuit chip, and placing the formed pressure sensing chip on the surface of the second silica gel layer; bonding the pressure sensing chip, the special integrated circuit chip and the circuit board through gold wires to form electric connection; and welding a metal cap on the surface of the circuit board to form a cavity for accommodating the application specific integrated circuit chip and the pressure sensing chip together with the circuit board.
The manufacturing method of the pressure sensor of the invention forms a groove on the surface of the first substrate in advance to be used as a capacitor gap, the upper electrode and the lower electrode of the capacitor are respectively formed on the surfaces of the two substrates, and then the first substrate and the second substrate are bonded together by a wafer bonding technology, thereby forming the capacitive pressure sensor. The method avoids the loaded sacrificial layer hollowing process and the process of sealing the release hole to form the vacuum cavity, and greatly improves the manufacturability of the process. The variable sensing capacitor and the fixed reference capacitor are formed simultaneously, when the external air pressure changes, the sensing capacitor changes, the reference capacitor does not change, and the accurate pressure value can be obtained through data processing.
Drawings
FIG. 1 is a schematic block diagram of a pressure sensor according to an embodiment of the present invention;
FIG. 2 is a schematic top view of a pressure sensing die according to an embodiment of the present invention;
fig. 3 to 16 are schematic structural diagrams illustrating a process of forming a pressure sensor according to an embodiment of the present invention.
Detailed Description
The following describes in detail embodiments of the pressure sensor and the method for manufacturing the same according to the present invention with reference to the accompanying drawings.
Fig. 1 is a schematic block diagram of a pressure sensor 100 according to an embodiment of the invention.
The pressure sensor 100 includes a pressure sensing chip 101, an application specific integrated circuit chip (ASIC)102, and an output interface 103. The pressure sensing chip 101 is a MEMS sensor. In this embodiment, the pressure sensing chip 101 is composed of 4 bridge arm capacitors, which include a pair of sensing capacitors Cs and a pair of reference capacitors Cr. When the external air pressure changes, the pressure sensitive film of the sensing capacitor Cs of the pressure sensing chip 101 deforms, the sensing capacitor Cs changes, the reference capacitor Cr does not change, deltaC/C is output, and the pressure value in the current environment is output through the ASIC readout circuit.
Fig. 2 is a schematic top view of a pressure sensing chip 200 according to an embodiment of the invention.
The pressure sensing chip 200 includes a substrate 201, and capacitors 202, 203, 204, and 205, which are a pair of sensing capacitors and a pair of reference capacitors, respectively. For example, the capacitor 202 and the capacitor 203 are sensing capacitors Cs, and the capacitor 204 and the capacitor 205 are reference capacitors Cr; in other embodiments, the sensing capacitance and the reference capacitance may be in other combinations. In this embodiment, the capacitors 202 to 204 are arranged in an array of two rows and two columns, but in other embodiments of the present invention, the capacitors 202 to 204 may be arranged in other forms, for example, in a row and four columns; the capacitors 202-205 may be a plate capacitor, a circular capacitor, or any other capacitor, and are not limited herein. The substrate 201 is further formed with pads 206 connected to the respective capacitors for interfacing with an application specific integrated circuit chip (ASIC) and outputting a detection signal to the ASIC.
Fig. 3 to 16 are schematic structural diagrams illustrating a forming process of a pressure sensing chip according to an embodiment of the invention. Specifically, a cross section along A-B of the pressure sensing die 200 is shown as an illustration.
Referring to fig. 3, a first substrate 300 is provided.
The first base 300 is a single crystal silicon substrate, and in other specific embodiments, the first base 300 may also be another semiconductor material such as SiGe, Ge, and the like.
The first substrate 300 has a first surface 301.
Referring to fig. 4, a passivation layer 401 is formed on the first surface 301 of the first substrate 300.
The passivation layer 401 is formed on the first surface 301 of the first substrate 300 by using a low pressure chemical vapor deposition or thermal oxidation process. Specifically, the material of the passivation layer 401 may be silicon dioxide, silicon nitride, or other nitride. The passivation layer 401 is used to isolate the first substrate 300 from a capacitor formed later.
Referring to fig. 5a, a first lower electrode 502, a second lower electrode 503 and a connection electrode 504 are formed on the surface of the passivation layer 401, and the connection electrode 504 is connected to the first lower electrode 502 and the second lower electrode 503.
Specifically, the method for forming the first lower electrode 502, the second lower electrode 503, and the connection electrode 504 includes: depositing an electrode material layer on the surface of the passivation layer 401, forming a patterned photoresist layer or a patterned mask layer on the surface of the electrode material layer, and etching the electrode material layer by using the patterned photoresist layer or the patterned mask layer as a mask to form a specific pattern including the first lower electrode 502, the second lower electrode 503 and the connection electrode 504, wherein the connection electrode 504 is connected with the first lower electrode 502 and the second lower electrode 503. In this embodiment, the first lower electrode 502, the second lower electrode 503 and the connection electrode 504 are located in the same plane and are processed at the same time, and are made of the same material, preferably, doped polysilicon material, which has a conductive function and plays the same role as metal; and the polysilicon is taken as a material close to the silicon material, and can be easily subjected to stress matching when being combined with other materials, such as dielectric materials such as silicon oxide or silicon nitride, so that electrode warping is reduced, electrode flatness is improved, and finally consistency of capacitance values is improved. In other embodiments of the present invention, the electrode material layer may be other conductive materials.
In fig. 5a, only one first lower electrode 502 and one second lower electrode 503 are shown, and in the embodiment, referring to fig. 2, two first lower electrodes 502 and two second lower electrodes 503 are formed so as to form two sensing capacitors and two reference capacitors in the following. In other embodiments, more than two sensing capacitors may be formed, with a corresponding number of reference capacitors.
In this embodiment, the first lower electrode 502 is a lower electrode of the sensing capacitor, the second lower electrode 503 is a lower electrode of the reference capacitor, and the connection electrode 504 is a connection electrode of the first lower electrode 502 and the second lower electrode 503 of the sensing capacitor and the reference capacitor, respectively.
In this specific embodiment, the first lower electrode 502, the second lower electrode 503, and the connection electrode 504 are formed by etching the electrode material layer, and the peripheral electrode 501 surrounding the first lower electrode 502, the second lower electrode 503, and the connection electrode 504 is also formed. The passivation layer 401 is disposed between the first and second lower electrodes 502 and 503 and the substrate 300, thereby generating a parasitic capacitance. The peripheral electrode 501 may be subsequently externally connected to a dc bias to reduce parasitic capacitance between the first and second lower electrodes 502, 503 and the substrate 300. In this embodiment, the peripheral electrode 501 is disposed in a loop and spaced apart from the first and second lower electrodes 502 and 503. In consideration of symmetry, the peripheral electrodes 501 are symmetrically arranged, and a higher flatness is required for facilitating subsequent bonding.
Referring to fig. 5b, fig. 5b is a schematic top view of the structure of fig. 5 a.
The peripheral electrode 501 is located in a peripheral area, and is isolated from the first lower electrode 502, the second lower electrode 503 and the connecting electrode 504 by a groove 506, so as to prevent short circuit; the first lower electrode 502, the second lower electrode 503, and the connection electrode 504 have a groove 505 therebetween. The widths of the grooves 505 and 506 may be the same or different. The widths of the grooves 505 and 506 may affect the chip size, and the widths of the grooves 505 and 506 may be generally limited to 20 μm to 30 μm or adjusted according to actual conditions on the premise of ensuring the isolation effect.
The connection electrode 504 is located between the first lower electrode 502 and the second lower electrode 503, and is connected by a connection line 507 located in the groove 505. The length of the connection line 507 is equal to the width of the groove 505, and in order to avoid the connection line 507 being too thin and easily broken, the width of the connection line 507 is preferably more than 20 μm.
Referring to fig. 6a, a support 601' is formed on the surface of the second bottom electrode 503.
In this embodiment, the support 601' is formed, and the support layer 601 and the support layer 602 are formed on the surfaces of the peripheral electrode 501 and the connection electrode 504, respectively.
Specifically, the method of forming the support 601' and the support 602 includes: forming a support material layer covering the surfaces of the passivation layer 401, the peripheral electrode 501, the first lower electrode 502, the second lower electrode 503 and the connection electrode 504; the layer of support material is patterned to form a support layer 601, a support layer 602, and a support 601'.
The material of the support material layer may be a dielectric material such as silicon oxide, silicon nitride, etc., and the support material layer may be formed by a thermal oxidation or chemical vapor deposition process. The size of the support layer 601 is smaller than that of the peripheral electrode 501, and the size of the support layer 602 is smaller than that of the connection electrode 504. The supporting portion 601 'is located on the surface of the second lower electrode 503 of the reference capacitor, and mainly plays a role of fixing and supporting, when external air pressure acts on the pressure sensitive films of the reference capacitor and the sensing capacitor, namely the upper electrodes of the reference capacitor and the sensing capacitor, the sensing capacitor changes due to the deformation of the pressure sensitive films, and the reference capacitor enables the pressure sensitive films of the reference capacitor part not to deform or the deformation is very small so as to be negligible due to the existence of the supporting portion 601'. Therefore, the reference capacitance is not changed, the sensing capacitance is changed, the Application Specific Integrated Circuit (ASIC) detects the variation of the output signal of the sensing capacitance, and the current air pressure value and temperature value are obtained through data processing.
Referring to fig. 6b, a top view of the second bottom electrode 503 of the reference capacitor bottom electrode with a support 601' formed on the surface is shown. In this embodiment, the supporting portion 601' includes two supporting bars arranged in a cross shape.
Referring to fig. 6c, a top view of another embodiment of the reference capacitor bottom electrode, the second bottom electrode 503, is shown. In this embodiment, the supporting portions 601' are arranged in a columnar array.
In another embodiment of the present invention, the support 601' is not limited to the two shapes. The support 601' includes two upper support columns; or the supporting portion 601' includes more than two strip-shaped supporting bars, and the more than two strip-shaped supporting bars are arranged in a crossing or parallel manner. The structure and the arrangement density of the supporting portions 601' may be set according to the size of the second lower electrode 503, so that the finally formed pressure sensitive film of the reference capacitor is not deformed by the external pressure, thereby ensuring that the capacitance of the reference capacitor does not change with the external pressure.
Referring to fig. 7, a second substrate 701 is provided, and an insulating layer is formed on a surface of the second substrate 701.
The second substrate 701 may be a silicon wafer, or may be a substrate material such as glass.
In this specific embodiment, the insulating layer includes an oxide layer 702 on the surface of the second substrate 701 and a nitride layer 703 on the surface of the oxide layer 702. Specifically, the oxide layer 702 may be a silicon oxide layer, and the nitride layer 703 may be a silicon nitride layer. The oxide layer 702 and the nitride layer 703 can be grown according to a certain thickness ratio to adjust the stress; the insulating layer formed of the oxide layer 702 and the nitride layer 703 functions as a passivation insulating layer.
In other embodiments of the present invention, the insulating layer may also include only a single layer of material, such as a silicon oxide layer or a silicon nitride layer.
Referring to fig. 8, a first upper electrode 801 and a second upper electrode 802 are formed on the surface of the insulating layer.
In this specific embodiment, depositing a polysilicon layer on the surface of the nitride layer 703, and etching the polysilicon layer to form an upper electrode pattern, includes: a first upper electrode 801 as an upper electrode of the sensing capacitor; and a second top electrode 802, which serves as a top electrode of the reference capacitor. The first upper electrode 801 and the second upper electrode 802 are made of the same material, the relative positions of the first upper electrode 801 and the second upper electrode 802 on the second substrate 701 are the same as the relative positions of the first lower electrode 502 and the second lower electrode 503 on the first substrate 300, and the areas of the first lower electrode 502 and the first upper electrode 801 are the same, so that an induction capacitor is formed; the second lower electrode 503 and the second upper electrode 802 have the same area, and form a reference capacitor.
Referring to fig. 9, a stress material layer 901 is formed on the surfaces of the nitride layer 703, the first upper electrode 801 and the second upper electrode 802.
In this embodiment, the stress material layer is a composite film of silicon nitride and tetraethyl orthosilicate (TEOS), and the stress material layer 901 is formed by a Low Pressure Chemical Vapor Deposition (LPCVD) process. The stress material layer 901 mainly plays a role in adjusting stress, and in the stress material layer 901, the ratio of silicon nitride to tetraethoxysilane is selected according to a stress value required in design.
The thickness of the stress material layer 901 is higher than the thicknesses of the first upper electrode lower 801 and the second upper electrode 802, so that the first lower electrode 801 and the second upper electrode 802 can both be stressed by the stress material layer 901.
In other specific embodiments, the stress material layer 901 may also be a stacked structure of multiple material layers, and the stress of the stress material layer 901 is adjusted by the number, material, thickness, and the like of the material layers. For example, the stress material layer 901 may be a stacked structure of a silicon nitride layer and an ethyl orthosilicate layer, or a stacked structure of silicon nitride, silicon oxide, and silicon oxynitride.
Referring to fig. 10, the stress material layer 901 is planarized to form a stress layer 1001 covering the insulating layer, the first upper electrode 801, and the second upper electrode 802.
Due to the existence of the first upper electrode 801 and the second upper electrode 802, the surface of the stress material layer 901 formed in fig. 9 is not flat, and in order to facilitate subsequent bonding, in this embodiment, a Chemical Mechanical Polishing (CMP) process is used to grind the stress material layer 901 flat to form a stress layer 1001, and the stress layer 1001 still covers the surfaces of the first upper electrode 801 and the second upper electrode 802.
Referring to fig. 11, the second substrate 701 and the first substrate 300 are bonded, such that the first upper electrode 801 is located above the first lower electrode 502, the first upper electrode 801 and the first lower electrode 502 form an inductive capacitor, the second upper electrode 802 is located above the second lower electrode 503, and the second upper electrode 802 and the second lower electrode 503 form a reference capacitor.
In this embodiment, the structure formed in fig. 10 is inversely buckled on the structure shown in fig. 6a, and bonding is performed by using a silicon dioxide-silicon dioxide bonding process, specifically, the support layer 601, the support layer 602, the support portion 601' and the stress layer 1001 are bonded by using a silicon dioxide-silicon dioxide bonding process, and the second substrate 701 is supported above the first substrate 300, so as to form the sensing capacitor and the reference capacitor.
Moreover, a cavity is formed between the first upper electrode 801 and the first lower electrode 502 of the sensing capacitor, and when the first upper electrode 801 deforms, the capacitance of the sensing capacitor changes. And a supporting portion 601' is provided between the second upper electrode 802 and the second lower electrode 503 of the reference capacitor for supporting, when the external pressure changes, the second upper electrode 802 will not deform, so that the capacitance value can be kept fixed as the reference capacitance value.
Referring to fig. 12, the second substrate 701 is removed.
The bonded second substrate 701 is thinned to the oxide layer 702 by adopting a CMP process, and the second substrate 701 is completely removed, so that the oxide layer 702 and the nitride layer 703 can sense the change of the external pressure, and the capacitance of the sensing capacitor changes along with the change of the first upper electrode 801 along with the pressure.
Referring to fig. 13, the insulating layer is etched to the surfaces of the first upper electrode 801 and the second upper electrode 802, so as to form a first via hole 1301.
And sequentially etching the oxide layer 702 and the nitride layer 703 to the surfaces of the first upper electrode 801 and the second upper electrode 802, and etching the first through hole 1301.
Referring to fig. 14, the insulating layer is etched to the surface of the peripheral electrode 501, forming a second via 1401.
The oxide layer 702, the nitride layer 703, the stress layer 1001, and the support layer 601 are sequentially etched to the surface of the peripheral electrode 601, thereby forming the second via 1401.
Referring to fig. 15, a metal material, which may be aluminum or gold, is filled in the first via 1301 and the second via 1401, and a deposition etching process or a lift-off process may be used to form a first metal connection line (not shown) in the first via 1301, a second metal connection line (not shown) in the second via 1401, first pads 1501 and 1502 on the surface of the oxide layer 701 and connected to the first metal connection line, and a second pad 1503 on the surface of the oxide layer 701 and connected to the second metal connection line. The second pad 1503 is used for direct current bias in actual product use, so as to reduce parasitic capacitance and improve product performance. The first bonding pad 1501 is used as an output end of the first upper electrode 801 of the sensing capacitor, and the first bonding pad 1502 is used as an output end of the second upper electrode 802 of the reference capacitor, and is interconnected with another pair of sensing capacitor and reference capacitor (not shown in the figure), so as to form a capacitor connection structure as shown in the MEMS pressure sensing chip 101 in fig. 1.
Referring to fig. 16, a circuit board 1601, an asic chip 1603, and a metal cap 1608 having an air hole are provided; coating a first silica gel layer 1602 on the surface of the circuit board 1601, and placing the application specific integrated circuit chip 1603 on the surface of the first silica gel layer 1602; coating a second silica gel layer 1605 on the surface of the application specific integrated circuit chip 1603, and placing the formed pressure sensing chip 1607 on the surface of the second silica gel layer 1605; bonding the pressure sensing chip 1607, the application specific integrated circuit chip 1603 and the circuit board 1601 by gold wires 1606 to form electrical connection; a metal cap 1608 is soldered to the surface of the circuit board 1601 to form a cavity with the circuit board 1601 that houses the application specific integrated circuit chip 1603 and the pressure sensing chip 1607.
In the forming process of the pressure sensor, a groove is formed on the surface of the first substrate in advance to serve as a capacitor gap, the upper electrode and the lower electrode of the capacitor are respectively formed on the surfaces of the two substrates, and then the first substrate and the second substrate are bonded together through a wafer bonding technology, so that the capacitive pressure sensor is formed. The method avoids the loaded sacrificial layer hollowing process and the process of sealing the release hole to form the vacuum cavity, and greatly improves the manufacturability of the process.
Furthermore, the variable sensing capacitor and the fixed reference capacitor are formed simultaneously, when the external air pressure changes, the sensing capacitor changes, but the reference capacitor does not change, and the accurate pressure value can be obtained through data processing.
The embodiment of the invention also provides a pressure sensor which comprises a pressure sensing chip.
Fig. 15 is a schematic structural diagram of the pressure sensing chip.
The pressure sensing chip includes: a substrate 300; a passivation layer 401 on the surface of the substrate 300; a first lower electrode 502, a second lower electrode 503 and a connecting electrode 504 which are positioned on the surface of the passivation layer 401, wherein the connecting electrode 504 is connected with the first lower electrode 502 and the second lower electrode 503; a first upper electrode 801 supported above the first lower electrode 502, wherein the first upper electrode 801 and the first lower electrode 502 form an inductive capacitor; a second upper electrode 802 supported above the second lower electrode 503, wherein a supporting portion 601' is provided between the second upper electrode 802 and the second lower electrode 503, and the second upper electrode 802 and the second lower electrode 503 form a reference capacitor; and an insulating layer covering the first upper electrode 801 and the second upper electrode 802.
The first lower electrode 502, the second lower electrode 503, the connection electrode 504, and the first upper electrode 801 and the second upper electrode 803 are made of polysilicon, but in other embodiments, other conductive materials may be used for the electrodes. In this embodiment, the first lower electrode 502 is a lower electrode of the sensing capacitor, the second lower electrode 503 is a lower electrode of the reference capacitor, and the connection electrode 504 is a connection electrode of the first lower electrode 502 and the second lower electrode 503 of the sensing capacitor and the reference capacitor, respectively. In this specific embodiment, the pressure sensing chip includes two sensing capacitors and two reference capacitors. In other embodiments, more than two sensing capacitors and more than two reference capacitors may be included.
In this embodiment, the pressure sensing chip further includes a peripheral electrode 501 disposed around the first lower electrode 502, the second lower electrode 503 and the connection electrode 504 on the surface of the passivation layer 401. The peripheral electrode 501 is used for external dc bias to reduce parasitic capacitance.
Referring to fig. 5b, the peripheral electrode 501 is located in a peripheral region, and is isolated from the first lower electrode 502, the second lower electrode 503 and the connection electrode 504 by a groove, so as to prevent short circuit; the first lower electrode 502, the second lower electrode 503, and the connection electrode 504 have a groove therebetween.
The supporting portion 601 'is located on the surface of the second lower electrode 503 of the reference capacitor, and mainly plays a role of fixing and supporting, when external air pressure acts on the pressure sensitive films of the reference capacitor and the sensing capacitor, the sensing capacitor changes due to deformation of the pressure sensitive films, and the reference capacitor does not deform or deforms slightly so as to be negligible due to the existence of the supporting portion 601'. In one embodiment, the supporting portion 601' includes two supporting bars arranged in a cross shape (see fig. 6b), in another embodiment, the supporting portion 601' is arranged in a column array (see fig. 6c), and in other embodiments of the present invention, the supporting portion 601' is not limited to the two shapes. The support 601' includes two upper support columns; or the supporting portion 601' includes more than two strip-shaped supporting bars, and the more than two strip-shaped supporting bars are arranged in a crossing or parallel manner. The structure and the arrangement density of the supporting portions 601' may be set according to the size of the second lower electrode 503, so that the finally formed pressure sensitive film of the reference capacitor is not deformed by the external pressure, thereby ensuring that the capacitance of the reference capacitor does not change with the external pressure.
In this specific embodiment, the surface of the peripheral electrode 501 further has a support layer 601, the surface of the connection electrode 504 has a support layer 602, and the materials of the support layers 601 and 602 and the support portion 601' may be dielectric materials such as silicon oxide and silicon nitride.
The insulating layer includes an oxide layer 702 and a nitride layer 703, where the oxide layer 702 may be a silicon oxide layer and the nitride layer 703 may be a silicon nitride layer. The oxide layer 702 and the nitride layer 703 can be grown according to a certain thickness ratio to adjust the stress; the insulating layer formed of the oxide layer 702 and the nitride layer 703 functions as a passivation insulating layer. The insulating layer may also comprise only a single layer of material, such as a silicon oxide layer or a silicon nitride layer.
In this specific embodiment, the pressure sensing chip further includes: and a stress layer 1001 located on the surface of the insulating layer, the first upper electrode 801 and the second upper electrode 802. The stress layer 1001 is a composite film of silicon nitride and tetraethyl orthosilicate (TEOS), and mainly plays a role in adjusting stress, and the proportion of the silicon nitride and the tetraethyl orthosilicate is selected according to a stress value required in design. In other specific embodiments, the stress layer 1001 may also be a stacked structure of multiple material layers, and the stress of the stress material layer 901 is adjusted by the number, material, thickness, and the like of the material layers. For example, the stress layer 1001 may be a stacked structure of a silicon nitride layer and an ethyl orthosilicate layer, or may be a stacked structure of silicon nitride, silicon oxide, and silicon oxynitride.
The pressure sensing chip further comprises a first through hole which penetrates through the insulating layer and is positioned on the surfaces of the first upper electrode 801 and the second upper electrode 802; a first metal connecting line filling the first through hole, and first pads 1501 and 1502 located on the surface of the insulating layer and connected with the first metal connecting line; the second through hole penetrates through the insulating layer and is positioned on the surface of the peripheral electrode; a second metal connection line filling the second via hole, and a second pad 1503 located on the surface of the insulating layer and connected to the second metal connection line for connecting a dc bias.
Fig. 16 is a schematic structural diagram of a pressure sensor according to another embodiment of the present invention.
The pressure sensor includes: a circuit board 1601, an application specific integrated circuit chip 1603, a pressure sensing chip 1607 and a metal cap 1608 having an air hole; the application specific integrated circuit chip 1603 is adhered to the surface of the circuit board through a first silica gel layer 1602; the pressure sensing chip 1607 is adhered to the surface of the application specific integrated circuit chip 1603 through a second silica gel layer 1605; the metal cap 1608 is located on the surface of the circuit board 1601 and forms a cavity with the circuit board 1601 for accommodating the application specific integrated circuit chip 1603 and the pressure sensing chip 1607.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (12)
1. A pressure sensor comprising a pressure sensing die, wherein the pressure sensing die comprises:
a substrate;
the passivation layer is positioned on the surface of the substrate;
the passivation layer comprises a first lower electrode, a second lower electrode, a peripheral electrode and a connecting electrode, wherein the first lower electrode, the second lower electrode, the peripheral electrode and the connecting electrode are positioned on the surface of the passivation layer; the line width of the connection part of the connection electrode, the first lower electrode and the second lower electrode is smaller than the line width of the main part of the connection electrode, the peripheral electrode is positioned on the surface of the passivation layer and surrounds the first lower electrode, the second lower electrode and the connection electrode, and the peripheral electrode is externally connected with a direct current bias;
the supporting layer is positioned on the surfaces of the connecting electrode and the peripheral electrode;
an insulating layer, a first upper electrode and a second upper electrode on a surface of one side of the insulating layer;
the insulating layer is bonded on the top of the supporting layer, and a cavity is formed between the insulating layer and the passivation layer, so that the first upper electrode is positioned above the first lower electrode, the second upper electrode is positioned above the second lower electrode, the first upper electrode and the first lower electrode form an induction capacitor, a supporting part is arranged between the second upper electrode and the second lower electrode, and the second upper electrode, the second lower electrode and the supporting part form a reference capacitor;
and the stress layers are positioned on the surfaces of the insulating layer, the first upper electrode and the second upper electrode.
2. The pressure sensor of claim 1, wherein the pressure sensing die further comprises: the first through hole penetrates through the insulating layer and is positioned on the surfaces of the first upper electrode and the second upper electrode; the first metal connecting line is filled in the first through hole, and the first bonding pad is positioned on the surface of the insulating layer and connected with the first metal connecting line; the second through hole penetrates through the insulating layer and is positioned on the surface of the peripheral electrode; and the second metal connecting wire is filled in the second through hole, and the second bonding pad is positioned on the surface of the insulating layer and connected with the second metal connecting wire and used for connecting direct current bias.
3. The pressure sensor of claim 1, wherein the pressure sensing die comprises: two sensing capacitors and two reference capacitors.
4. The pressure sensor of claim 1, wherein the stress layer is a composite film comprising silicon nitride and ethyl orthosilicate.
5. The pressure sensor of claim 1, wherein the support portion comprises two or more support posts; or the supporting part comprises more than two long-strip-shaped supporting strips which are arranged in a crossed or parallel mode.
6. The pressure sensor of claim 1, further comprising: the circuit board, the application specific integrated circuit chip and the metal cap with the air hole; the special integrated circuit chip is adhered to the surface of the circuit board through a first silica gel layer; the pressure sensing chip is adhered to the surface of the special integrated circuit chip through a second silica gel layer; the metal cap is positioned on the surface of the circuit board, and forms a cavity for accommodating the application specific integrated circuit chip and the pressure sensing chip together with the circuit board.
7. A method of manufacturing a pressure sensor comprising forming a pressure sensing die, wherein forming the pressure sensing die further comprises:
providing a first substrate;
forming a passivation layer on the surface of the first substrate;
forming a first lower electrode, a second lower electrode, a peripheral electrode and a connecting electrode on the surface of the passivation layer, wherein the connecting electrode is connected with the first lower electrode and the second lower electrode, and the connecting electrode, the first lower electrode and the second lower electrode jointly form a 'king' shape plane structure; the line width of the connection part of the connection electrode, the first lower electrode and the second lower electrode is smaller than the line width of the main part of the connection electrode, the peripheral electrode surrounds the first lower electrode, the second lower electrode and the connection electrode, and the peripheral electrode is externally connected with a direct current bias;
forming a support part on the surface of the second lower electrode;
forming a support layer on the surfaces of the connection electrode and the peripheral electrode;
providing a second substrate;
forming an insulating layer on the surface of the second substrate;
forming a first upper electrode and a second upper electrode on the surface of the insulating layer;
forming a stress material layer on the surfaces of the insulating layer, the first upper electrode and the second upper electrode, and flattening the stress material layer to form a stress layer covering the insulating layer, the first upper electrode and the second upper electrode;
bonding the second substrate and the first substrate, so that the first upper electrode is positioned above the first lower electrode, the first upper electrode and the first lower electrode form an induction capacitor, the second upper electrode is positioned above the second lower electrode, and the second upper electrode, the second lower electrode and the supporting part form a reference capacitor;
and removing the second substrate.
8. The method of manufacturing a pressure sensor according to claim 7, further comprising: etching the insulating layer to the surfaces of the first upper electrode and the second upper electrode to form a first through hole; etching the insulating layer to the surface of the peripheral electrode to form a second through hole; and filling metal materials in the first through hole and the second through hole to form a first metal connecting line positioned in the first through hole, a second metal connecting line positioned in the second through hole, a first bonding pad positioned on the surface of the insulating layer and connected with the first metal connecting line, and a second bonding pad positioned on the surface of the insulating layer and connected with the second metal connecting line.
9. The method of manufacturing a pressure sensor of claim 7, wherein two sensing capacitances and two reference capacitances are formed.
10. The method of manufacturing a pressure sensor of claim 7, wherein the stress layer is a composite film comprising silicon nitride and ethyl orthosilicate.
11. The method of manufacturing a pressure sensor according to claim 7, wherein the support portion includes two upper support columns; or the supporting part comprises more than two long-strip-shaped supporting strips which are arranged in a crossed or parallel mode.
12. The method of manufacturing a pressure sensor according to claim 7, further comprising: providing a circuit board, an application specific integrated circuit chip and a metal cap with air holes; coating a first silica gel layer on the surface of the circuit board, and placing the special integrated circuit chip on the surface of the first silica gel layer; coating a second silica gel layer on the surface of the special integrated circuit chip, and placing the formed pressure sensing chip on the surface of the second silica gel layer; bonding the pressure sensing chip, the special integrated circuit chip and the circuit board through gold wires to form electric connection; and welding a metal cap on the surface of the circuit board to form a cavity for accommodating the application specific integrated circuit chip and the pressure sensing chip together with the circuit board.
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| CN110108762A (en) * | 2019-04-08 | 2019-08-09 | 浙江省北大信息技术高等研究院 | A kind of humidity sensor and its manufacturing method |
| CN110118807A (en) * | 2019-04-08 | 2019-08-13 | 浙江省北大信息技术高等研究院 | A kind of MEMS humidity sensor and its manufacturing method |
| WO2022021052A1 (en) * | 2020-07-28 | 2022-02-03 | 深圳市汇顶科技股份有限公司 | Capacitive pressure sensor and electronic device |
| CN113670485A (en) * | 2021-09-01 | 2021-11-19 | 青岛芯笙微纳电子科技有限公司 | High-performance MEMS pressure sensor and manufacturing method thereof |
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| JP3432780B2 (en) * | 2000-02-22 | 2003-08-04 | 株式会社日立製作所 | Semiconductor pressure sensor |
| CN204652864U (en) * | 2012-11-05 | 2015-09-16 | 奥托立夫开发公司 | A kind of vehicle-mounted circuit board built-in |
| CN104142206B (en) * | 2013-05-07 | 2018-07-20 | 上海丽恒光微电子科技有限公司 | A kind of MEMS capacitive pressure sensor and preparation method thereof |
| JP2016039512A (en) * | 2014-08-08 | 2016-03-22 | キヤノン株式会社 | Device having electrode connected with through wiring and manufacturing method of the same |
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| CN104697680A (en) * | 2015-03-17 | 2015-06-10 | 浙江传媒学院 | Capacitive pressure sensor and manufacturing method thereof |
| CN104891418B (en) * | 2015-05-29 | 2016-09-21 | 歌尔股份有限公司 | MEMS pressure sensor, MEMS inertial sensor integrated morphology |
| CN104848982B (en) * | 2015-05-29 | 2018-01-19 | 歌尔股份有限公司 | Quasi- differential capacitance type MEMS pressure sensor and its manufacture method |
| CN106698328A (en) * | 2015-11-12 | 2017-05-24 | 上海丽恒光微电子科技有限公司 | Pressure sensor and preparation method thereof |
| CN105547576A (en) * | 2015-12-08 | 2016-05-04 | 苏州敏芯微电子技术有限公司 | Medium-isolated pressure sensor packaging structure |
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