CN105019019B - Method for the filling of selective epitaxial silicon trench - Google Patents
Method for the filling of selective epitaxial silicon trench Download PDFInfo
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- CN105019019B CN105019019B CN201510212599.XA CN201510212599A CN105019019B CN 105019019 B CN105019019 B CN 105019019B CN 201510212599 A CN201510212599 A CN 201510212599A CN 105019019 B CN105019019 B CN 105019019B
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- 238000000034 method Methods 0.000 title claims abstract description 42
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims description 18
- 239000010703 silicon Substances 0.000 title claims description 15
- 229910052710 silicon Inorganic materials 0.000 title claims description 14
- 238000011049 filling Methods 0.000 title claims description 5
- 238000007789 sealing Methods 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 34
- 230000004069 differentiation Effects 0.000 claims abstract description 25
- 125000006239 protecting group Chemical group 0.000 claims abstract description 11
- 239000004065 semiconductor Substances 0.000 claims description 42
- 238000002360 preparation method Methods 0.000 claims description 21
- 239000000463 material Substances 0.000 claims description 17
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 238000006243 chemical reaction Methods 0.000 claims description 14
- 239000000126 substance Substances 0.000 claims description 11
- 230000008021 deposition Effects 0.000 claims description 9
- 150000001875 compounds Chemical class 0.000 claims description 7
- 230000005611 electricity Effects 0.000 claims description 7
- 229910052681 coesite Inorganic materials 0.000 claims description 6
- 229910052906 cristobalite Inorganic materials 0.000 claims description 6
- 239000000377 silicon dioxide Substances 0.000 claims description 6
- 229910052682 stishovite Inorganic materials 0.000 claims description 6
- 229910052905 tridymite Inorganic materials 0.000 claims description 6
- 239000000203 mixture Substances 0.000 claims description 5
- 230000008859 change Effects 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 4
- 229910003697 SiBN Inorganic materials 0.000 claims 3
- 229910052581 Si3N4 Inorganic materials 0.000 description 12
- 238000000151 deposition Methods 0.000 description 11
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 9
- 239000013626 chemical specie Substances 0.000 description 7
- 238000000407 epitaxy Methods 0.000 description 5
- 125000000524 functional group Chemical group 0.000 description 5
- 125000002887 hydroxy group Chemical group [H]O* 0.000 description 5
- 238000003672 processing method Methods 0.000 description 5
- LFQSCWFLJHTTHZ-UHFFFAOYSA-N Ethanol Chemical compound CCO LFQSCWFLJHTTHZ-UHFFFAOYSA-N 0.000 description 4
- 238000007306 functionalization reaction Methods 0.000 description 4
- 230000002401 inhibitory effect Effects 0.000 description 4
- 229910052814 silicon oxide Inorganic materials 0.000 description 4
- QTBSBXVTEAMEQO-UHFFFAOYSA-N Acetic acid Chemical compound CC(O)=O QTBSBXVTEAMEQO-UHFFFAOYSA-N 0.000 description 3
- PZNSFCLAULLKQX-UHFFFAOYSA-N Boron nitride Chemical compound N#B PZNSFCLAULLKQX-UHFFFAOYSA-N 0.000 description 3
- 229910052801 chlorine Inorganic materials 0.000 description 3
- 150000004767 nitrides Chemical class 0.000 description 3
- 230000008569 process Effects 0.000 description 3
- 238000006557 surface reaction Methods 0.000 description 3
- 125000000026 trimethylsilyl group Chemical group [H]C([H])([H])[Si]([*])(C([H])([H])[H])C([H])([H])[H] 0.000 description 3
- 229910052582 BN Inorganic materials 0.000 description 2
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical group [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 229910008051 Si-OH Inorganic materials 0.000 description 2
- 229910006358 Si—OH Inorganic materials 0.000 description 2
- 125000004429 atom Chemical group 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 235000019441 ethanol Nutrition 0.000 description 2
- 239000007789 gas Substances 0.000 description 2
- 229910052736 halogen Inorganic materials 0.000 description 2
- 150000002367 halogens Chemical group 0.000 description 2
- 125000000623 heterocyclic group Chemical group 0.000 description 2
- 230000006872 improvement Effects 0.000 description 2
- 125000002496 methyl group Chemical group [H]C([H])([H])* 0.000 description 2
- 125000004123 n-propyl group Chemical group [H]C([H])([H])C([H])([H])C([H])([H])* 0.000 description 2
- 238000002161 passivation Methods 0.000 description 2
- 230000009257 reactivity Effects 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 229910015844 BCl3 Inorganic materials 0.000 description 1
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical group [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 description 1
- KZBUYRJDOAKODT-UHFFFAOYSA-N Chlorine Chemical compound ClCl KZBUYRJDOAKODT-UHFFFAOYSA-N 0.000 description 1
- 229910006113 GeCl4 Inorganic materials 0.000 description 1
- 229910003849 O-Si Inorganic materials 0.000 description 1
- 229910003872 O—Si Inorganic materials 0.000 description 1
- 229910007245 Si2Cl6 Inorganic materials 0.000 description 1
- 229910003978 SiClx Inorganic materials 0.000 description 1
- 229910002808 Si–O–Si Inorganic materials 0.000 description 1
- CFOAUMXQOCBWNJ-UHFFFAOYSA-N [B].[Si] Chemical compound [B].[Si] CFOAUMXQOCBWNJ-UHFFFAOYSA-N 0.000 description 1
- UHVIINMHYMRQHX-UHFFFAOYSA-N [O].[N].[C].[B] Chemical compound [O].[N].[C].[B] UHVIINMHYMRQHX-UHFFFAOYSA-N 0.000 description 1
- 230000009471 action Effects 0.000 description 1
- 150000001266 acyl halides Chemical class 0.000 description 1
- 150000001335 aliphatic alkanes Chemical class 0.000 description 1
- 125000000217 alkyl group Chemical group 0.000 description 1
- 150000001408 amides Chemical class 0.000 description 1
- 150000001412 amines Chemical class 0.000 description 1
- 150000008064 anhydrides Chemical class 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 125000001309 chloro group Chemical group Cl* 0.000 description 1
- IJOOHPMOJXWVHK-UHFFFAOYSA-N chlorotrimethylsilane Chemical compound C[Si](C)(C)Cl IJOOHPMOJXWVHK-UHFFFAOYSA-N 0.000 description 1
- 238000000354 decomposition reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- LIKFHECYJZWXFJ-UHFFFAOYSA-N dimethyldichlorosilane Chemical compound C[Si](C)(Cl)Cl LIKFHECYJZWXFJ-UHFFFAOYSA-N 0.000 description 1
- 239000001257 hydrogen Substances 0.000 description 1
- 229910052739 hydrogen Inorganic materials 0.000 description 1
- 125000004435 hydrogen atom Chemical class [H]* 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000012948 isocyanate Substances 0.000 description 1
- 150000002513 isocyanates Chemical class 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- JLUFWMXJHAVVNN-UHFFFAOYSA-N methyltrichlorosilane Chemical compound C[Si](Cl)(Cl)Cl JLUFWMXJHAVVNN-UHFFFAOYSA-N 0.000 description 1
- 150000005677 organic carbonates Chemical class 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- FAIAAWCVCHQXDN-UHFFFAOYSA-N phosphorus trichloride Chemical compound ClP(Cl)Cl FAIAAWCVCHQXDN-UHFFFAOYSA-N 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
- 238000002444 silanisation Methods 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 125000006850 spacer group Chemical group 0.000 description 1
- 239000000725 suspension Substances 0.000 description 1
- IEXRMSFAVATTJX-UHFFFAOYSA-N tetrachlorogermane Chemical compound Cl[Ge](Cl)(Cl)Cl IEXRMSFAVATTJX-UHFFFAOYSA-N 0.000 description 1
- LXEXBJXDGVGRAR-UHFFFAOYSA-N trichloro(trichlorosilyl)silane Chemical compound Cl[Si](Cl)(Cl)[Si](Cl)(Cl)Cl LXEXBJXDGVGRAR-UHFFFAOYSA-N 0.000 description 1
- FAQYAMRNWDIXMY-UHFFFAOYSA-N trichloroborane Chemical compound ClB(Cl)Cl FAQYAMRNWDIXMY-UHFFFAOYSA-N 0.000 description 1
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Abstract
Provide the method that epitaxial film is formed selectively on the substrate surface relative to dielectric surface.The substrate surface is pre-processed to form the target surface of differentiation sealing end, the target surface sealing end of the differentiation can further be reacted to generate one or more protecting groups.The protecting group inhibits growth of the epitaxial film then on the protected surface.
Description
Technical field
The method that the embodiment of present disclosure relates generally to processing substrate.More specifically, the implementation of present disclosure
Mode is related to the method for depositing epitaxial film on the bottom of groove while the film being inhibited to grow on trenched side-wall.
Background technique
During semiconductor device is formed, epitaxial film can be formed at the bottom of the groove generated in the dielectric material.
During the epitaxial film growth, a part of the film is grown on trenched side-wall.This film growth on trenched side-wall can
Lead to the defects of resulting device.
Therefore, it is continuously needed the method for inhibiting epitaxial film to grow on trenched side-wall in the art.
Summary of the invention
The embodiment of present disclosure is related to processing method, the treating method comprises: will have at least one partly to lead
The substrate of body surface face and at least one dielectric surface is exposed to surface preparation, to form differentiation on all surface
Target surface blocks (surface termination).The target surface of differentiation sealing end is exposed to selectively and at least
The compound of one dielectric surface reaction, to generate the dielectric table blocked with one or more chemical protecting groups
Face.It is epitaxially grown at least one semiconductor surface to one layer-selective.
The other embodiment of present disclosure is related to processing method, the treating method comprises: will have at least one
The substrate of siliceous semiconductor surface and at least one dielectric surface is exposed to surface preparation, to be formed on all surface
The target surface of differentiation blocks.The target surface sealing end of the differentiation is exposed to substantially only selectively electric at least one
The compound of dielectric surface reaction, to generate the dielectric surface blocked with one or more chemical protecting groups.One
Layer is substantially only selectively epitaxially grown at least one siliceous semiconductor surface.
Present disclosure further embodiment is related to processing method, the treating method comprises and places a substrate in place
It manages in chamber.There is at least one siliceous semiconductor surface and at least one dielectric surface on the substrate.The substrate packet
Include the groove being formed at least one dielectric surface, the groove has the side wall in the dielectric surface and sudden and violent
Reveal the top surface of the siliceous semiconductor surface.The dielectric surface is selected from the group by following material composition: SiO2、SiN、
SiCN, SiCNO, SiBN, SiBCN, BN, SiBCNO, SiNO and their combination.The substrate is exposed at least one surface
Pretreatment is blocked with the target surface for forming differentiation, so that the surface sealing end of at least one siliceous semiconductor surface is different from
The surface of at least one dielectric surface blocks.The target surface sealing end of the differentiation is exposed to substantially only selective
The compound that ground is reacted at least one dielectric surface, to generate the electricity blocked with one or more chemical protecting groups
Dielectric surface.Optionally anneal to the substrate.One layer is substantially only at least one described siliceous semiconductor surface
On be selectively epitaxially grown to threshold thickness, lose selectivity at the threshold thickness.
Detailed description of the invention
It is of the invention above-mentioned to be understood in detail to can refer to embodiment (some of embodiments are depicted in attached drawing)
Feature structure and the present disclosure summarized briefly above are discussed in greater detail.However, it should be noted that attached drawing only illustrates the present invention
Exemplary embodiment, and limitation of the scope of the invention is therefore not construed as, because the present invention allows other equivalent
Embodiment.
Figure 1A to Fig. 1 D show according to one or more embodiments of present disclosure have on the dielectric it is suppressed
Growth epitaxy technique schematic diagram；
Fig. 2A to Fig. 2 C show according to one or more embodiments of present disclosure have on the dielectric it is suppressed
Growth epitaxy technique schematic diagram；With
Fig. 3 is shown according to one or more embodiments of present disclosure with the double of alkyl spacer base (spacer)
Functional group precursor.
Specific embodiment
The embodiment of present disclosure provides the method for inhibiting epitaxial film to grow on trenched side-wall.
As used in this specification and in the appended claims, term " substrate " and " chip " are used interchangeably,
The a part of the two terms all referring to the surface or surface for executing technique on it.Skilled artisan will also appreciate that
It is that unless the context clearly indicates otherwise, the only a part of substrate otherwise may also refer to referring to for substrate.
The broad aspect of A referring to Fig.1, present disclosure are related to processing method.Substrate 10 in the case of Figure 1A has
There are at least one semiconductor surface 20 and at least one dielectric surface 30.The dielectric surface 30 is shown as semiconductor table
Film on 20 top of face.The dielectric surface 30 have top 31 and side wall 32, it should be understood that may be present one with
Upper side wall.The semiconductor surface 20 for example can be silicon wafer, or can be the semiconductor material deposited on substrate surface
Material.
Substrate 10 is exposed to surface preparation, therefore the semiconductor surface 20 and dielectric surface 30 are exposed to table
Face pretreatment.The pretreatment can be using HF as final step (HF-last) or similar technique, to ensure that the electricity is situated between
The top surface 31 and side wall 32 on matter surface 30 substantially homogeneously block.As made in this specification and in the appended claims
, term " substantially homogeneously block " means that the surface of at least about 50%, 60%, 70%, 80%, 90% or 95% is
It is blocked with the species.Figure 1B is shown with hydroxy-end capped dielectric surface 30, it should be understood that being able to use other
End-capping group (for example, amine).The type of end-capping group depends on many factors, the including but not limited to group of dielectric surface
At.
At least one semiconductor surface and at least one dielectric surface are exposed to surface preparation to form differentiation
Target surface sealing end.As used in this specification and in the appended claims, term " the target surface of differentiation blocks "
Mean that the end-capping group on different surfaces is different with similar terms, so that the sealing end on such as dielectric surface is different from half
Sealing end on conductive surface.For example, after pre-processing, the surface sealing end of at least one semiconductor surface is different from least one
The surface of dielectric surface blocks.
Surface preparation can be to be conducive to generate the combination of the chemical species and reaction condition of surface sealing end of differentiation.Example
Such as, n- alkyl triethoxysilane can be used for handling dielectric surface but not substantially influence semiconductor surface.Such as in this theory
Bright book and used in the attached claims, the term used in this context " substantially influencing " mean to be less than
50%, 40%, 30%, 20%, 15%, 10%, 5%, 2% or 1% surface sealing end is reacted with pretreatment species.
Then the dielectric surface 33 that differentiation target surface blocks can be exposed to the chemical combination reacted with dielectric surface 33
Object, so that the dielectric surface 34 for having one or more chemical protecting groups is generated, it is such as shown in fig. 1 c.It is functionalized
Dielectric surface 34 is shown as with FUNC sealing end, and the FUNC sealing end represents chemical protecting group.Such as those skilled in the art
What member will be understood that, this sealing end only some functional groups or protecting group typically represent, and are not meant to any specific
Chemical species.
In some embodiments, surface preparation includes that the surface is exposed to the first pretreatment and is different from described
First pretreated second pretreatment.First pretreatment and the second pretreatment can form same or different surface sealing end.?
In some embodiments, first pretreatment and the second pretreatment form different target surface sealing ends.One or more
In embodiment, second pretreatment will not substantially change the target surface sealing end generated by the first pretreatment.Such as in this theory
Bright book and used in the attached claims, the term used in this respect " substantially changing " mean to exist to by first
The target surface sealing end that pretreatment is formed is less than about the change of 20 atom %.
Once having protected dielectric surface 34, the dielectric surface 34 is exactly less to have to subsequent epitaxy technique
The substrate of benefit.Epitaxial layer 40 selectively grows, is deposited or formed on the semiconductor surface.As in this specification and institute
Used in attached claims, the term " selectively " used in this context means than one, surface difference
Surface more preferably occur surface reaction.Selective epitaxial is not meant as not forming extension on dielectric surfaces, but
Mean that extensive quantity is substantially less than the extensive quantity that should have been formed in the case where not being functionalized the dielectric surface.
In some embodiments, at least one semiconductor surface selectively one layer of epitaxial growth may include
Etching gas is provided during extension.The introducing of etching gas is only a kind of possible and is not construed as limitation present disclosure
Range.
In one or more embodiments, by the epitaxial deposition to threshold thickness, at the threshold thickness
Lose selectivity.The epitaxial layer optionally grows at least about 0.5nm or about 1nm or about 1.5nm or about
The thickness of 2nm.
In some embodiments, the epitaxial layer is substantially only grown at the semiconductor surface.Such as in this specification and
Used in the attached claims, the term " substantially only " used in this way means the electricity less than about 20% area
Dielectric surface shows to grow.
In some embodiments, before being formed selectively the epitaxial layer, to the electricity of differentiation target surface sealing end
It anneals on one or more surfaces in dielectric surface or protected surface.The flash annealing can help to provide
Surface species distribution more evenly, and can help to improve the selectivity of epitaxy technique.In some embodiments, it anneals not
Any improvement can be provided, or minimum improvement is only provided.
In some embodiments, the semiconductor surface is also handled with semiconductor pretreatment.Semiconductor is pretreated
Use the uniformity that can help to block on raising semiconductor surface.This pretreatment can with dielectric surface pre-process separate into
Row, or carried out simultaneously with dielectric surface pretreatment.In addition, for the pretreated chemical species of semiconductor surface can be used for
The pretreated chemical species of dielectric surface are identical or different.
In one or more embodiments, the semiconductor surface includes material.As used in this respect
, term " material " refer on an atomic basis including at least about 50% silicon material.
In some embodiments, substrate further comprises that the second electricity that at least one is different from the dielectric surface is situated between
Matter surface.Such case is illustrated in Fig. 2 and is described more fully hereinafter in.Second dielectric surface may be further exposed to
Second surface pretreatment, to form the material of the second differentiation target surface sealing end.The surface preparation and the second surface
Pretreatment can be same or different.When the surface preparation is different from second surface pretreatment, according to example
The property of specific chemical species as used, be exposed to pretreatment can substantially and meanwhile occur or individually occur.One
In a little embodiments, surface preparation shape at least one second dielectric surface relative at least one semiconductor surface
At differentiation target surface.In one or more embodiments, the surface preparation further comprises that the substrate is sudden and violent
The second surface being exposed to different from the surface preparation pre-processes.Second surface is pretreated to use the complexity for increasing processing
Property and the time, and the second surface pretreatment usually only when the chemical benefits of such processing are for the shape on all surface
It is useful in the case where at differentiation target surface sealing end.In some embodiments, the surface preparation and the second surface
Pretreatment is different, and at the same time being exposed to the substrate.
As shown in Fig. 2, the other embodiment of present disclosure is rendered as to each surface and used material more
Identification in detail.Described surfacing and each chemical species are exemplary only, and are not to be construed as to model of the present invention
The limitation enclosed.Surface for further describing is illustrated in Fig. 2A and including silicon substrate 120, and the silicon substrate 120 has
Siliceous semiconductor surface 130 (for example, silicon oxide layer) and at least one dielectric layer 140 (for example, silicon nitride layer).Groove 150
It has been cut into silicon oxide layer and silicon nitride layer, thus the top surface 121 of the exposure silicon substrate 120, and in the groove
Silicon oxide side wall 131 and silicon nitride sidewall 141 on 150 either side.Therefore, one or more implementations of present disclosure
Mode helps to ensure that epitaxial film formation is thermodynamically more likely to occur on the surface of silicon substrate 120 121, rather than described
Occur on any side wall of groove 150.
According to one or more embodiments of present disclosure, the first part of the processing method ensures to have incited somebody to action
SiO2/ Si chip be exposed to some type of pretreating process (also referred to as final step be HF technique).The pretreatment work
Skill exposure helps to ensure that the silicon face is blocked with such as hydrogen, and the silicon oxide surface is with for example enough hydroxyls
Base density sealing end, and the nitride surface is with for example enough NHxGroups density sealing end.This sealing end is in Fig. 2 B
In show.
The appropriate example of dielectric surface includes but is not limited to silica (SiO2), silicon nitride (SiN), carbonitride of silicium
(SiCN), oxygen carbonitride of silicium (SiCNO), boron silicon nitride (SiBN), boron carbonitride of silicium (SiBCN), boron nitride (BN), oxygen boron carbon nitrogen
SiClx (SiBCNO), silicon oxynitride (SiON) and/or their combination.In some embodiments, the dielectric surface choosing
The group of free following material composition: SiO2, SiN, SiCN, SiCNO, SiBN, SiBCN, BN, SiBCNO, SiNO and their group
It closes.As would be understood by those, the chemical formula is not intended to as stoichiometry, but represents atom group
At.
Described predecessor classification can be used for inhibiting on the surface for example blocked with OH, use NHxThe surface of sealing end or
Growth in described the two.In some embodiments, n- alkyl triethoxysilane (I) can be used for the table for inhibiting to block with OH
Si epitaxial deposition on face.(liquid, at room temperature with the vapour pressure of 2.14 supports) will be with for example, n- propyl-triethoxysilicane
SiO2On surface hydroxyl react (via Silanization reaction), to form SiO key, remove ethyl alcohol, and with n-propyl part official
The energyization surface.Fig. 2 C shows the epitaxial film being deposited on 150 bottom of groove, the epitaxial film have on trenched side-wall by
The deposition of inhibition.The side wall is with show-FUNC ,-FUNC represents functionalized surface or shielded surface, but does not imply that
Specific chemical species.For example, protecting the surface to be able to suppress Si epitaxial deposition with alkyl (being n-propyl herein).
In some embodiments, n- alkyltrichlorosilanes (II) obtain identical with n- alkyl triethoxysilane (I)
Next product.However, the former use will lead to hydroxy-end capped SiO2The removing of HCl (instead of ethyl alcohol) when reaction.
In one or more embodiments of present disclosure, the side of selective epitaxial Si trench fill is described
Method.Herein, trimethylsilyl group can be used for reactive moieties (OH or the NH of protective side wall2).Side wall reactivity portion
Position this protection or functionalization can lead to at the reactive moieties on the Si of channel bottom extension it is highly selective.For
TMS group is transmitted into the reactive moieties on (transfer) to side wall, can be used following species (III).
Wherein X is NR2、N3, it is halogen, one or more in NCO or any heterocycle.
The specific molecule example of species III includes but is not limited to,
In some embodiments, work as X=NR2、N3, halogen or when any heterocycle, with OH react be it is rapid and
It is saturated the surface being made of hydroxyl sufficiently.Trimethylsilyl group is being transmitted to NH2Group is (for example, on the surface SiN
Reactive moieties) situation in, the NCO group can be with NH2Group reaction, as shown in reaction equation 1.
Wherein * represents surface NH2
In another embodiment of present disclosure, using comprising that will undergo and be respectively present in SiO2With the surface SiN
On OH group and NH2The organic molecule of the functional group of group reaction.It is, for example, possible to use the molecule of following classification (species IV
With species V).
It is theoretical to be not limited to any concrete operations, it is believed that acyl halide can be reacted with any surface hydroxyl, such as 2 institute of reaction equation
Show.
Isocyanates can be reacted with similar fashion described in reaction equation 1, be distinguished as being transmitted to table as functional group
Molecule on face will be organic molecule.
Dialkyl group silicon predecessor (VI) can also be used for selectively in Si-OH capped material or Si-NH2It is raw on group
It is long.
These surfaces and these predecessors < 400 DEG C at a temperature of react and can produce Si-O-Si (Me)2- O-Si or
Si-NH(Si)-Si(Me)2Edge of-NH (the Si)-Si as side wall.This reaction is shown in following formulas 3 and 4.
In two Si (CH3)2Longer chain can also be used between material, such as:
In addition, it is theoretical to be not limited to any concrete operations, it is believed that this material allows the Si-OH or Si-NH of distal end
It reacts and forms loop chain (linked chain).This material can be such that the long-chain of side wall is passivated and not interfere the life of epitaxial film
It is long.On these silicon atoms other than methyl, longer carbon chain material can be used, as long as the heat budget of the epitaxy technique
(thermal budget) not will lead to significant decomposition.
For Si-NH2The anhydride such as species VIII can be used in the surface of sealing end.
This material allows amide linkage reaction, to remove acetic acid and nitride surface is protected not occur further
Reaction.Organic carbonate as follows also can be used.
In addition it is possible to use the difunctional predecessor (object that the X and Y reactivity part separated by alkyl spacer base forms
Kind of IX) molecule sealing end (molecular capping) is provided, wherein both X and Y portion respectively with OH- and/or NHxFunction
Group's reaction is to generate X ' and Y ' bonding (linkage).X and Y can be any one in functional group discussed above, and alkane
The length n of base interval base can (density based on reactive moieties) change to realize ideal sealing end.
The difunctional predecessor of alkyl spacer base with variable-length is shown in FIG. 3.
In some embodiments, during depositing operation, insulator/dielectric passivation can be occurred at many moment
Place.In some embodiments, functionalization (be also referred to as passivated or protect) can occur before epitaxial deposition.In some embodiment party
Formula, functionalization are carried out continuously during epitaxial deposition.In some embodiments, functionalization be short deposition cycle it
Preceding progress, to be updated periodically (refresh) surface passivation.
In some embodiments, with the SiO of precoated shet containing chlorine atom2/Si3N4Surface/by SiO2/Si3N4Surface is exposed to
It can be beneficial containing chlorine atom.Suitable chlorine-containing compound includes but is not limited to: HCl, Cl2、Si2Cl6、CH3SiCl3、
CH3SiCl2H、(CH3)2SiCl2、(CH3)3SiCl、GeCl4、BCl3、PCl3/PCl5Or their combination.
In addition, in some embodiments, keeping the sufficiently low coring that can produce amorphous film of depositing temperature, rather than insulating
Polycrystalline film on body.Before very small and unstable nucleus growth is at more stable polyparticle, to the nuclear periodicity
This coring can be prevented by carrying out further (selective) etching.Keep temperature it is sufficiently low with prevent from losing selectivity may include
The multiple chips of parallel processing (50-100pcs) in batch furnace (batch furnace).In some embodiments, by brand-new
Air (O is exposed to the nitride rich in silicon2) to allow to aoxidize suspension (dangling) Si key, to prevent at that
Deposition (losing selectivity) occurs on a little positions.
Although above content is to be directed to embodiments of the present invention, can be in the base region without departing substantially from present disclosure
In the case of design other and further embodiment of present disclosure, and the scope of the present invention is by following claims
Come what is determined.
Claims (19)
1. a kind of method for the filling of selective epitaxial silicon trench, comprising:
Substrate at least one semiconductor surface and at least one dielectric surface is exposed to surface preparation, to be formed
The target surface of differentiation blocks so that the surface sealing end of at least one semiconductor surface be different from it is described at least one
The surface of dielectric surface blocks；
It blocks the target surface of the differentiation and is exposed to the selectively surface at least one dielectric surface
The compound of end capping reaction, to generate the dielectric surface blocked with one or more chemical protecting groups；With
Selectively one layer of epitaxial growth at least one described semiconductor surface.
2. the method as described in claim 1 further comprises: to the substrate before being formed selectively the epitaxial layer
It anneals.
3. the method as described in claim 1, wherein the semiconductor surface includes silicon.
4. the method as described in claim 1, wherein the surface preparation includes that the surface is exposed to the first pretreatment
It is pre-processed with being different from described first pretreated second, to form the target surface sealing end of the differentiation.
5. method as claimed in claim 4 is pre-processed wherein second pretreatment will not substantially change by described first
The target surface of generation blocks.
6. the method as described in claim 1, wherein the semiconductor surface includes material.
7. the method as described in claim 1, wherein the dielectric surface is selected from the group by following material composition: SiO2、SiN、
SiCN, SiCNO, SiBN, SiBCN, BN, SiBCNO, SiNO and their combination.
8. the method as described in claim 1, wherein selectively epitaxial growth one at least one described semiconductor surface
A layer further comprises that etching gas is provided between male extension.
9. the method as described in claim 1, wherein the substrate further comprises being different from the dielectric surface at least
One the second dielectric surface.
10. method as claimed in claim 9, wherein the surface preparation is relative at least one described semiconductor surface
At least one described second dielectric surface on formed differentiation target surface.
11. method as claimed in claim 9, wherein the surface preparation further comprises that the substrate is exposed to difference
It is pre-processed in the second surface of the surface preparation.
12. method as claimed in claim 11, wherein being exposed to the surface preparation and second surface pretreatment in fact
Occur simultaneously in matter.
13. the method as described in claim 1, wherein by the epitaxial deposition to threshold thickness, at the threshold thickness
Lose selectivity.
14. the method as described in claim 1, wherein the epitaxial layer is substantially only grown on the semiconductor surface.
15. a kind of method for the filling of selective epitaxial silicon trench, comprising:
To be exposed to the substrate of at least one siliceous semiconductor surface and at least one dielectric surface surface preparation with
The target surface sealing end of differentiation is formed, so that the surface sealing end of at least one siliceous semiconductor surface is different from described
The surface of at least one dielectric surface blocks；
The target surface sealing end of the differentiation is exposed to the selectively surface at least one dielectric surface
The compound of end capping reaction, to generate the dielectric surface blocked with one or more chemical protecting groups；With
Substantially only selectively one layer of epitaxial growth at least one described siliceous semiconductor surface.
16. method as claimed in claim 15, further comprises: to the base before being formed selectively the epitaxial layer
Plate is annealed.
17. method as claimed in claim 15, wherein the dielectric surface is selected from the group by following material composition: SiO2、
SiN, SiCN, SiCNO, SiBN, SiBCN, BN, SiBCNO, SiNO and their combination.
18. method as claimed in claim 15, wherein the surface preparation includes that the surface is exposed to the first pre- place
The described first pretreated second pretreatment is managed and is different from, to form the target surface sealing end of the differentiation.
19. a kind of method for the filling of selective epitaxial silicon trench, comprising:
It places a substrate in processing chamber housing, there is at least one siliceous semiconductor surface and at least one electricity to be situated between on the substrate
Matter surface, the substrate include the groove being formed at least one described dielectric surface, and the groove has in the electricity
The top surface of side wall and the exposure siliceous semiconductor surface in dielectric surface, the dielectric surface are selected from by following object
The group of matter composition: SiO2, SiN, SiCN, SiCNO, SiBN, SiBCN, BN, SiBCNO, SiNO and their combination；
The substrate is exposed at least one surface preparation to form the target surface of differentiation sealing end, so that described at least one
The surface sealing end of a siliceous semiconductor surface is different from the surface sealing end of at least one dielectric surface；
By the target surface of differentiation sealing end be exposed to substantially only selectively at least one dielectric surface
The compound of the surface end capping reaction, to generate the dielectric surface blocked with one or more chemical protecting groups；
Optionally, it anneals to the substrate；With
Substantially only at least one described siliceous semiconductor surface selectively one layer of epitaxial growth to threshold thickness,
Selectivity is lost at the threshold thickness.
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| CN110211869A (en) * | 2019-05-28 | 2019-09-06 | 北京大学 | Utilize the method for stress in two-dimentional boron nitride insert layer relaxation nitride epitaxial structure |
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| KR20150126784A (en) | 2015-11-13 |
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| KR102391948B1 (en) | 2022-04-28 |
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