CN103165725B - Three end composite dielectric gate light-sensitive detector and detection methods thereof - Google Patents
Three end composite dielectric gate light-sensitive detector and detection methods thereof Download PDFInfo
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- CN103165725B CN103165725B CN201110416672.7A CN201110416672A CN103165725B CN 103165725 B CN103165725 B CN 103165725B CN 201110416672 A CN201110416672 A CN 201110416672A CN 103165725 B CN103165725 B CN 103165725B
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Abstract
Three end composite dielectric gate light-sensitive detectors, comprise P type semiconductor substrate (1), directly over described substrate, be provided with bottom dielectric (6) successively, photoelectron accumulation layer (5), top layer dielectric (4), control gate (3); High concentration N is formed near the either side of laminated medium by ion implantation doping in P type semiconductor substrate
+type drain electrode (2); Described photoelectron accumulation layer (5) is polysilicon, Si
3n
4or other electronic conductor or semiconductor; Control gate (3) is polysilicon, metal or other transparency conductive electrodes, and control gate pole-face or basalis have at least a place to be to the transparent or semitransparent window of detector detection wavelength; This detector utilizes pn to tie and reverse-biasedly produces and collect light signal, reads signal magnitude by the gate induced drain electric current (GIDL) measuring pn knot.
Description
Technical field
The present invention relates to imaging detection device, especially about infrared, visible light wave range to the imaging detection device working mechanism of ultraviolet band, be a kind of three end composite dielectric gate light-sensitive detector and detection methods thereof
Background technology
Imageing sensor in society application widely, as cell phone, digital camera, various video camera and national defence field of detecting, the main imaging detector of current development is CCD and CMOS-APS two type, CCD occurs comparatively early, technology is relatively ripe, its basic structure is the series connection of rows of mos capacitance, produced and change by potential pulse sequencing control semiconductor surface potential well above electric capacity, and then realize storage and the transfer reading of photogenerated charge signal, the each pixel of CMOS-APS adopts diode and multiple transistor composition, by arranging diode state, the situation of change read before and after exposure obtains light signal.
CMOS-APS receives larger concern in recent years due to some advantage, and CCD is owing to being capacitances in series, and an electric capacity has problem can affect the transmission of full line signal, so high to technological requirement, rate of finished products and cost not ideal enough.And its each pixel of CMOS-APS is separate, serial dislocation charge is not needed in whole signals transmission, some pixels go wrong does not affect other pixel performance, so overcome CCD shortcoming in this regard, so neither be so harsh to technological requirement.COMS, owing to adopting single point signals transmission, by simple X-Y addressing technique, allows from whole arrangement, partly even unit carrys out sense data, thus improve addressing speed, realize Signal transmissions faster.
High-resolution imageing sensor becomes an important research direction, current CCD and CMOS has the product of millions pixel, all try hard to reduce further Pixel Dimensions and improve resolution, CCD because be subject to the effects such as fringe field make his Pixel Dimensions be difficult to reduce further at below 2um.And CMOS-APS also can reduce further along with the Pixel Dimensions that reduces of CMOS technology node, but each pixel of CMOS-APS is made up of (containing amplifier and A/D change-over circuit) multiple transistor AND gate light sensitive diode, make the photosensitive region of each pixel only occupy the very little surface area of pixel itself, sensitivity and resolution are relatively little.The each pixel of CMOS-APS comprises multiple transistor to complete the operations such as reference gating in addition, and general pixel cell comprises three transistors, which dictates that his Pixel Dimensions reduces and is very restricted.The method such as to share by less process node and circuit and realize constantly reducing of Pixel Dimensions, can reach single Pixel Dimensions 1.1um at present.
High-resolution imaging detector all has important application in business and national defence, industry is constantly laying siege to less Pixel Dimensions, the present inventor has proposed a kind of patent application of the light-sensitive detector structure based on composite dielectric gate in this regard, adopt the device architecture with CMOS technology compatibility, effectively can reduce elemental area.But simpler panel detector structure Pixel Dimensions reduce with Simplified flowsheet in still have leeway, and improve resolution.
Summary of the invention
The object of the invention is: propose a kind of novel photoelectric-detection device structure and detection method, especially propose a kind of detector based on three end composite dielectric gate structures and detection method, effectively can reduce Pixel Dimensions further.The object of the invention is also to propose the simpler panel detector structure of one and working method (detection method), and improves resolution.
Technical scheme of the present invention is: based on the detector of three end composite dielectric gate structures, three end composite dielectric gate light-sensitive detectors structure (as Fig. 1) wherein related to comprising: P type semiconductor substrate (1), as described in be provided with bottom dielectric (6) successively directly over substrate, photoelectron accumulation layer (5), top layer dielectric (4), control gate (3); High concentration N+ type drain electrode (2) is formed near the either side of laminated medium by ion implantation doping in P type semiconductor substrate.Described photoelectron accumulation layer (5) is polysilicon, Si
3n
4or other electronic conductor or semiconductor; Control gate (3) is polysilicon, metal or other transparency conductive electrodes, and control gate pole-face or basalis have at least a place to be to the transparent or semitransparent window of detector detection wavelength.Described two-layer dielectric (4), (6) effectively can isolate electric charge storage region, charge-limited is made to realize memory function in accumulation layer (5), top layer dielectric (4) is generally broadband semiconductor, can not enter grid (3) to ensure electronics to pass through potential barrier from substrate after entering accumulation layer.The material of top layer medium can adopt silicon oxide/silicon nitride/silicon oxide, silica/alumina/silica, silica, aluminium oxide or other high dielectric constant material.Underlying dielectric material can adopt silica or other high dielectric constant;
The detection method of the present invention three end composite dielectric gate light-sensitive detector is: exposure programming process: add a back bias voltage pulse VBp at substrate (1), drain terminal (2) adds a positive bias pulse VDp, and simultaneously control gate (3) will add zero-bias or add forward bias pulse VGp. substrate surface and drain region can produce depletion layer. and photon enters depletion layer and excites generation photoelectron.A part photoelectron grid (3) and drain electrode (2) electric field driving under towards grid (3) direction accelerate movement, when electron energy exceedes oxide layer potential barrier, underlying dielectric (6) iunjected charge accumulation layer (5) will be crossed and realize photosignal collection, complete exposure programming process.Because be injected by hot electron, do not need very high tunnelling electric field.The change of charge storage layer (5) quantity of electric charge causes device threshold voltage to change, and this variable quantity can be obtained by reading process, and then can know photoelectron number in photoelectron accumulation layer
Signal-obtaining process: it is the operate of inducing drain terminal leakage current (GIDL) based on grid voltage that device reads process, the electric current strong depend-ence of N-type drain terminal (2) and the electric field (exponential relationship) between he and charge storage layer (5), therefore this electric current is also more responsive to the electric charge stored in charge storage layer, can realize read operation by this principle.Concrete operations are: add a positive bias VDread at drain terminal (2), and control gate (3) will add back bias voltage VGread, substrate (1) VBread ground connection simultaneously, test drain terminal electric current I d.This size of current is subject to the impact of photoelectron accumulation layer (5) electromotive force, the electron number that charge storage layer stores is more, GIDL electric current can be larger, the electric current number read like this can characterize the photoelectron amount collected in side, the signal strength signal intensity of light intensity can be thought, in order to more accurately read the photoelectron number collected in actual mechanical process, adopt twi-read method, concrete operations are for once to obtain electric current I d in the rear reading of unglazed lower programming
0, after exposure programming, reading once obtains reading electric current is Id
1, twi-read electric current is poor (Δ Id=Id
1-Id
0) final signal magnitude.
Reset erasing: reset operation adopts similar Flowler-Nordheim tunnelling mode, a negative high voltage VGreset is added at grid (3), drain terminal (2) and substrate (1) apply a positive voltage pulse Vbase all simultaneously, when bottom dielectric both sides electric field reaches 10MW/cm, electrons enters raceway groove from charge storage layer tunnelling or drain region realizes reset erase feature.
A back bias voltage pulse VBp is added at substrate (1) in exposure process, drain terminal (2) adds a positive bias pulse VDp, simultaneously control gate (3) will add zero-bias or add in forward bias pulse VGp. reading process and meets VBread at substrate (1), drain terminal (2) adds a positive bias pulse VDread, and control gate (3) will add forward bias pulse VGread simultaneously;
VBp span is-8V ~-0.5V, VDp scope be 0,5V ~ 5V, VGp be 0.1V ~ 10V, VBread span be-1V ~ 1V, VDread span be 0.1V ~ 7V, VGread span is-10V ~ 0.1V.
The invention has the beneficial effects as follows: three end composite dielectric gate light-sensitive detectors, be different from CCD and CMOS-APS, it adopts composite dielectric gate structure, similar with traditional charge storage layer MOSFET structure, especially adopt three end structure operations, drain from the either side near laminated medium and draw; Whole imaging reset read work is completed by a device, be equivalent to the function that CMOS-APS adopts more than three transistors to complete, so effectively reduce the pressure that Pixel Dimensions reduces, also can intersect reference by more convenient employing X-Y in addition, compatible with CMOS technology, these are all superior than CCD.Especially small pixel size: complete all functions of a pixel owing to adopting a device, and adopt three end structures, more area can be vacated for minification, in addition, the structure of three ends can avoid short-channel effect very well, detecting element of the present invention can be made constantly to reduce along with CMOS technology size, and these can reduce Pixel Dimensions to a great extent.
Three end composite dielectric gate light-sensitive detector detection methods have following features, high dynamic range: reading signal magnitude can be regulated by the reading voltage of regulable control grid, expand the dynamic range of device, device support is repeatedly read in addition, convenient operation and data processing; Low pressure low current operates: under described conditions of exposure, photoelectron collection process adopts hot electron injection mode, effectively can reduce operating voltage, as grid voltage Vg can use about 5V, well below tens volts of high pressure that tunnelling requires. in exposure programming and reading reseting procedure, electric current is less.
Accompanying drawing illustrates:
Fig. 1 is three end composite dielectric gate light-sensitive detector basic structures,
Fig. 2 is detector work operating state in the exposure mode,
Fig. 3 be in detector exposure process substrate to the energy band diagram in grid direction and electronic transfer process,
Fig. 4 a is detector work operating state in read mode,
Fig. 4 b reads current curve example under different threshold voltages,
Fig. 5 is that detector is operated in operating state under reset mode.
Specific implementation method
Accompanying drawings is illustrated panel detector structure of the present invention and concrete detection method thereof below.
Detector basic structure of the present invention adopts composite dielectric gate structure, detector basic structure of the present invention as shown in Figure 1, this similar is in composite dielectric gate light-sensitive detector structure (reference WO2010/094233, the thickness of dielectric material can be with reference to), source electrode is eliminated unlike structure of the present invention, adopt simpler three end structures, comprise P type semiconductor substrate (1), N-type drain region (2), control gate (3) is followed successively by from top to bottom directly over substrate surface, top layer medium (4), charge storage layer (5), underlying dielectric (6).
Detector exposure programming mode of the present invention adopts hot electron injection mode, expose programming process example as shown in Figure 2, a back bias voltage pulse VBp (as-6V) is added at substrate (1), drain terminal (2) adds a positive bias pulse VDp (as 1V), and control gate (3) will add forward bias pulse VGp (as 5V) simultaneously.Substrate surface and edge, drain region can produce depletion layer.If photon enters photon energy photon hv > semiconductor Eg (or Eg+ Δ Ec) after depletion layer], generation electron hole pair can be excited, Fig. 3 describes photoelectron and produces and motion process, wherein a part of electronics accelerates mobile (a process) towards grid direction under the driving of grid (3) and drain electrode (2) electric field, will pass underlying dielectric (6) iunjected charge accumulation layer (5) (b process) when electron energy exceedes dielectric layer barrier height; Some photoelectron moves towards drain terminal and flows away from drain terminal (2) under the driving of drain region knot electric field.Hole then flows away from substrate (1).The change of charge storage layer 5 quantity of electric charge causes the change of device threshold voltage, and this change can be obtained by reading process, and then can know photoelectron number in photoelectron accumulation layer.
Detector reading manner of the present invention adopts gate induced drain terminal leakage current (GIDL) size of measurement to characterize light signal size, Fig. 4 is that detector reads process schematic, a positive bias VDread (as 3v) is added at drain terminal (2), control gate (3) will add back bias voltage VGread (as-6v) simultaneously, substrate (1) is Vbread ground connection, the electric current of test drain terminal (2).Electric field (exponential relationship) between N-type drain terminal electric current strong depend-ence drain terminal (2) and charge storage layer (5), wherein electric current (GIDL electric current) electric field relationship formula is
Id＝A*E
s*exp(-B/E
s)
Wherein A and B is constant, E
sfor the electric field between drain terminal (2) and charge storage layer (5), expression formula is more specifically
Wherein V
dfor the voltage of drain terminal (2), V
fgfor the voltage of charge storage layer (5), therefore the charge ratio that stores charge storage layer (5) of this electric current is more responsive, the electron number that charge storage layer (5) stores is more, GIDL electric current can be larger, the size of current read like this can characterize the photoelectron amount collected in side, can think the signal strength signal intensity of light intensity.In order to more accurately read the photoelectron number collected in actual mechanical process, adopt twi-read method, concrete operations are for once to obtain electric current I d in the rear reading of unglazed lower programming
0, after exposure programming, reading once obtains reading electric current is Id
1, twi-read electric current is poor (Δ Id=Id
1-Id
0) final signal magnitude.Fig. 4 b is drain terminal electric current (GIDL electric current) situation that detector obtains under different threshold voltages, and drain terminal reading voltage is VDread is 3V, and threshold voltage was obtained by the different time for exposure.Visible can the variable quantity of read threshold voltages by this read method under different threshold voltages, and then obtain signal magnitude.
The reset operation of detector adopts tunnelling mode, Fig. 5 is device erasing reset schematic diagram, a negative high voltage VGreset (as-10V) is added at grid (3), drain terminal (2) and substrate (1) apply a positive voltage pulse Vbase (as 6V) all simultaneously, when bottom dielectric both sides electric field reaches 10MW/cm, electrons enters substrate (1) or drain region (2) realize reset erase feature by tunnelling through underlying dielectric (6) from charge storage layer (5).Wherein can by regulating grid voltage and drain terminal and underlayer voltage and time controling erasing reseting procedure.
| Pattern | Grid voltage Vg | Drain terminal voltage Vd | Underlayer voltage Vb |
| Exposure programming | 0～8v | 0～6v | ＜Vd-4v |
| Read | -8～-5v | ＞Vg+7v | 0v |
| Reset | -15～-10v | ＞0v | ＝Vd |
Table 1
Table 1 lists detector work concrete operations voltage example ranges in different modes, and along with the adjustment of device technology and the requirement of different exposure, specific works voltage conditions can change a little.
Claims (5)
1. three end composite dielectric gate light-sensitive detectors, it is characterized in that three end composite dielectric gate panel detector structures comprise P type semiconductor substrate (1), directly over described substrate, are provided with bottom dielectric (6) successively, photoelectron accumulation layer (5), top layer dielectric (4), control gate (3); High concentration N is formed near the either side of laminated medium by ion implantation doping in P type semiconductor substrate
+type drain electrode (2); Described photoelectron accumulation layer (5) is polysilicon or silicon nitride; Control gate (3) is polysilicon or metal, and control gate or substrate have at least a place to be to the transparent or semitransparent window of detector detection wavelength; Top layer dielectric (4) is broadband semiconductor, can not enter control gate (3) to ensure electronics to pass through potential barrier from substrate after entering accumulation layer; The material of top layer dielectric adopts silicon oxide/silicon nitride/silicon oxide, silica/alumina/silica, silica, aluminium oxide; Underlying dielectric material adopts silica or high dielectric constant.
2. three end composite dielectric gate light-sensitive detectors according to claim 1, is characterized in that bottom dielectric (6) is silica 4-10nm, silicon nitride 4-10nm, or are HfO
2, Al
2o
3, ZrO
2, Y
2o
3, BaTiO
3, BaZrO
3, ZrSiO
4or Ta
2o
3, its equivalent SiO
2thickness is 4-10nm; Top layer dielectric (4) is for silica 10-20nm or be HfO
2, Al
2o
3, ZrO
2, Y
2o
3, BaTiO
3, BaZrO
3, ZrSiO
4or Ta
2o
3, its equivalent SiO
2thickness is 10-20nm, or is silicon oxide/silicon nitride/silicon oxide composite construction, its equivalent SiO
2thickness is 10-20nm; Photoelectron accumulation layer (5) is polysilicon 50-150nm or silicon nitride 3-10nm; Control gate (3) is polysilicon 50-200nm, metal.
3. three end composite dielectric gate light-sensitive detectors according to claim 1 and 2, it is characterized in that exposing programming process: add a back bias voltage pulse VBp at the substrate (1) of detector, drain electrode (2) adds a positive bias pulse VDp, and simultaneously control gate (3) will add zero-bias or add forward bias pulse VGp. substrate surface and drain region can produce depletion layer. and photon enters depletion layer and excites generation photoelectron; A part photoelectron control gate (3) and drain electrode (2) electric field driving under towards control gate (3) direction accelerate movement, when electron energy exceedes oxide layer potential barrier, bottom dielectric (6) injection photoelectron accumulation layer (5) will be crossed and realize photosignal collection, complete exposure programming process; The change of photoelectron accumulation layer (5) quantity of electric charge causes device threshold voltage to change, and this variable quantity is obtained by reading process, and then knows photoelectron number in photoelectron accumulation layer;
Signal-obtaining process: the reading process of detector is the method operation based on grid voltage induction drain terminal leakage current GIDL, the electric current of N-type drain electrode (2) is strongly depend on the electric field between drain electrode (2) and photoelectron accumulation layer (5) and is exponential relationship; Concrete operations are: add a positive bias VDread in drain electrode (2), control gate (3) will add back bias voltage VGread simultaneously, substrate VBread ground connection, test drain terminal electric current I d, then drain terminal size of current is subject to the impact of photoelectron accumulation layer (5) electromotive force, and the electron number that charge storage layer stores is more, and GIDL electric current can be larger, the electric current number energy side of reading like this characterizes the photoelectron amount collected, and can think the signal strength signal intensity of light intensity;
Reset erasing: reset operation adopts similar Flowler-Nordheim tunnelling mode, a negative high voltage VGreset is added in control gate (3), drain electrode (2) and substrate (1) apply a positive voltage pulse Vbase all simultaneously, when bottom dielectric both sides electric field reaches 10MW/cm, electrons enters raceway groove from charge storage layer tunnelling or drain region realizes reset erase feature.
4. three end composite dielectric gate light-sensitive detectors according to claim 3, it is characterized in that testing in signal-obtaining process in the actual mechanical process of drain terminal electric current I d to more accurately read the photoelectron number collected, adopt twi-read method, concrete operations are for once to obtain electric current in the rear reading of unglazed lower programming
, after exposure programming, reading once obtains reading electric current and is
, twi-read electric current does difference
final signal magnitude.
5. three end composite dielectric gate light-sensitive detectors according to claim 3 or 4, it is characterized in that adding a back bias voltage pulse VBp at substrate (1) in exposure process, drain electrode (2) adds a positive bias pulse VDp, control gate (3) will add zero-bias or add forward bias pulse VGp simultaneously, VBread is met at substrate in reading process, drain electrode (2) adds a positive bias pulse VDread, and control gate (3) will add back bias voltage pulse VGread simultaneously; VBp span is-8V ~-0.5V, VDp scope be 0.5V ~ 5V, VGp be 0.1V ~ 10V, VBread span be-1V ~ 1V, VDread span be 0.1V ~ 7V, VGread span is-10V ~ 0.1V.
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5969337A (en) * | 1997-04-29 | 1999-10-19 | Lucent Technologies Inc. | Integrated photosensing device for active pixel sensor imagers |
| US6956262B1 (en) * | 2001-12-21 | 2005-10-18 | Synopsys Inc. | Charge trapping pull up element |
| CN101807547A (en) * | 2009-02-18 | 2010-08-18 | 南京大学 | Photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector |
-
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5969337A (en) * | 1997-04-29 | 1999-10-19 | Lucent Technologies Inc. | Integrated photosensing device for active pixel sensor imagers |
| US6956262B1 (en) * | 2001-12-21 | 2005-10-18 | Synopsys Inc. | Charge trapping pull up element |
| CN101807547A (en) * | 2009-02-18 | 2010-08-18 | 南京大学 | Photosensitive composite dielectric gate MOSFET (Metal-Oxide-Semiconductor Field Effect Transistor) detector |
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