CN101950531B - Scanning-sustaining electrode drive circuit, plasma display and drive circuit thereof - Google Patents
Scanning-sustaining electrode drive circuit, plasma display and drive circuit thereof Download PDFInfo
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- CN101950531B CN101950531B CN 201010507290 CN201010507290A CN101950531B CN 101950531 B CN101950531 B CN 101950531B CN 201010507290 CN201010507290 CN 201010507290 CN 201010507290 A CN201010507290 A CN 201010507290A CN 101950531 B CN101950531 B CN 101950531B
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Abstract
The invention provides a scanning-sustaining electrode drive circuit, a plasma display and a drive circuit thereof. The scanning-sustaining electrode drive circuit comprises an energy recovery circuit, a sustaining circuit and a scanning circuit which are connected in turn, wherein the scanning circuit comprises a scanning chip, and a positive scanning voltage providing circuit and a negative scanning voltage providing circuit which are connected with the scanning chip; the negative scanning voltage providing circuit comprises a first switching tube of which the source is connected with a negative slope power supply and the drain is provided with a first connection node, a first diode of which the cathode is connected with a compensating power supply, a first polarity capacitor of which the cathode is connected with the anode of the first diode and the anode is connected to the first connection node, a second switching tube of which the drain is connected to the first connection node and the source is connected to the negative scanning voltage providing end of the scanning chip and a third switching tube of which the source is connected with the cathode of the first polarity capacitor and the drain is connected to the negative scanning voltage providing end of the scanning chip. Therefore, addressing time can be shortened.
Description
Technical field
The present invention relates to field of flat panel displays, in particular to a kind of scanning-keep electrode drive circuit, plasma display and driving circuit thereof.
Background technology
Chromatic alternating-current plasma display (AC-PDP, Alternating Current PlasmaDisplay Panel) is to develop according to the ultimate principle of gas discharge, realizes showing through the ultraviolet excitation light-emitting phosphor that gas discharge sends
At present; Three-electrode surface discharge type AC-PDP is the most competitive a kind of PDP type; Adopt addressing and display separation (ADS mostly for this AC-PDP; AdressDisplay Separation) technology realizes what gray scale showed, is about to a TV Field and is divided into successively luminous 8 or 10 or 12 sub-field.Every sub-field is formed by preparatory stage, address period and the phase of keeping, and just can realize that through the combination of suitable son 256 grades gray scale shows.
Three electrode quadrature shapes of three-electrode surface discharge type AC-PDP are distributed on the front-back baseboard, and between two substrates, realize discharge process.Wherein, the prebasal plate horizontal distribution and is kept electrode (X electrode) and scan-keep electrode (Y electrode), and addressing electrode (A electrode) is vertically distributing on the metacoxal plate.And X electrode and Y electrode are parallel to each other, arranged alternate, and with A electrode quadrature
Fig. 1 shows in the existing ADS actuation techniques drive waveforms synoptic diagram of any sub-field in the image.As shown in Figure 1, the ADS actuation techniques is divided into the following cycle with each sub-field usually: preparatory stage, address period and keep the phase.In the preparatory stage, three electrodes cooperatively interact, and wipe the wall electric charge (wall charge) that a son field is left over, and make full frame all display units reach consistent original state; In address period, driving circuit scans addressing to each row according to elder generation's strange back idol, top-down order, and writes image coded data at the A electrode, and the unit that all will be shown in this child field has accumulated suitable wall electric charge; In the phase of keeping, X electrode and Y electrode alternately add keeps voltage, makes the unit generation discharge that has accumulated the wall electric charge in address period, thereby realizes the demonstration of image.
Fig. 2 shows the circuit theory synoptic diagram of Y electrode drive circuit of the prior art.As shown in Figure 2, the Y electrode drive circuit comprises energy recovery circuit 10, holding circuit 20 and sweep circuit 30.Wherein, the YP of scanning chip 31 is that positive scanning voltage provides end in the sweep circuit, and YG provides end for negative scanning voltage, and the circuit that is connected with YP is used to align scanning voltage to be regulated, and the circuit that is connected with the YG end is used for negative scanning voltage is regulated.
Wherein, the voltage that negative scanning voltage provides end YG through power switch pipe Qrampdn is connected to-VY produces, the structure of negative scanning voltage regulating circuit is shown in the dotted line among Fig. 2.Power switch pipe Qrampdn one end is connected to-VY; The other end is connected at address period Qrampdn to the YG end (negative scanning voltage end) that connects the scanning chip, and voltage-VY is applied to the YG end; The negative scanning voltage perseverance of whole address period is-VY that waveform is the address period oscillogram among Fig. 1.
Preparatory stage is when beginning, and promptly 1. it all is 0V that three electrodes are attend institute's making alive the stage among Fig. 1; But be added on the X electrode because last when finishing of last or the last son field phase of keeping kept pulse, and kept discharge back negative wall electric charge of accumulation on the X electrode, on the Y electrode, accumulated positive wall electric charge; Therefore, the stage in Fig. 1 2. with the stage 3. in, on the Y electrode, apply wide positive slopes voltage Vsetup (Vsetup ≈ 350V) much larger than firing voltage; Make between X and Y electrode and discharge, accumulated positive wall electric charge and negative wall electric charge on latter two electrode that discharges respectively, subsequently the stage 4. with the stage 5. in; On the Y electrode, add a wide negative ramp voltage-VY (VY ≈ 170V), on the X electrode, add a positive plateau voltage (Vb ≈ 150V), make between X and the Y electrode slowly to reach firing voltage; Discharge; Neutralize wall electric charge positive on X and the Y electrode and negative wall electric charge, make the state of full frame all unit reach the consistent state that extinguishes at last, thus make subsequently stage 6. with the stage 7.; Be address period, can be addressed to each unit accurately.
Since the stage shown in Figure 1 3. with the stage 5. in; The acclivity pulse that applies and the voltage changing rate of falling pulse are less; Cause the reset cycle holding time longer; And the scanning of display unit in applying decline slope pulse process-keep electrode and keep between the electrode and strong discharge can not take place makes the space ion concentration weak in lower level when getting into addressing period, and the time that causes addressing period to take is long.And along with the raising of monitor resolution, the needed addressing time is just longer, and addressing time lengthening shortens with regard to meaning the time that really is used to keep demonstration, and this is disadvantageous for the brightness that improves display.In order to eliminate the false contouring problem that exists when plasma display adopts the ADS method; Generally can adopt increases the method that shows the son field; But increase the increase greatly that sub-number of fields also means the addressing time; So also can reduce greatly to hold time, this also be disadvantageous for the brightness that improves display.
Therefore, the addressing time that how to reduce scanning of the prior art-keep electrode drive has become the major issue that PDP faces in driving, and it is even more important particularly in high-resolution occasion, just to seem.
Summary of the invention
The present invention aims to provide a kind of scanning-keep electrode drive circuit, plasma display and driving circuit thereof, and is longer to solve the addressing time of scanning-keep electrode drive in the prior art, causes the long problem of reset cycle holding time.
To achieve these goals; According to an aspect of the present invention, a kind of scanning-keep electrode drive circuit is provided, has comprised the energy recovery circuit, holding circuit and the sweep circuit that connect successively; Sweep circuit comprises that scanning chip, the positive scanning voltage that is connected with the scanning chip provide circuit and negative scanning voltage that circuit is provided; Wherein negative scanning voltage provides circuit to comprise: first switching tube, and its source electrode is connected with negative slope power supply, and drain electrode forms first connected node; First diode, its negative pole is connected with offset supply; First polar capacitor, its negative pole is connected with the positive pole of first diode, and positive pole is connected to first connected node; The second switch pipe, its drain electrode is connected to first connected node, and the negative scanning voltage that source electrode is connected to the scanning chip provides end; The 3rd switching tube, its source electrode is connected with the negative pole of first polar capacitor, and the negative scanning voltage that drain electrode is connected to the scanning chip provides end.
Further, offset supply is adjustable in preset range.
Further, first switching tube, second switch pipe and the 3rd switching tube are power switch pipe.
Further, energy recovery circuit comprises: first electric capacity, and the one of which end forms second connected node, other end ground connection; The 3rd switching tube, its drain electrode is connected to Section Point; Second diode, its positive pole is connected with the source electrode of the 3rd switching tube, and negative pole forms the 3rd connected node; The 4th switching tube, its source electrode is connected to Section Point; The 3rd diode, its positive pole is connected with the 3rd connected node, and negative pole is connected with the drain electrode of the 4th switching tube; First inductance, the one of which end is connected to the 3rd connected node, and the other end is the output terminal of energy recovery circuit.
Further, first inductance is the ribbon core telefault.
Further, holding circuit comprises: the 5th switching tube, and its drain electrode provides power supply to be connected with high voltage, and source electrode is as the input end of holding circuit; The 6th switching tube, its drain electrode is connected source ground with the source electrode of the 5th switching tube; The 7th switching tube, its drain electrode provides power supply to be connected with high voltage; The 4th diode, its positive pole is connected with the source electrode of the 7th switching tube, and negative pole is connected the output terminal of back as holding circuit with the source electrode of the 5th switching tube.
According to another aspect of the present invention, a kind of driving circuit of plasma display is provided, has comprised scanning-keep electrode drive circuit.
According to a further aspect of the invention, a kind of plasma display is provided, the driving circuit of this plasma display comprises and scans-keep electrode drive circuit.
First diode that has offset supply through employing in the present embodiment and be connected successively with offset supply and the structure of first polar capacitor; Make to scan-when keeping electrode and being in address period; The voltage that the negative scanning voltage of scanning chip provides end to receive is the power supply sum that negative slope power supply and offset supply provide; And, can make the negative scanning voltage of scanning chip provide the magnitude of voltage at end place slowly to change, the proportional variation of voltage that makes negative scanning voltage provide end to receive because the 3rd switching tube is operated under the oblique wave; Thereby the voltage that makes negative scanning voltage provide end to receive is a negative decline ramp voltage; Negative scanning voltage is also more and more lower, has effectively remedied the address discharge that is reduced to cause by the space ion concentration and has postponed, thereby can select the shorter addressing time; It is longer to have solved the addressing time of scanning-keep electrode drive in the prior art, causes the long problem of reset cycle holding time.
Description of drawings
Figure of description is used to provide further understanding of the present invention, constitutes the application's a part, and illustrative examples of the present invention and explanation thereof are used to explain the present invention, do not constitute improper qualification of the present invention.In the accompanying drawings:
Fig. 1 shows the drive waveforms synoptic diagram of an any sub-field of image in the existing ADS actuation techniques;
Fig. 2 shows the circuit theory synoptic diagram of Y electrode drive circuit of the prior art;
Fig. 3 shows the circuit theory synoptic diagram according to the Y electrode drive circuit of the embodiment of the invention;
Fig. 4 shows the circuit theory synoptic diagram that circuit is provided according to the negative scanning voltage of the embodiment of the invention; And
Fig. 5 shows the drive waveforms synoptic diagram according to an any sub-field of image in the ADS actuation techniques of the embodiment of the invention.
Embodiment
Need to prove that under the situation of not conflicting, embodiment and the characteristic among the embodiment among the application can make up each other.Below with reference to accompanying drawing and combine embodiment to specify the present invention.
Describe the present invention in detail and scan-keep the concrete structure of electrode drive circuit below in conjunction with Fig. 3 and Fig. 4.
Fig. 3 shows scanning according to the embodiment of the invention-the keep circuit theory synoptic diagram of electrode drive circuit.As shown in Figure 3, scan-keep electrode drive circuit and comprise energy recovery circuit 10, holding circuit 20 and the sweep circuit 30 that connects successively.Sweep circuit 30 comprises that scanning chip 31, the positive scanning voltage that is connected with scanning chip 31 provide circuit and negative scanning voltage that circuit is provided.Wherein, negative scanning voltage provides circuit to be the structure in Fig. 3 mid point scribe area.
Fig. 4 shows the circuit theory synoptic diagram that circuit is provided according to the negative scanning voltage of the embodiment of the invention.As shown in Figure 4, negative scanning voltage provides circuit to comprise the first switching tube Qrampdn, and its source electrode is connected with negative slope power supply-Vy, and drain electrode forms the first connected node Yout; The first diode D1, its negative pole is connected with offset supply-Δ Vy; The first polar capacitor C1, its negative pole is connected with the positive pole of the first diode D1, and positive pole is connected to the first connected node Yout; The first connected node Yout through lead be of coupled connections to scanning chip 31 negative scanning voltage provide the end YG.
In the present embodiment, the scanning chip 31 shown in Fig. 3 and Fig. 4 be merely schematic method for expressing, do not represent the inside concrete structure of scanning chip 31, and its output arrow is represented to link to each other with the Y electrode.For example, scanning chip 31 can have a plurality of output terminals, and inside has a plurality of switching tubes of parallel connection.
In the present embodiment, negative slope power supply-Vy and offset supply-Δ Vy represent that the magnitude of voltage that negative slope power supply provides is Vy, and the magnitude of voltage that offset supply provides is Δ Vy, and the magnitude of voltage that offset supply provides is adjustable in the Δ Vy.For example; The magnitude of voltage Δ Vy that offset supply provides can be chosen in the scope of 5V-20V; And when selecting magnitude of voltage in the 5V-20V scope; Can make the total addressing time decreased 30% in the address period, can effectively increase like this and hold time, help improving display brightness, improve image quality and reduce false contouring.
The selection of concrete magnitude of voltage Δ Vy both can be confirmed according to the parameter of display, also can rule of thumb be worth selection, and concrete definite method is existing in the prior art to be introduced in detail, is not described in detail at this.
In the present embodiment, when scanning chip 31 was operated in scanning mode, Qrampdn opened, and the magnitude of voltage at node Yout place is pulled to-Vy, and the QscanL among Fig. 3 closes, and QscanH opens, and the voltage of YP end is (Vsc-Vy); Qpass1H closes, and Qpass1L opens, because the existence of capacitor C 1; The magnitude of voltage at YG end place is pulled to-(Vy+ Δ Vy); Because Qpass1L is operated under the oblique wave, and the magnitude of voltage at YG end place is slowly changed, thereby produce negative decline oblique wave scanning voltage; At last, scanning chip 31 obtains the negative scanning impulse that following drop angle waveshape changes according to scan-data on the Y electrode.
First diode D1 that has offset supply through employing in the present embodiment and be connected successively with offset supply and the structure of the first polar capacitor C1; Make to scan-when keeping electrode and being in address period; The voltage that the negative scanning voltage of scanning chip provides end to receive is the power supply sum that negative slope power supply and offset supply provide; And because Qpass1L is operated under the oblique wave, the magnitude of voltage at YG end place is slowly changed, the proportional variation of voltage that makes negative scanning voltage provide end to receive; Thereby the voltage that makes negative scanning voltage provide end to receive is a negative decline ramp voltage; Negative scanning voltage is also more and more lower, has effectively remedied the address discharge that is reduced to cause by the space ion concentration and has postponed, thereby can select the shorter addressing time; It is longer to have solved the addressing time of scanning-keep electrode drive in the prior art, causes the long problem of reset cycle holding time.
Preferably, in the above embodiment of the present invention, the first switching tube Qrampdn, second switch pipe Qpass1H and the 3rd switching tube Qpass1L are power switch pipe.
In the above-described embodiments, energy recovery circuit 10 comprises: first capacitor C 2, one of which end form the second connected node A, other end ground connection GND; The 3rd switching tube QerH, its drain electrode is connected to Section Point A; The second diode DerH, its positive pole is connected with the source electrode of the 3rd switching tube QerH, and negative pole forms the 3rd connected node B; The 4th switching tube QerL, its source electrode is connected to Section Point A; The 3rd diode DerL, its positive pole is connected with the 3rd connected node B, and negative pole is connected with the drain electrode of the 4th switching tube QerL; The first inductance L er, one of which end are connected to the 3rd connected node B, and the other end is the output terminal of energy recovery circuit 10.
And, in the above-described embodiments, scan-keep electrode drive circuit, it is characterized in that holding circuit 20 comprises: the 5th switching tube QsusH, its drain electrode provides power supply Vs to be connected with high voltage, and source electrode is as the input end of holding circuit 20; The 6th switching tube QsusL, its drain electrode is connected source ground with the source electrode of the 5th switching tube QsusH; The 7th switching tube Qsetup, its drain electrode provides power supply Vs to be connected with high voltage; The 4th diode D4, its positive pole is connected with the source electrode of the 7th switching tube Qsetup, and negative pole is connected the output terminal of back as holding circuit 20 with the source electrode of the 5th switching tube QsusH.
Preferably, in the present embodiment, the first inductance L er is the ribbon core telefault.
Specify the scanning of the embodiment of the invention-the keep working condition of electrode drive circuit below in conjunction with Fig. 5.
Fig. 5 shows the drive waveforms synoptic diagram according to an any sub-field of image in the ADS actuation techniques of the embodiment of the invention.
As shown in Figure 5, be the drive waveforms of a certain son field, be followed successively by the waveform synoptic diagram of X electrode drive circuit, Y electrode drive circuit and A electrode drive circuit from top to bottom.10. 9. 8. 7. 6. 5. 4. 3. 2. 1. label be respectively each stage of drive waveforms in the sub-field.Wherein 4. 3. 2. 1. be the preparatory stage, 5. 6. 7. the stage be address period, the several stages of back is the phase of keeping.
Referring to Fig. 3 and Fig. 5, each sub-field at first, promptly 1. the last voltage of Y is 0 the stage among Fig. 5, at this moment, Yout switches to the YG end, switching tube QsusL opens, the YG end is connected to GND, realizes that scanning chip 31 output voltages are 0V; Stage 2. in, other switch closures, the output of scanning chip 31 is directly connected to YP end through the chip controls signal among Fig. 3, voltage amplitude is Vsc (being about 110V), is connected with electric capacity between YP and the YG, so both voltage differences are always Vsc; Stage 3. in; Switch Qsetup among Fig. 3 opens; Other switches cut out, and the output of Y electrode drive circuit slowly rises to Vsetup (Vsetup=Vsc+Vs) with exponential form, and the value of Vsetup is about 350V; The purpose that slowly rises is not take place to neutralize most wall electric charge on the strong basis of discharging, and very strong bias light can not take place; Stage 4. in, the power switch pipe QsusL of Fig. 3 opens, other switches cut out, Y output is connected to GND, making output voltage is 0V; Stage 5. in; The switching tube Qrampdn of Fig. 3 opens; Other switches cut out, and make YG voltage will be-VY, realize that therefore the output of scanning chip 31 drops to-VY with the exponential form slope; The purpose that the slope descends also is in order on the basis that strong discharge is not taking place, to neutralize most wall electric charge, and very strong bias light can not take place.
6. in the stage, as shown in Figure 3, QscanL closes; Make Y output be connected to Vsc through scanning chip controls signal, at this moment, output float-VY is last; Promptly be output as-VY+Vsc; In whole address period, the voltage on the unit that is not addressed to is-VY+Vsc, shown in the address period of Fig. 5; The stage 7. in; Qpass1H closes; Qpass1L opens; Negative decline slope circuit produces a negative decline ramp voltage (VY-Δ VY), and is applied to the YG end of scanning chip, and the capable Y driving circuit that the unit that is addressed to through scan-data belongs to can be exported to the negative pulse of a decline oblique wave of this row form.
Next carry out the transition to the phase of keeping, in the 8. stage, the switch QsusL of Fig. 3 opens, and other switches cut out, and Y output is connected to GND, and making output voltage is 0V; 9. keeping pulse height is Vs in order to keep rising edge of a pulse the stage, at this moment; The energy recovery circuit part can be worked, and at first the switching tube QerH among Fig. 3, QpassL and Qpass 1H open, and charge stored on the capacitor C 2 is transferred on the Y electrode through inductance L er and QpassL, Qpass1H and scanning chip; It is about 80% of Vs that this part electric charge makes the voltage on the Y electrode; Next switching tube QsusH opens, and other switches cut out, and moves the amplitude of keeping rising edge of a pulse to Vs; Ensuing 10. the stage be the negative edge of keeping pulse, keep voltage and need move 0 current potential to, do not waste in order to make energy; Electric charge is stored in the storage capacitor through switching tube QerL, moves output voltage amplitude to 0 current potential through switching tube QsusL more subsequently, next repeat rising, step-down operation; Accomplish whole keeping the phase; Get into the driving process of next son field subsequently, repeat 10 processes that similar front was said, accomplish the Y electrode drive of all son fields; Cooperate X electrode drive and A electrode drive simultaneously, accomplish the demonstration of a field picture.
The present invention also provides a kind of driving circuit of plasma display, and this driving circuit comprises the scanning of X electrode drive circuit, A electrode drive circuit and the above embodiment of the present invention-keep electrode drive circuit.Concrete structure is existing in the above-described embodiments to be introduced in detail, is not described in detail at this.
Simultaneously, the present invention also provides a kind of plasma display, and the driving circuit of this display comprises the scanning of X electrode drive circuit, A electrode drive circuit and the above embodiment of the present invention-keep electrode drive circuit.Concrete structure is existing in the above-described embodiments to be introduced in detail, is not described in detail at this.
From above description, can find out that the above embodiments of the present invention have realized following technique effect:
In address period, the circuit structure shown in the embodiment of the invention produces negative decline oblique wave scanning voltage on the basis of negative pressure-VY, is applied to the reference voltage end YG of scanning chip, can reduce the addressing time, and increase is held time.And, because the increase of holding time helps improving display brightness, improves image quality and reduces false contouring.
The above is merely the preferred embodiments of the present invention, is not limited to the present invention, and for a person skilled in the art, the present invention can have various changes and variation.All within spirit of the present invention and principle, any modification of being done, be equal to replacement, improvement etc., all should be included within protection scope of the present invention.
Claims (8)
1. one kind scans-keeps electrode drive circuit; Comprise the energy recovery circuit (10), holding circuit (20) and the sweep circuit (30) that connect successively; It is characterized in that; Said sweep circuit (30) comprises that scanning chip (31), the positive scanning voltage that is connected with scanning chip (31) provide circuit and negative scanning voltage that circuit is provided, and wherein said negative scanning voltage provides circuit to comprise:
First switching tube (Qrampdn), (Vy) be connected, drain electrode forms first connected node (Yout) to its source electrode with negative slope power supply;
First diode (D1), its negative pole is connected with offset supply (Δ Vy);
First polar capacitor (C1), its negative pole is connected with the positive pole of said first diode (D1), and positive pole is connected to said first connected node (Yout);
Second switch pipe (Qpass1H), its drain electrode are connected to said first connected node (Yout), and the negative scanning voltage that source electrode is connected to said scanning chip (31) provides end (YG);
The 3rd switching tube (Qpass1L), its source electrode is connected with the negative pole of said first polar capacitor (C1), and the negative scanning voltage that drain electrode is connected to said scanning chip (31) provides end (YG).
2. scanning according to claim 1-keep electrode drive circuit is characterized in that, (Δ Vy) is adjustable in preset range for said offset supply.
3. scanning according to claim 1 and 2-keep electrode drive circuit is characterized in that, said first switching tube (Qrampdn), said second switch pipe (Qpass1H) and said the 3rd switching tube (Qpass1L) are power switch pipe.
4. scanning according to claim 3-keep electrode drive circuit is characterized in that, said energy recovery circuit (10) comprising:
First electric capacity (C2), one of which end form second connected node (A), other end ground connection;
The 4th switching tube (QerH), its drain electrode are connected to said second connected node (A);
Second diode (DerH), its positive pole is connected with the source electrode of said the 4th switching tube (QerH), and negative pole forms the 3rd connected node (B);
The 5th switching tube (QerL), its source electrode are connected to said second connected node (A);
The 3rd diode (DerL), its positive pole is connected with said the 3rd connected node (B), and negative pole is connected with the drain electrode of said the 5th switching tube (QerL);
First inductance (Ler), one of which end are connected to said the 3rd connected node (B), and the other end is the output terminal of said energy recovery circuit (10).
5. scanning according to claim 4-keep electrode drive circuit is characterized in that, said first inductance (Ler) is the ribbon core telefault.
6. scanning according to claim 3-keep electrode drive circuit is characterized in that, said holding circuit (20) comprising:
The 6th switching tube (QsusH), its drain electrode provides power supply (Vs) to be connected with high voltage, and source electrode is as the input end of said holding circuit (20);
The 7th switching tube (QsusL), its drain electrode is connected source ground with the source electrode of said the 6th switching tube (QsusH);
The 8th switching tube (Qsetup), its drain electrode provides power supply (Vs) to be connected with said high voltage;
The 4th diode (D4), its positive pole is connected with the source electrode of said the 8th switching tube (Qsetup), and negative pole is connected the output terminal of back as said holding circuit (20) with the source electrode of said the 6th switching tube (QsusH).
7. the driving circuit of a plasma display is characterized in that, comprises like the described scanning of claim 1-6-keep electrode drive circuit.
8. a plasma display is characterized in that, the driving circuit of said plasma display comprises like the described scanning of claim 1-6-keep electrode drive circuit.
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| CN 201010507290 CN101950531B (en) | 2010-09-30 | 2010-09-30 | Scanning-sustaining electrode drive circuit, plasma display and drive circuit thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201010507290 CN101950531B (en) | 2010-09-30 | 2010-09-30 | Scanning-sustaining electrode drive circuit, plasma display and drive circuit thereof |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1622151A (en) * | 2004-12-20 | 2005-06-01 | 彩虹集团电子股份有限公司 | Drive method for three-electrode surface discharge type plasma display |
| CN1790460A (en) * | 2004-12-14 | 2006-06-21 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| JP2009186717A (en) * | 2008-02-06 | 2009-08-20 | Panasonic Corp | Plasma display device, and method of driving plasma display panel |
| CN101685601A (en) * | 2008-09-28 | 2010-03-31 | 四川虹欧显示器件有限公司 | Level generating circuit for plasma display |
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2010
- 2010-09-30 CN CN 201010507290 patent/CN101950531B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1790460A (en) * | 2004-12-14 | 2006-06-21 | Lg电子株式会社 | Plasma display apparatus and driving method thereof |
| CN1622151A (en) * | 2004-12-20 | 2005-06-01 | 彩虹集团电子股份有限公司 | Drive method for three-electrode surface discharge type plasma display |
| JP2009186717A (en) * | 2008-02-06 | 2009-08-20 | Panasonic Corp | Plasma display device, and method of driving plasma display panel |
| CN101685601A (en) * | 2008-09-28 | 2010-03-31 | 四川虹欧显示器件有限公司 | Level generating circuit for plasma display |
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| CN101950531A (en) | 2011-01-19 |
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