CN101719482A - Manufacturing method of monolithic integrated pressure sensor - Google Patents
Manufacturing method of monolithic integrated pressure sensor Download PDFInfo
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- CN101719482A CN101719482A CN200910191568A CN200910191568A CN101719482A CN 101719482 A CN101719482 A CN 101719482A CN 200910191568 A CN200910191568 A CN 200910191568A CN 200910191568 A CN200910191568 A CN 200910191568A CN 101719482 A CN101719482 A CN 101719482A
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Abstract
The invention discloses a manufacturing method of a monolithic integrated pressure sensor. Te In the invention, overcomes the problem of processing technology compatibility of a resistance type pressure sensor and an amplification processing circuit is solved, combines the processing technology of the resistance type pressure sensor and the processing technology of the amplification processing circuit are combined, and utilizes a special clamp for protecting an integrated circuit and a piezoresistor on the front surface are utilized, meanwhile, a deep slot is formed below the piezoresistor through corrosion, so that the piezoresistor is successfully manufactured on a movable silicon film, . The invention solvessolving the technical difficult problem of processing technology compatibility of the pressure sensor and the circuit, and realizing realizes the monolithic integration of the pressure sensor and the circuit. The method is suitable for the processing field of miniaturized high-reliability pressure sensors.
Description
Technical field
The present invention relates to a kind of manufacture method of monolithic integrated pressure sensor.It is applicable to miniaturization, high-reliability pressure sensors manufacture field.
Background technology
At present, in the semiconductor pressure sensor manufacturing technology, the method for making pressure sensor mainly contains:
1, film piezo resistive technology.It is to grow one deck to pressure-sensitive piezoelectric film material in silicon chip substrate, makes piezoresistive regions, splash-proofing sputtering metal lead-in wire, photoetching metal lead wire, alloy by lithography, produces diaphragm pressure sensor.It is to have utilized pressure-sensitive piezoelectric film material is come detected pressures, thereby forms the pressure sensor of piezoelectric membrane resistance-type.
2, silicon resistor formula technology.It is by semiconductor process techniques methods such as oxidation, photoetching, the diffusions of P type, on N type silicon chip, produce P type diffusion resistance, utilize dual surface lithography, the deep trouth burn into silex glass bonding of MEMS technology, erode away dell at silicon chip over against the silicon chip substrate back side of P type diffusion resistance, allow P type diffusion resistance on silicon thin film.It is to utilize pressure to cause the silicon thin film distortion, makes P type diffusion resistance value change, and comes test pressure by the variation that detects P type diffusion resistance resistance, forms resistive pressure sensor.
3, capacitance technology.It is that silicon chip is that a utmost point, metal on glass are another electrode by body silicon technologies such as the dual surface lithography of MEMS technology, deep trouth burn into silex glass bondings, forms the plates capacitance of a hollow.When silicon chip was stressed, the plates capacitance of hollow distance changed, and electric capacity changes, and came detected pressures by detecting changes in capacitance, formed capacitance pressure transducer.
No matter adopt above-mentioned any semiconductor pressure sensor, need that all these variations are converted to the signal of telecommunication and handle, finally form employed pressure sensor.Along with the pressure sensor scope of application extensively and profoundly, the one chip of active demand pressure sensor and amplification treatment circuit is integrated, to improve the reliability of pressure sensor, reduces its volume.
And the piezoelectric membrane resistive pressure sensor of film piezo resistive technology made, it is realized and the integrated relatively difficulty of the monolithic of amplification treatment circuit, main cause is piezoelectric film material deposit, corrosion processing and IC processing when compatible, pollutes IC technology easily, causes the IC electric leakage.The capacitance pressure transducer, of capacitance technology made, because body silicon technology such as deep trouth burn into silex glass bonding has big difficulty with IC process technology compatibility, so it is integrated also difficult with amplification treatment circuit realization monolithic.And the resistive pressure sensor of silicon resistor formula technology made and amplification treatment circuit realize that monolithic is integrated, how also there is organically the difficult point that the processing technology of pressure sensor and amplifying circuit processing technology are combined, in the actual process process, be difficult to accomplish not influence each other, therefore, it realizes that monolithic is integrated also very difficult.
Summary of the invention
The purpose of this invention is to provide a kind of monolithic integrated pressure sensor integrated approach, warm pressure sensor processing technology and bipolar circuit processing technology, pressure sensor and amplification treatment circuit are integrated on the same chip, realize the making of monolithic integrated pressure sensor, to satisfy the market demands of monolithic integrated pressure sensor.
The technical scheme that the present invention solves the problems of the technologies described above is that a kind of manufacture method of monolithic integrated pressure sensor the steps include:
(1) on P type silicon substrate film, makes the P type silicon substrate that bipolar analog integrated circuit and piezo-resistance are used;
(2) on the P type silicon substrate that described bipolar analog integrated circuit and piezo-resistance are used, carry out the N-epitaxy technique, on described N-epitaxial loayer, make the piezo-resistance of bipolar integrated circuit and transducer;
(3) adopt special-purpose corrosion clamp, the described silicon chip back of having made the piezo-resistance of bipolar integrated circuit and transducer is carried out burn into carry out the silex glass bonding again, realize single chip integrated pressure sensor.
The step of the P type silicon substrate that bipolar analog integrated circuit of described making and piezo-resistance are used comprises:
(1) P type silicon substrate film is＜100〉crystal orientation, twin polishing, thickness 400 ± 10 μ m, resistivity 7-13 Ω cm, oxidation, oxidated layer thickness is 0.6 ± 0.05 μ m;
(2) photoetching N+ buried regions district;
(3) band glue arsenic injects dosage 6E15/cm
2, energy 100keV removes photoresist;
(4) photoetching P+ buried regions district;
(5) band glue boron injects dosage 1E15/cm
2, energy 60keV removes photoresist;
(6) double-sided exposure makes the zone, the back side in sensor resistance district by lithography; Dry etching silicon, corrosion depth are 1 ± 0.1 μ m;
(7) two-sided deposit silicon dioxide, its thickness are 0.5 ± 0.1 μ m;
(8) high temperature knot, 1200 ℃ of temperature, 8h removes all oxide layers, forms P+ buried regions, N+ buried regions and back panel field mark.
The step of making the piezo-resistance of bipolar integrated circuit and transducer on described N-epitaxial loayer comprises:
(1) carries out the N-epitaxy technique with described P type silicon substrate material, epitaxy layer thickness 8 ± 1 μ m, resistivity 2 ± 0.3 Ω cm;
(2) oxidation is carried out on described surface of having carried out the P type silicon substrate silicon chip of N-epitaxy technique, formed the silicon dioxide oxide layer, thickness is 1 ± 0.1 μ m;
(3) penetrating region of photoetching NPN pipe;
(4) phosphorus penetrates diffusion, junction depth 2 ± 0.3 μ m, and R=15 ± 5 Ω forms penetrating region;
(5) the transistorized isolated area of photoetching;
(6) boron isolation diffusion, junction depth 8 ± 0.5 μ m, R=8 ± 3 Ω forms isolated area 8;
(7) remove all oxide layers, oxidation once more, thickness 0.6 ± 0.05 μ m;
(8) collector region-emitter region of the contact zone of the base of photoetching NPN pipe, sensor sensing resistance and lateral PNP pipe;
(9) boryl district diffusion, junction depth 2 ± 0.3 μ m, R=130 ± 20 Ω forms the base of NPN pipe, the contact zone of sensor sensing resistance, the collector region and the emitter region of lateral PNP pipe;
(10) the clamped district of the base of the emitter region of photoetching NPN pipe and lateral PNP pipe, piezo-resistance, mos capacitance district;
(11) β is transferred in phosphorous diffusion, and β=60-100 forms the emitter region of NPN pipe, the base of lateral PNP pipe, the clamped district and the mos capacitance district of piezo-resistance;
(12) photo light sensor sensitive resistance district;
(13) band glue boron injects dosage 3E13/cm
2, energy 60keV removes photoresist;
(14) LPCVD deposit silicon dioxide, thickness are 0.3 ± 0.05 μ m;
(15) photoetching capacitive region;
(16) thin oxidation, thickness is 0.1 ± 0.02 μ m;
(17) two-sided deposit silicon nitride, two-sided silicon nitride thickness are 0.13 ± 0.02 μ m, form sensor sensing resistance, mos capacitance;
(18) lithography fair lead;
(19) sputter chrome-silicon film resistor, R=1000 ± 200 Ω;
(20) photoetching chrome-silicon film resistor;
(21) sputtered silicon aluminium lamination, sial thickness 1.2 ± 0.2 μ m;
(22) photoetching lead-in wire forms the sial lead-in wire;
(23) alloy, 440 ℃ of temperature, 30min;
(24) PECVD deposit silicon dioxide, thickness 1.2 ± 0.2 μ m, photoetching passivation hole.
The described silicon chip back of having made the piezo-resistance of bipolar integrated circuit and transducer is carried out the step that burn into carries out the silex glass bonding again to be comprised:
(1) will carry out the silicon chip of integrated circuit and sensor resistance, carry out back side photoetching, make the silicon area of its back side below transducer piezo-resistance zone by lithography;
(2) (applied for patent of invention with special-purpose corrosion clamp, patent name is: silicon slice corrosion single-face protection clamper, the patent No. is 2008102330392), allow the KOH corrosive liquid only corrode the silicon of the back side below the piezo-resistance zone of transducer, and positive integrated circuit and piezo-resistance can not be corroded corrosion depth 350 ± 10 μ m;
(3) dry etching falls the silicon nitride and the silicon dioxide at the back side;
(4) described silicon chip back and sheet glass are carried out the silex glass anode linkage.
Beneficial effect:
Because the inventive method has adopted above-mentioned technical scheme; piezo-resistance manufacture craft and bipolar integrated circuit processing technology are combined; high-sensitive piezo-resistance made be placed on after the bipolar circuit processing technology; avoided the pyroprocess of bipolar circuit processing to influence piezo-resistance; and utilize special-purpose anchor clamps to protect positive integrated circuit and piezo-resistance; while has also eroded away the deep trouth below the piezo-resistance; piezo-resistance successfully is produced on the movable silicon thin film; solved the technical barrier of pressure sensor and circuit fabrication process compatible, realized that the monolithic of pressure sensor and amplification treatment circuit is integrated.
Description of drawings
Fig. 1 is the P type silicon chip generalized section of band silicon dioxide oxide layer of the present invention;
Fig. 2 is the P+ isolation of having made bipolar analog integrated circuit and piezo-resistance on the silicon substrate film of Fig. 1 of the present invention, the generalized section behind the N+ buried regions;
Fig. 3 carries out the generalized section that N-delays outward for Fig. 2 of the present invention;
Fig. 4 penetrates diffusion, P type isolation diffusion for Fig. 3 of the present invention carries out phosphorus, remove the generalized section behind the silicon dioxide;
Fig. 5 carries out the generalized section after the contact zone diffusion of collector region-emitter region, piezo-resistance of base, the lateral PNP pipe of NPN pipe for Fig. 4 of the present invention;
Fig. 6 has carried out NPN pipe emitter region, collector region, the base of lateral PNP pipe, the clamped district of piezo-resistance, the diffusion of mos capacitance district for Fig. 5 of the present invention, and has transferred the generalized section behind the β;
Fig. 7 is the generalized section behind Fig. 6 photoetching piezo-resistance of the present invention, injection boron, the LPCVD deposit silicon dioxide;
Fig. 8 is the generalized section after Fig. 7 photoetching electric capacity of the present invention, thin oxidation, the two-sided deposit silicon nitride of LPCVD;
Fig. 9 is the generalized section after Fig. 8 lithography fair lead of the present invention, sputter chrome-silicon film resistor, photoetching chrome-silicon film resistor, sputter sial, photoetching sial lead-in wire, alloy and passivation of PECVD silicon dioxide and the photoetching;
Figure 10 carries out back side photoetching, utilizes special fixture to carry out back side deep trouth burn into dry method to remove the generalized section of carrying out anode linkage behind back side silicon nitride and the silicon dioxide with glass for Fig. 9 of the present invention;
Embodiment
The specific embodiment of the present invention is not limited only to following description.Now in conjunction with the accompanying drawings the present invention is further specified.
The key step of the inventive method is as follows:
1. on P type silicon substrate film 2, the step of making the P type silicon substrate that bipolar analog integrated circuit and piezo-resistance use is as follows:
(1) P type silicon substrate film 2 is＜100〉crystal orientation, twin polishing, thickness 400 ± 10 μ m, resistivity 7-13 Ω cm cleans, oxidation, oxide layer 1 thickness is 0.6 ± 0.05 μ m, as shown in Figure 1;
(2) photoetching N+ buried regions district 3;
(3) band glue arsenic injects dosage 6E15/cm
2, energy 100keV removes photoresist;
(4) photoetching P+ buried regions district 4;
(5) band glue boron injects dosage 1E15/cm
2, energy 60keV removes photoresist;
(6) adopt the method for double-sided exposure (MEMS common technology), make zone, the back side one dry etching silicon 5 in sensor resistance district by lithography, corrosion depth is 1 ± 0.1 μ m;
(7) two-sided deposit silicon dioxide, its thickness 0.5 ± 0.1 μ m;
(8) high temperature knot, 1200 ℃ of temperature, 8h removes all oxide layers, obtains P+ buried regions 3, N+ buried regions 4, back panel field mark 5, as shown in Figure 2.
2. on described N-epitaxial loayer, the step of the piezo-resistance of making bipolar integrated circuit and transducer is as follows:
(1) carry out the N-epitaxy technique with described P type silicon substrate film, epitaxial loayer 6 thickness 8 ± 1 μ m, resistivity 2 ± 0.3 Ω cm, as shown in Figure 3;
(2) oxidation is carried out on described surface of having carried out the P type silicon substrate silicon chip of N-epitaxy technique, formed the silicon dioxide oxide layer, thickness 1 ± 0.1 μ m;
(3) penetrating region 7 of photoetching NPN pipe;
(4) phosphorus penetrates diffusion, junction depth 2 ± 0.3 μ m, and R=15 ± 5 Ω obtains penetrating region 7, as shown in Figure 4;
(5) the transistorized isolated area 8 of photoetching;
(6) boron isolation diffusion, junction depth 8 ± 0.5 μ m, R=8 ± 3 Ω obtains isolated area 8, as shown in Figure 4;
(7) remove all oxide layers; Oxidation once more, thickness 0.6 ± 0.05 μ m;
(8) collector region 11 of the contact zone 10 of the base 9 of photoetching NPN pipe, sensor sensing resistance, lateral PNP pipe and emitter region 12;
(9) boryl district diffusion, junction depth 2 ± 0.3 μ m, R=130 ± 20 Ω obtains the base 9 of NPN pipe, the contact zone 10 of sensor sensing resistance, the collector region 11 and the emitter region 12 of lateral PNP pipe, as shown in Figure 5;
(10) the clamped district 15 of the base 14 of the emitter region 13 of photoetching NPN pipe, lateral PNP pipe, piezo-resistance, mos capacitance district 16;
(11) β is transferred in phosphorous diffusion, and β=60-100 obtains the emitter region 13 of NPN pipe, the base 14 of lateral PNP pipe, the clamped district 15 and the mos capacitance district 16 of piezo-resistance, as shown in Figure 6;
(12) photo light sensor sensitive resistance district 17;
(13) band glue boron injects dosage 3E13/cm
2, energy 60keV removes photoresist;
(14) LPCVD deposit silicon dioxide, thickness 0.3 ± 0.05 μ m, as shown in Figure 7;
(15) photoetching capacitive region 16;
(16) thin oxidation, oxide layer 18 thickness 0.1 ± 0.02 μ m;
(17) two-sided deposit silicon nitride layer 19 can improve capacitance on the one hand, is used as masking layer in order to carry out later on when back side deep trouth corrodes on the other hand, and silicon nitride layer 19 thickness 0.13 ± 0.02 μ m obtains sensor sensing resistance 17, mos capacitance 16, as shown in Figure 8;
(18) lithography fair lead 20;
(19) sputter chrome-silicon film resistor is used for precision resistance, R=1000 ± 200 Ω;
(20) photoetching chrome-silicon film resistor obtains chrome-silicon resistance 21, as shown in Figure 9;
(21) sputter sial, thickness 1.2 ± 0.2 μ m;
(22) photoetching lead-in wire obtains sial lead-in wire 22, as shown in Figure 9;
(23) alloy, 440 ℃ of temperature, 30min;
(24) PECVD deposit silicon dioxide, thickness 1.2 ± 0.2 μ m, photoetching passivation hole.
3. the described silicon chip back of having made the piezo-resistance of bipolar integrated circuit and transducer being carried out burn into, to carry out the step of silex glass bonding as follows:
(1) will carry out the silicon chip 2 of integrated circuit and sensor resistance, carry out back side photoetching, make the silicon area 5 below transducer piezo-resistance zone by lithography;
(2) (applied for patent of invention with special-purpose corrosion clamp, patent name is: silicon slice corrosion single-face protection clamper, the patent No. is 2008102330392), allow the KOH corrosive liquid only corrode the silicon of the back side below the piezo-resistance zone of transducer, and positive integrated circuit and piezo-resistance can not be corroded, corrosion depth 350 ± 10 μ m, silicon groove 23, as shown in figure 10;
(3) dry etching falls the silicon nitride and the silicon dioxide at the back side;
(4) the silex glass anode linkage is carried out at the described silicon chip back side and sheet glass 24, obtain single chip integrated pressure sensor, as shown in figure 10.
Used individual event technology in the inventive method, except that done detailed description, other, be this area current techique as the burn into gluing of cleaning, oxidation, deposited silicon nitride, silicon/glass bonding, photoetching, silicon and silicon oxide layer, silicon nitride, individual event technology, equipment and the chemical materials, the reagent that remove glue etc., no longer describe in detail.
Claims (4)
1. the manufacture method of a monolithic integrated pressure sensor, it is characterized in that: this method comprises the steps:
(1) on P type silicon substrate film, makes the P type silicon substrate that bipolar analog integrated circuit and piezo-resistance are used;
(2) on the P type silicon substrate that described bipolar analog integrated circuit and piezo-resistance are used, carry out the N-epitaxy technique, on described N-epitaxial loayer, make the piezo-resistance of bipolar integrated circuit and transducer;
(3) adopt special-purpose corrosion clamp, the described silicon chip back of having made the piezo-resistance of bipolar integrated circuit and transducer is carried out burn into carry out the silex glass bonding again, realize single chip integrated pressure sensor.
2. the manufacture method of a kind of monolithic integrated pressure sensor according to claim 1, it is characterized in that: the step of the P type silicon substrate that bipolar analog integrated circuit of described making and piezo-resistance are used comprises:
(1) P type silicon substrate film is＜100〉crystal orientation, twin polishing, thickness 400 ± 10 μ m, resistivity 7-13 Ω cm, oxidation, oxidated layer thickness is 0.6 ± 0.05 μ m;
(2) photoetching N+ buried regions district;
(3) band glue arsenic injects dosage 6E15/cm
2, energy 100keV removes photoresist;
(4) photoetching P+ buried regions district;
(5) band glue boron injects dosage 1E15/cm
2, energy 60keV removes photoresist;
(6) double-sided exposure makes the zone, the back side in sensor resistance district by lithography; Dry etching silicon, corrosion depth are 1 ± 0.1 μ m;
(7) two-sided deposit silicon dioxide, its thickness are 0.5 ± 0.1 μ m;
(8) high temperature knot, 1200 ℃ of temperature, 8h removes all oxide layers, forms P+ buried regions, N+ buried regions and back panel field mark.
3. the manufacture method of a kind of monolithic integrated pressure sensor according to claim 1 is characterized in that: the step of making the piezo-resistance of bipolar integrated circuit and transducer on described N-epitaxial loayer comprises:
(1) carries out the N-epitaxy technique with described P type silicon substrate material, epitaxy layer thickness 8 ± 1 μ m, resistivity 2 ± 0.3 Ω cm;
(2) oxidation is carried out on described surface of having carried out the P type silicon substrate silicon chip of N-epitaxy technique, formed the silicon dioxide oxide layer, thickness is 1 ± 0.1 μ m;
(3) penetrating region of photoetching NPN pipe;
(4) phosphorus penetrates diffusion, junction depth 2 ± 0.3 μ m, and R=15 ± 5 Ω forms penetrating region;
(5) the transistorized isolated area of photoetching;
(6) boron isolation diffusion, junction depth 8 ± 0.5 μ m, R=8 ± 3 Ω forms isolated area 8;
(7) remove all oxide layers, oxidation once more, thickness 0.6 ± 0.05 μ m;
(8) collector region-emitter region of the contact zone of the base of photoetching NPN pipe, sensor sensing resistance and lateral PNP pipe;
(9) boryl district diffusion, junction depth 2 ± 0.3 μ m, R=130 ± 20 Ω forms the base of NPN pipe, the contact zone of sensor sensing resistance, the collector region and the emitter region of lateral PNP pipe;
(10) the clamped district of the base of the emitter region of photoetching NPN pipe and lateral PNP pipe, piezo-resistance, mos capacitance district;
(11) β is transferred in phosphorous diffusion, and β=60-100 forms the emitter region of NPN pipe, the base of lateral PNP pipe, the clamped district and the mos capacitance district of piezo-resistance;
(12) photo light sensor sensitive resistance district;
(13) band glue boron injects dosage 3E13/cm
2, energy 60keV removes photoresist;
(14) LPCVD deposit silicon dioxide, thickness are 0.3 ± 0.05 μ m;
(15) photoetching capacitive region;
(16) thin oxidation, thickness is 0.1 ± 0.02 μ m;
(17) two-sided deposit silicon nitride, two-sided silicon nitride thickness are 0.13 ± 0.02 μ m, form sensor sensing resistance, mos capacitance;
(18) lithography fair lead;
(19) sputter chrome-silicon film resistor, R=1000 ± 200 Ω;
(20) photoetching chrome-silicon film resistor;
(21) sputtered silicon aluminium lamination, sial thickness 1.2 ± 0.2 μ m;
(22) photoetching lead-in wire forms the sial lead-in wire;
(23) alloy, 440 ℃ of temperature, 30min;
(24) PECVD deposit silicon dioxide, thickness 1.2 ± 0.2 μ m, photoetching passivation hole.
4. the manufacture method of a kind of monolithic integrated pressure sensor according to claim 1 is characterized in that: the described silicon chip back of having made the piezo-resistance of bipolar integrated circuit and transducer is carried out the step that burn into carries out the silex glass bonding again comprise:
(1) will carry out the silicon chip of integrated circuit and sensor resistance, carry out back side photoetching, make the silicon area of its back side below transducer piezo-resistance zone by lithography;
(2) (applied for patent of invention with special-purpose corrosion clamp, patent name is: silicon slice corrosion single-face protection clamper, the patent No. is 2008102330392), allow the KOH corrosive liquid only corrode the silicon of the back side below the piezo-resistance zone of transducer, and positive integrated circuit and piezo-resistance can not be corroded corrosion depth 350 ± 10 μ m;
(3) dry etching falls the silicon nitride and the silicon dioxide at the back side;
(4) described silicon chip back and sheet glass are carried out the silex glass anode linkage.
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Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102086019A (en) * | 2010-11-02 | 2011-06-08 | 中国电子科技集团公司第二十四研究所 | Method for manufacturing monolithic polysilicon cantilever structure |
| CN102818662A (en) * | 2012-08-30 | 2012-12-12 | 无锡永阳电子科技有限公司 | Pressure chip of silicon sensor and self-stop etching process for pressure chip |
| CN103872050A (en) * | 2012-12-07 | 2014-06-18 | 三菱电机株式会社 | Semiconductor pressure sensor and fabrication method thereof |
| CN108645559A (en) * | 2018-04-13 | 2018-10-12 | 北京协同创新研究院 | A kind of Monolithic integrated MEMS pressure sensor and preparation method thereof |
| CN110823422A (en) * | 2019-12-16 | 2020-02-21 | 沈阳仪表科学研究院有限公司 | PN junction piezoresistive diffused silicon pressure sensor and manufacturing method thereof |
| WO2021185004A1 (en) * | 2020-03-19 | 2021-09-23 | 深圳纽迪瑞科技开发有限公司 | Pressure sensing apparatus and pressure sensing device |
| CN113496912A (en) * | 2020-04-02 | 2021-10-12 | 长鑫存储技术有限公司 | Monitoring wafer and monitoring system |
| CN114812878A (en) * | 2022-04-07 | 2022-07-29 | 中北大学 | High-sensitivity piezoresistive sensitive unit and manufacturing method thereof |
| CN116062677A (en) * | 2023-03-21 | 2023-05-05 | 无锡胜脉电子有限公司 | Anti-interference MEMS pressure sensor chip and preparation method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102086019A (en) * | 2010-11-02 | 2011-06-08 | 中国电子科技集团公司第二十四研究所 | Method for manufacturing monolithic polysilicon cantilever structure |
| CN102086019B (en) * | 2010-11-02 | 2013-04-17 | 中国电子科技集团公司第二十四研究所 | Method for manufacturing monolithic polysilicon cantilever structure |
| CN102818662A (en) * | 2012-08-30 | 2012-12-12 | 无锡永阳电子科技有限公司 | Pressure chip of silicon sensor and self-stop etching process for pressure chip |
| CN103872050A (en) * | 2012-12-07 | 2014-06-18 | 三菱电机株式会社 | Semiconductor pressure sensor and fabrication method thereof |
| CN103872050B (en) * | 2012-12-07 | 2017-01-04 | 三菱电机株式会社 | Semiconductor pressure sensor and manufacture method thereof |
| CN108645559A (en) * | 2018-04-13 | 2018-10-12 | 北京协同创新研究院 | A kind of Monolithic integrated MEMS pressure sensor and preparation method thereof |
| CN110823422A (en) * | 2019-12-16 | 2020-02-21 | 沈阳仪表科学研究院有限公司 | PN junction piezoresistive diffused silicon pressure sensor and manufacturing method thereof |
| WO2021185004A1 (en) * | 2020-03-19 | 2021-09-23 | 深圳纽迪瑞科技开发有限公司 | Pressure sensing apparatus and pressure sensing device |
| CN115210892A (en) * | 2020-03-19 | 2022-10-18 | 深圳纽迪瑞科技开发有限公司 | Pressure sensing device and pressure sensing equipment |
| CN113496912A (en) * | 2020-04-02 | 2021-10-12 | 长鑫存储技术有限公司 | Monitoring wafer and monitoring system |
| CN113496912B (en) * | 2020-04-02 | 2023-10-17 | 长鑫存储技术有限公司 | Monitoring wafer and monitoring system |
| CN114812878A (en) * | 2022-04-07 | 2022-07-29 | 中北大学 | High-sensitivity piezoresistive sensitive unit and manufacturing method thereof |
| CN116062677A (en) * | 2023-03-21 | 2023-05-05 | 无锡胜脉电子有限公司 | Anti-interference MEMS pressure sensor chip and preparation method thereof |
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