CN100563041C - A kind of device unit construction of Memister and manufacture method - Google Patents
A kind of device unit construction of Memister and manufacture method Download PDFInfo
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- CN100563041C CN100563041C CNB2007100408294A CN200710040829A CN100563041C CN 100563041 C CN100563041 C CN 100563041C CN B2007100408294 A CNB2007100408294 A CN B2007100408294A CN 200710040829 A CN200710040829 A CN 200710040829A CN 100563041 C CN100563041 C CN 100563041C
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- layer
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- storage medium
- memister
- hearth electrode
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- 238000000034 method Methods 0.000 title claims abstract description 31
- 238000010276 construction Methods 0.000 title claims abstract description 22
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 10
- 238000003860 storage Methods 0.000 claims abstract description 31
- 239000002184 metal Substances 0.000 claims abstract description 23
- 229910052751 metal Inorganic materials 0.000 claims abstract description 23
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical group [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims abstract description 17
- 238000002161 passivation Methods 0.000 claims abstract description 13
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 239000007787 solid Substances 0.000 claims abstract description 12
- 230000004888 barrier function Effects 0.000 claims abstract description 3
- 239000000463 material Substances 0.000 claims description 20
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 7
- 238000005530 etching Methods 0.000 claims description 7
- 238000001755 magnetron sputter deposition Methods 0.000 claims description 6
- 230000000694 effects Effects 0.000 claims description 5
- 229910010413 TiO 2 Inorganic materials 0.000 claims description 4
- 229910052782 aluminium Inorganic materials 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- 229910052697 platinum Inorganic materials 0.000 claims description 4
- 229910052709 silver Inorganic materials 0.000 claims description 4
- 229910052721 tungsten Inorganic materials 0.000 claims description 4
- 238000000151 deposition Methods 0.000 claims description 3
- 238000001312 dry etching Methods 0.000 claims description 2
- 238000011049 filling Methods 0.000 claims description 2
- 229910052737 gold Inorganic materials 0.000 claims description 2
- 229910052741 iridium Inorganic materials 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 229910052759 nickel Inorganic materials 0.000 claims description 2
- 229910052707 ruthenium Inorganic materials 0.000 claims description 2
- 238000001039 wet etching Methods 0.000 claims description 2
- 239000012528 membrane Substances 0.000 claims 1
- 239000010408 film Substances 0.000 abstract description 20
- 239000010409 thin film Substances 0.000 abstract description 2
- 238000005516 engineering process Methods 0.000 description 11
- 229910044991 metal oxide Inorganic materials 0.000 description 6
- 150000004706 metal oxides Chemical class 0.000 description 6
- 238000001259 photo etching Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000001020 plasma etching Methods 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- 239000007772 electrode material Substances 0.000 description 3
- 238000010894 electron beam technology Methods 0.000 description 3
- 238000001704 evaporation Methods 0.000 description 3
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 3
- 238000002360 preparation method Methods 0.000 description 3
- NBIIXXVUZAFLBC-UHFFFAOYSA-N Phosphoric acid Chemical compound OP(O)(O)=O NBIIXXVUZAFLBC-UHFFFAOYSA-N 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 239000003989 dielectric material Substances 0.000 description 2
- 238000005566 electron beam evaporation Methods 0.000 description 2
- 239000007769 metal material Substances 0.000 description 2
- 238000002207 thermal evaporation Methods 0.000 description 2
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910000147 aluminium phosphate Inorganic materials 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000000295 complement effect Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 238000007521 mechanical polishing technique Methods 0.000 description 1
- 238000004377 microelectronic Methods 0.000 description 1
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 1
- 229910052763 palladium Inorganic materials 0.000 description 1
- 238000005498 polishing Methods 0.000 description 1
- 239000010970 precious metal Substances 0.000 description 1
- 238000004549 pulsed laser deposition Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
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Abstract
The present invention relates to a kind of device unit construction and manufacture method of Memister, it is characterized in that described device unit construction is by top electrode, storage medium layer, hearth electrode contact, hearth electrode, dielectric film, metal conducting layer and substrate are formed, and wherein: the hearth electrode contact that 1. is produced on the dielectric film is to adopt hollow or solid tubular structure; 2. there is TiN thin film passivation layer to do the barrier layer between hearth electrode contact and storage medium; 3. top electrode links to each other with storage medium by the top electrode fairlead on the passivation layer; 4. hearth electrode links to each other by metal conducting layer with the bottom of adopting hearth electrode hollow or solid tubulose to contact; 5. metallic conduction is deposited upon on the substrate.The present invention is directed to the current situation of present RRAM,, improve reliable Memister device unit construction to reduce the long-pending power consumption that reduces of electrode contact surface.
Description
Technical field
The present invention relates to a kind of device unit construction and manufacture method that is used for Memister.Belong to material and devices field in the microelectronics.
Background technology
Current, it is low that exploitation has a cost, and speed is fast, and the storage density height is made simple and is subjected to worldwide extensive concern with the good novel memory technology of current CMOS (complementary metal-oxide-semiconductor) ic process compatibility.Memory techniques based on the resistive random access memory (RRAM) of the metal oxide with resistance switch characteristic is the emphasis that at present how tame device manufacturer is developed, because this technology can provide more high density, non-volatile Nonvolatile memory more low-cost and more low power consumption.In addition, RRAM has performances such as anti-irradiation, high-low temperature resistant, against violent vibration are moving, anti-electronic jamming, in national defence and aerospace field important application prospects is arranged.As with many other new technologies, the potential flash memory that replace in future of RRAM.The memory cell of RRAM resistance value after applying pulse voltage can produce great changes, and this resistance value still can be kept down behind deenergization.Can also reach cell size that is equivalent to NAND type flash memory and the high speed performance that is equivalent to SRAM when realizing many-valuedization.Therefore in recent years, a lot of in the world electronics and semiconductor company all is ready to cast a large amount of financial resources and manpower is being devoted to the development of RRAM.There are Sharp, Sony, Samsung Electronics, LSI Logic, Matsushita Electric Industrial, Winbond Electronics etc. in the company that is being engaged at present exploitation RRAM technology.The semiconductor manufacturing facility supplier Tegal that has tame general headquarters to be located at California Petaluma in addition specially provides relevant RRAM equipment.Sharp and University of Shizuoka cooperate, and have developed the raw product of a high speed RRAM, and test result shows that this internal memory can allow the read-write of data carry out with thousand times of speed to the NAND internal memory.
At the present situation of present RRAM fast development, long-pending in order to reduce electrode contact surface, reduce power consumption, improve reliability etc., the present invention intends proposing a kind of device unit construction and manufacture method of the Memister based on the resistance switch characteristic.
Summary of the invention
As mentioned above, the objective of the invention is to propose device unit construction and the manufacture method of a kind of RRAM of being used for.Described device unit construction is made up of top electrode, storage medium, hearth electrode contact (BEC), hearth electrode, substrate, dielectric, passivation layer etc., and the hearth electrode contact that wherein is produced on the dielectric film is to adopt hollow or solid tubular structure; There is the conductive film passivation layer to do the barrier layer between electrode contact and storage medium; Top electrode links to each other with storage medium by the top electrode fairlead on the passivation layer; Hearth electrode links to each other by metal conducting layer with the bottom of adopting hearth electrode hollow or solid tubes to contact; Metallic conduction is deposited upon on the substrate.
Main technique step of the present invention is as follows:
A) utilize high vacuum magnetically controlled sputter method depositing metal conductive layer on substrate, deposit one deck insulating medium layer again on metal conducting layer, described insulating medium layer is grown by in-situ sputtering, and thickness is that 200nm-500nm is thick, and described insulating medium layer is SiO
2, SiN
x, Al
2O
3Or ZrO
2In any one;
B) on above-mentioned dielectric layer, utilize electron beam exposure and reactive ion etching technology or current sub-micron CMOS prepared nano aperture, hole be shaped as hollow tubular or solid tubulose, hole diameter is 50nm-500nm, hole passes insulating medium layer, the hole bottom links to each other with metal conducting layer
C) utilize the sidewall of the aperture that magnetron sputtering or physical gas-phase deposite method prepare in step (b) to fill metal W or TiN;
D) after the hole sidewall is filled W or TiN, adopt chemico-mechanical polishing (CMP) technology, W or TiN that aperture is outer remove, and obtain hollow edged electrode, form the hearth electrode contact;
E) storage medium that deposit has the resistance switch effect on above-mentioned hollow edged electrode is by peeling off or lithographic method formation Memister storage medium unit;
F) deposit passivation layer on the storage medium unit is by peeling off or the method for etching forms the top electrode fairlead;
G) deposit metal electrodes material forms top electrode and hearth electrode by dry etching or wet etching method.
The material of described hearth electrode contact (BEC) is unrestricted, can or have material TaN, TiN, the IrO of certain conductive capability with metal material such as W, Pt, Al, Cu, Ni, Co, Mo, Au, Ru, Ir, Ag, Pd
2, RuO
2Deng.
The preparation method of described hearth electrode contact (BEC) is unrestricted, can have the good preparation method of the hole ability of filling for CVD, ald (ALD), magnetron sputtering, PLD, electron beam evaporation, thermal evaporation etc.
The kind of described storage medium is unrestricted, and the material component of storage medium is unrestricted, and for any resistance has the material of switching effect, the also material that promptly can switch between high-impedance state and low resistance state under outer field action is as TiO
2, NiO, ZrO
2, HfO
2, CeO
2, RuO
x, CuO
x, SrZrO
3Or (Pr, Ca) MnO
3Deng.And the version of storage medium is unrestricted, can be individual layer, two-layer or two-layer above multi-layer film structure.
Described backing material is unrestricted, can be semi-conducting materials such as the monocrystalline silicon piece of using always, or Ge, InP and GaAs, also can be quartz glass, dielectric material or metal materials such as ceramic substrate.
Described top electrode and hearth electrode are unrestricted, can be precious metal materials such as Pt, Au, Ag, also can be conductor materials commonly used such as Al, Cu, W, Mo, and its thickness is 200-500nm.
The material of described passivation layer diaphragm is SiO commonly used
2, SiN
x, Al
2O
3, ZrO
2, HfO
2And Ta
2O
5Deng material, thickness 50nm-400nm.
Described hearth electrode can obtain with methods such as micro-nano process technology such as electron beam exposure and reactive ion etching or current sub-micron CMOS standard technologies, and diameter is generally 50nm-500nm.
Described lithographic method is to prepare resistance material and upper electrode material on the substrate of hollow edged electrode in succession having, utilize reactive ion etching or other lithographic method to remove hollow edged electrode upper electrode material and resistance material in addition then, form the Memister device cell.
One of feature of the present invention is that the solid or hollow tubulose BEC of employing reduces the contact area between electrode and the storage medium, reduces power consumption;
Another feature of the present invention is to adopt the class such as TiN to have the material of certain resistivity and conductive capability as stopping (buffer) layer, diffusion and reaction between minimizing storage medium and the electrode, raising reliability;
In sum, the invention provides a kind of low-power consumption, highly reliable Memister device unit construction and preparation method thereof.
Description of drawings
Growth layer of metal conductive layer on Fig. 1 substrate
Fig. 2 is deposit one deck insulating medium layer on metal conducting layer
Fig. 3 prepares the tubulose hole and form the hollow tubular electrode behind hole sidewall filled conductive material in dielectric layer, contact as hearth electrode
Fig. 4 is deposit storage medium film and etching or lift off (peeling off) formation storage medium unit on hollow edged electrode
Fig. 5 deposit one deck passivation layer diaphragm and prepare the top electrode fairlead on storage medium
Fig. 6 deposition of electrode material film, and make upper and lower electrode
The Memister device cell of the solid hollow edged electrode of Fig. 7
Among the figure: 1. substrate; 2. metal conducting layer; 3. insulating medium layer; 4. hollow or solid tubulose hearth electrode contact; 5. hearth electrode fairlead; 6. storage medium; 7. passivation layer diaphragm; 8. top electrode fairlead; 9. top electrode; 10. hearth electrode
Embodiment
Below by specific embodiment, further illustrate substantive distinguishing features of the present invention and obvious improvement, but the present invention only is confined to described embodiment by no means.
Embodiment 1:
(1) the thick SiO of heat growth 100nm on Si substrate 1
2Or utilize PECVD (plasma enhanced chemical vapor deposition) to prepare the thick SiN of 100nm
xDeielectric-coating is then at SiO
2Or SiN
xOn utilize the method for magnetron sputtering or evaporation to prepare the thick Al film of one deck 80nm metal conducting layer 2; (Fig. 1)
(2) utilize PECVD or sputtering method on metal conducting layer Al film 2, to prepare the thick SiO of 300nm-500nm
2Insulating medium layer 3; (Fig. 2)
(3) at insulating medium layer SiO
2On utilize electron beam exposure and reactive ion etching technology to prepare hole, hole bottom links to each other with metal conducting layer, the diameter of hole is in the 200nm-500nm scope; Utilize CVD or sputtering technology to fill the W material then at the hole sidewall; Utilize chemical Mechanical Polishing Technique (CMP) to throw at last and remove the W material of hole, obtain hollow tubular electrode 4, form hearth electrode contact (Fig. 3) with exterior domain;
(4) utilize magnetron sputtering, CVD or method of evaporating to prepare TiN or TiO successively
2 Film 6 forms TiO in the photoetching of hollow edged electrode upper area, etching then
2/ TiN cell block; Film thickness 20-200nm, base vacuum are 3 * 10
-6Torr, power 100-500W; (Fig. 4)
(5) utilize CVD, magnetron sputtering or method of evaporating to prepare SiO
2Film, photoetching then, etching form top electrode fairlead 8; Film thickness 20-500nm, base vacuum are 3 * 10
-6Torr, power 50-200W; (Fig. 5) form hearth electrode fairlead 5 with photoetching, lithographic method at the dielectric other end,
(6) utilize electron beam evaporation or thermal evaporation method, sputtering method deposit Al film, and photoetching, water-bath phosphoric acid corrosion formation top electrode 9 and hearth electrode 10.(Fig. 6)
Embodiment 2: the hollow tubular electrode in the 3rd step of embodiment 1 is filled up SiO
2Or SiN
xDeng dielectric material, and then carry out CMP, thereby obtain solid hollow edged electrode.Other can obtain better result like this with embodiment 1, and reliability is further enhanced.(Fig. 7)
Embodiment 3: with the TiO among the embodiment 1
2The binary metal oxide film changes ternary metal oxide film SrZrO into
3, (Pr, Ca) MnO
3Deng, form the multilayer film cell block of ternary metal oxide film and TiN formation then in the photoetching of hollow edged electrode upper area, etching, as storage medium.Other is similar to Example 1, also can realize similar effects.
Embodiment 4: with the TiO among the embodiment 1
2The binary metal oxide film changes binary, ternary metal oxide stacks of thin films structure into, as SrZrO
3/ TiO
2/ TiN forms SrZrO in the photoetching of hollow edged electrode upper area, etching then
3/ TiO
2/ TiN multilayer film cell block is as storage medium.Other is similar to Example 1.
Claims (10)
1, a kind of device unit construction of Memister is characterized in that described device unit construction is made up of top electrode, storage medium layer, hearth electrode contact, hearth electrode, dielectric film, metal conducting layer and substrate, wherein:
1. the hearth electrode contact that is produced on the dielectric film is to adopt hollow or solid tubular structure;
2. the TiN film in the storage medium plays passivation as the TiO in hearth electrode contact and the storage medium
2Barrier layer between the film;
3. top electrode links to each other with storage medium by the top electrode fairlead on the passivation layer with fairlead;
4. hearth electrode links to each other by metal conducting layer with the bottom of adopting hearth electrode hollow or solid tubulose to contact;
5. metallic conduction is deposited upon on the substrate.
2,, it is characterized in that filling metal W or TiN in the hearth electrode contact in tubular construction by the device unit construction of the described Memister of claim 1.
3,, it is characterized in that the material of described storage medium under outer field action, having the resistance switch effect by the device unit construction of the described Memister of claim 1.
4, by the device unit construction of the described Memister of claim 3, it is characterized in that described storage medium is TiO
2, NiO, ZrO
2, HfO
2, CeO
2, RuO
x, CuO
xOr SrZrO
3
5,, it is characterized in that described storage medium is two-layer or two-layer above membrane structure by the device unit construction of claim 1,3 or 4 described Memisters.
6, by the device unit construction of the described Memister of claim 1, it is characterized in that described passivation layer as the barrier layer is SiO
2, SiN
xOr Al
2O
3, ZrO
2, HfO
2And Ta
2O
5, its thickness 50nm-400nm.
7,, it is characterized in that the material conducting metal of described hearth electrode contact is a kind of among W, Pt, Al, Cu, Ni, Co, Mo, Au, Ru, Ir, Ag or the Pd by the device unit construction of the described Memister of claim 1; Or be TaN, TiN, IrO
2, RuO
2In a kind of.
8, a kind of method of making the device unit construction of Memister is characterized in that:
(a) utilize high vacuum magnetically controlled sputter method depositing metal conductive layer on substrate, deposit one deck insulating medium layer again on metal conducting layer, the dielectric layer thickness is 200nm-500nm;
(b) on the insulating medium layer that step (a) is made, make nano aperture, hole be shaped as hollow tubular or solid tubulose, hole diameter is 50nm-500nm, hole passes insulating medium layer, the hole bottom links to each other with metal conducting layer,
(c) utilize magnetron sputtering or physical gas-phase deposite method in the aperture that step (b) is made, to fill metal W or TiN;
(d) after the sidewall of the described hole of step (c) is filled W or TiN, adopt cmp method, W or TiN that aperture is outer remove, and obtain hollow edged electrode, form the hearth electrode contact;
(e) deposit has the storage medium of switching effect on the hollow edged electrode that step (d) is made, by peeling off or lithographic method forms Memister storage medium unit;
(f) deposit has the passivation layer of fairlead on the storage medium unit that step (e) is made, by peeling off or the method for etching forms the top electrode fairlead;
(g) deposit metal electrodes material forms top electrode and hearth electrode by dry etching or wet etching method.
9, press the manufacture method of the device unit construction of the described Memister of claim 8, it is characterized in that described insulating medium layer is SiO
2, SiN
x, Al
2O
3Or ZrO
2
10, press the manufacture method of the device unit construction of the described Memister of claim 8, it is characterized in that top electrode and hearth electrode are Pt, Au, Ag, Al, Cu, W or Mo, thickness is 200-500nm.
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|---|---|---|---|
| CNB2007100408294A CN100563041C (en) | 2007-05-18 | 2007-05-18 | A kind of device unit construction of Memister and manufacture method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CNB2007100408294A CN100563041C (en) | 2007-05-18 | 2007-05-18 | A kind of device unit construction of Memister and manufacture method |
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| Publication Number | Publication Date |
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| CN100563041C true CN100563041C (en) | 2009-11-25 |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094472A (en) * | 2011-11-01 | 2013-05-08 | 无锡华润上华科技有限公司 | Manufacturing method of resistor type random access memory unit |
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| US8143092B2 (en) * | 2008-03-10 | 2012-03-27 | Pragati Kumar | Methods for forming resistive switching memory elements by heating deposited layers |
| CN101572292B (en) * | 2009-06-12 | 2010-10-27 | 中国科学院上海微系统与信息技术研究所 | Storage unit and method capable of realizing multi-mode storage through the integration of phase change and resistance change |
| CN102034927B (en) * | 2009-09-25 | 2012-11-28 | 中芯国际集成电路制造(上海)有限公司 | Impedance memorizer and manufacture method thereof |
| US9105704B2 (en) | 2012-12-20 | 2015-08-11 | Intermolecular, Inc. | Method of depositing films with narrow-band conductive properties |
| US9876167B2 (en) | 2014-04-02 | 2018-01-23 | Taiwan Semiconductor Manufacturing Co., Ltd. | High yield RRAM cell with optimized film scheme |
| US9577191B2 (en) * | 2014-04-02 | 2017-02-21 | Taiwan Semiconductor Manufacturing Co., Ltd. | RRAM cell bottom electrode formation |
| US9209392B1 (en) * | 2014-10-14 | 2015-12-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | RRAM cell with bottom electrode |
| CN104659208A (en) * | 2015-02-05 | 2015-05-27 | 中国科学院微电子研究所 | Non-volatile resistive random access memory device and preparation method thereof |
| US9431603B1 (en) * | 2015-05-15 | 2016-08-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | RRAM device |
| CN110911560B (en) * | 2019-11-29 | 2021-10-08 | 华中科技大学 | Planar memristor and preparation method thereof |
| CN113097382B (en) * | 2020-01-08 | 2023-04-18 | 芯恩（青岛）集成电路有限公司 | Method for manufacturing RRAM cell and RRAM cell |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030157798A1 (en) * | 2002-02-20 | 2003-08-21 | Zvonimir Gabric | Method for fabricating a component, and component having a metal layer and an insulation layer |
| US20040053465A1 (en) * | 2002-09-17 | 2004-03-18 | Suk-Kyoung Hong | Semiconductor device having diffusion barrier layer containing chrome and method for fabricating the same |
| CN1885542A (en) * | 2005-06-20 | 2006-12-27 | 三星电子株式会社 | Phase change memory cells having a cell diode and a bottom electrode self-aligned with each other and methods of fabricating the same |
| CN1893104A (en) * | 2005-07-08 | 2007-01-10 | 三星电子株式会社 | Phase change memory device and method of fabricating the same |
| CN1933207A (en) * | 2006-10-13 | 2007-03-21 | 中国科学院上海微系统与信息技术研究所 | Phase transformation memory storing unit and producing method thereof |
-
2007
- 2007-05-18 CN CNB2007100408294A patent/CN100563041C/en not_active Expired - Fee Related
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20030157798A1 (en) * | 2002-02-20 | 2003-08-21 | Zvonimir Gabric | Method for fabricating a component, and component having a metal layer and an insulation layer |
| US20040053465A1 (en) * | 2002-09-17 | 2004-03-18 | Suk-Kyoung Hong | Semiconductor device having diffusion barrier layer containing chrome and method for fabricating the same |
| CN1885542A (en) * | 2005-06-20 | 2006-12-27 | 三星电子株式会社 | Phase change memory cells having a cell diode and a bottom electrode self-aligned with each other and methods of fabricating the same |
| CN1893104A (en) * | 2005-07-08 | 2007-01-10 | 三星电子株式会社 | Phase change memory device and method of fabricating the same |
| CN1933207A (en) * | 2006-10-13 | 2007-03-21 | 中国科学院上海微系统与信息技术研究所 | Phase transformation memory storing unit and producing method thereof |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103094472A (en) * | 2011-11-01 | 2013-05-08 | 无锡华润上华科技有限公司 | Manufacturing method of resistor type random access memory unit |
| WO2013064021A1 (en) * | 2011-11-01 | 2013-05-10 | 无锡华润上华科技有限公司 | Method for manufacturing resistive random access storage unit |
| CN103094472B (en) * | 2011-11-01 | 2015-03-11 | 无锡华润上华科技有限公司 | Manufacturing method of resistor type random access memory unit |
| US9153781B2 (en) | 2011-11-01 | 2015-10-06 | Csmc Technologies Fab2 Co., Ltd. | Method for manufacturing resistive random access storage unit |
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| CN101071843A (en) | 2007-11-14 |
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