emrealci / FPGA-Verilog Star 10 Code Issues Pull requests Practices related to the fundamental level of the programming language Verilog. fpga verilog hardware-designs hdl multiplexer comparator xilinx-fpga verilog-components latch verilog-project frequency-divider sr-latch Updated Jan 16, 2023 Verilog
adithi-su / fractional-phase-locked-loop Star 1 Code Issues Pull requests dsm pll vco charge-pump frequency-divider fractional-pll Updated Apr 19, 2023 Verilog