Stars
Reference implementations of MLPerf™ training benchmarks
Simple Python Module to access PCIe Endpoint BARs
Command line tool to Read/Write to PCIe BARx memory space
Bringup-Bench is a collection of standalone minimal library and system dependence benchmarks useful for bringing up newly designed CPUs, accelerators, compilers and operating systems. You probably …
vedic is the world's first working Sanskrit programming language
The smallest public printf implementation for its feature set.
A list of tutorials, paper, talks, and open-source projects for emerging compiler and architecture
It contains a curated list of awesome RISC-V Resources.
Advanced Interface Bus (AIB) die-to-die hardware open source
Chemical kinetics, thermodynamics, and transport tool suite
EnergyPlus™ is a whole building energy simulation program that engineers, architects, and researchers use to model both energy consumption and water use in buildings.
PCIe (1.0a to 2.0) Virtual host model for verilog
You like pytorch? You like micrograd? You love tinygrad! ❤️
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
List of awesome semiconductor startups
Thermal Engineering Systems in Python (TESPy). This package provides a powerful simulation toolkit for thermal engineering plants such as power plants, district heating systems or heat pumps.
Data on CO2 and greenhouse gas emissions by Our World in Data
Open-source high-performance RISC-V processor
Open source FPGA-based NIC and platform for in-network compute
Open ROS Components for Robots from Fetch Robotics
FireSim: Fast and Effortless FPGA-accelerated Hardware Simulation with On-Prem and Cloud Flexibility
[HISTORICAL] FIPS and higher-level algorithm tests for RISC-V Crypto Extension
OpenSource GPU, in Verilog, loosely based on RISC-V ISA