TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN deactivated

See #417 (comment)

docs/TriceUserGuide.md

@@ -1204,7 +1204,7 @@ _## 12. <a name='TriceUserInterface-QuickStart'></a> Trice User Interface - Qui
 - To interpret a decoded package, it´s endianness needs to be known.
 - For efficiency binary trice data are stored and transmitted in MCU endianness and the **trice** tool expects binary data in little endian format as most MCUs are little endian.
 - On big endian MCUs the compiler switch `TRICE_MCU_IS_BIG_ENDIAN` needs to be defined and the **trice** tool has a CLI switch "triceEndianness" which needs to be set to "bigEndian" then.
-- If trice transmit data are needed to be not in MCU order for some reason, the macro `TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN` is needed. This increases the critical trice storage time and target code amount.
+- If trice transmit data are needed to be not in MCU order for some reason, the macro `TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN` is needed. This increases the critical trice storage time and target code amount. The implementation is not completed yet.
 
 <p align="right">(<a href="#top">back to top</a>)</p>
 
@@ -1268,12 +1268,21 @@ It is up to the user to provide the functions `TriceStamp16()` and/or `TriceStam
 - In decoded frames >= 4-byte the first 2 bytes are the 14-bit ID with 2 selector bits at the most significant position.
 - The `0` selector is usable for any user encoding. The **trice** tool ignores such packages.
 
- | 16-bit groups | Selector (2 msb)| Comment |
- | :- | :-: | - |
- | `00xxxxxxX ...` | 0 | >= 4-byte message, reserved for extensions or user data |
- | `01iiiiiiI NC ...` | 1 | >= 4-byte message, *Trice* format without stamp |
- | `10iiiiiiI TT NC ...` | 2 | >= 4-byte message, *Trice* format with 16-bit stamp |
- | `11iiiiiiI TT TT NC ...` | 3 | >= 4-byte message, *Trice* format with 32-bit stamp |
+ | 16-bit groups | Selector (2 msb)|Comment | Endianness sizes |
+ | :- | :-: |- | :- |
+ | `00xxxxxxX ...` | 0 |>= 4-byte message, reserved for extensions or user data | `u16 ?...?` |
+ | `01iiiiiiI NC ...` | 1 |>= 4-byte message, *Trice* format without stamp | `u16 u16 [uX] ... [uX]` |
+ | `10iiiiiiI TT NC ...` | 2 |>= 4-byte message, *Trice* format with 16-bit stamp | `u16 u16 u16 [uX] ... [uX]` |
+ | `11iiiiiiI TT TT NC ...` | 3 |>= 4-byte message, *Trice* format with 32-bit stamp | `u16 u32 u16 [uX] ... [uX]` |
+
+- When the receiving tool has to convert the endianness it needs some rules:
+ - convert u16=`ssiiiiii iiiiiiii` or u16=`ssxxxxxx xxxxxxxx` and split into selector and ID
+ - check the 2 selector bits:
+ - 0: reserved
+ - 1: convert u16=NC
+ - 2: convert u16=stamp16 & u16=NC
+ - 3: convert u32=stamp32 & u16=NC
+ - use ID to get param width X=8,16,32,64 and count and convert appropriate.
 
 <p align="right">(<a href="#top">back to top</a>)</p>
 

src/trice.c

@@ -288,15 +288,15 @@ static void triceSeggerRTTDiagnostics( void ){
 
 void TriceLogSeggerDiagnostics( void ){
  if( (RTT0_writeSpaceMin < 8) ){ // && (RTT0_bytesInBufferMax < BUFFER_SIZE_UP - 4) ){
- trice( iD( 1091), "ERROR:RTT0_writeSpaceMin=%u, ", RTT0_writeSpaceMin );
+ trice( iD( 3472), "ERROR:RTT0_writeSpaceMin=%u, ", RTT0_writeSpaceMin );
  }else{
  trice( iD( 6598), "diag:RTT0_writeSpaceMin=%u, ", RTT0_writeSpaceMin );
  }
 }
 
 #endif // #if (TRICE_DIAGNOSTICS ==1) && defined(SEGGER_RTT)
 
-#if (TRICE_SEGGER_RTT_8BIT_DIRECT_WRITE == 1) || (TRICE_SEGGER_RTT_8BIT_DEFERRED_WRITE == 1)
+#if (TRICE_SEGGER_RTT_8BIT_DIRECT_WRITE == 1) || (TRICE_SEGGER_RTT_8BIT_DEFERRED_WRITE == 1) || (TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE == 1)
 
 static void TriceWriteDeviceRtt0( uint8_t const * enc, size_t encLen ){
  SEGGER_RTT_WriteNoLock(0, enc, encLen );
@@ -306,7 +306,7 @@ static void TriceWriteDeviceRtt0( uint8_t const * enc, size_t encLen ){
  #endif
 }
 
-#endif // (TRICE_SEGGER_RTT_8BIT_DIRECT_WRITE == 1) || (TRICE_SEGGER_RTT_8BIT_DEFERRED_WRITE == 1)
+#endif // (TRICE_SEGGER_RTT_8BIT_DIRECT_WRITE == 1) || (TRICE_SEGGER_RTT_8BIT_DEFERRED_WRITE == 1) || (TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE == 1)
 
 #if TRICE_SEGGER_RTT_32BIT_DIRECT_WRITE == 1
 //! SEGGER_Write_RTT0_NoCheck32 was derived from SEGGER_RTT.c version 7.60g function _WriteNoCheck for speed reasons. If using a different version please review the code first.
@@ -425,7 +425,7 @@ void TriceNonBlockingDirectWrite( uint32_t * triceStart, unsigned wordCount ){
  #if defined(TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE_MIN_ID) && defined(TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE_MAX_ID)
  if( (TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE_MIN_ID < triceID) && (triceID < TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE_MAX_ID) )
  #endif
- { SEGGER_RTT_WriteNoLock(0, enc, encLen ); }
+ { TriceWriteDeviceRtt0( enc, encLen ); }
  #endif
 
  #ifdef TRICE_CGO

src/trice.h

@@ -421,6 +421,16 @@ extern uint32_t* TriceBufferWritePosition;
 #include "trice32.h"
 #include "trice64.h"
 
+
+//! TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN can be defined on little endian MCUs if the trice data are needed in network order,
+//! or on big endian MCUs if the trice data are needed in little endian order. You should avoid using this macro because
+//! it increases the trice storage time and the needed code amount. 
+//! This is not completely implemented and needs automatic tests as well.
+//! The main to implement:
+//! - implement compiler agnostic access macros (byte swapping)
+//! - The TriceIDAndBuffer function and it relatives need to use access macros. 
+//#define TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN
+
 #ifdef TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN
 // https://codereview.stackexchange.com/questions/151049/endianness-conversion-in-c
 //#include <byteswap.h>
@@ -753,7 +763,7 @@ static inline uint64_t aDouble( double x ){
  uint32_t limit = TRICE_SINGLE_MAX_SIZE-8; /* 8 = head + max timestamp size --> todo: consider 64-bit stamp! */ \
  uint32_t len_ = n; /* n could be a constant */ \
  if( len_ > limit ){ \
- TRICE32( id( 6327), "wrn:Transmit buffer truncated from %u to %u\n", len_, limit ); \
+ TRICE32( id( 5150), "wrn:Transmit buffer truncated from %u to %u\n", len_, limit ); \
  len_ = limit; \
  } \
  TRICE_ENTER tid; \

src/triceDoubleBuffer.c

@@ -39,7 +39,7 @@ void TriceLogDiagnosticValues( void ){
  unsigned triceSingleDepthMax = TRICE_DATA_OFFSET + (triceSingleMaxWordCount<<2);
 
  if( triceSingleDepthMax <= TRICE_BUFFER_SIZE ){
- TRice16( iD( 5400), "diag:triceSingleDepthMax =%4u of%4d, ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
+ TRice16( iD( 5915), "diag:triceSingleDepthMax =%4u of%4d, ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }else{
  TRice16( iD( 5199), "err:triceSingleDepthMax =%4u of%4d (overflow!), ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }

src/triceRingBuffer.c

@@ -47,13 +47,13 @@ void TriceLogDiagnosticValues( void ){
 
  unsigned triceSingleDepthMax = TRICE_DATA_OFFSET + (triceSingleMaxWordCount<<2);
  if( triceSingleDepthMax <= TRICE_BUFFER_SIZE ){
- TRice16( iD( 2624), "diag:triceSingleDepthMax =%4u of %d, ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
+ TRice16( iD( 6931), "diag:triceSingleDepthMax =%4u of %d, ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }else{
  TRice16( iD( 3497), "err:triceSingleDepthMax =%4u of %d (overflow!), ", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }
  trice16( iD( 3284), "diag:singleTricesRingCountMax = %u, ", singleTricesRingCountMax );
  if( triceRingBufferDepthMax <= TRICE_DEFERRED_BUFFER_SIZE ){
- trice16( iD( 4508), "diag:triceRingBufferDepthMax =%4u of%5d\n", triceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE );
+ trice16( iD( 1608), "diag:triceRingBufferDepthMax =%4u of%5d\n", triceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE );
  }else{
  trice16( iD( 1087), "err:triceRingBufferDepthMax =%4u of%5d (overflow!)\n", triceRingBufferDepthMax, TRICE_DEFERRED_BUFFER_SIZE );
  }

src/triceStaticBuffer.c

@@ -26,7 +26,7 @@ void TriceLogDiagnosticValues( void ){
  if( triceSingleDepthMax <= TRICE_BUFFER_SIZE ){
  TRice16( iD( 3642), "diag:triceSingleDepthMax =%4u of %d\n", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }else{
- TRice16( iD( 6227), "err:triceSingleDepthMax =%4u of %d (overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE );
+ TRice16( iD( 2268), "err:triceSingleDepthMax =%4u of %d (overflow!)\n", triceSingleDepthMax, TRICE_BUFFER_SIZE );
  }
 }
 

test/MDK-ARM_STM32F030R8_instrumented/Core/Inc/triceConfig.h

@@ -9,7 +9,8 @@
 extern "C" {
 #endif
 
-#define TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN
+#define TRICE_DIRECT_OUTPUT_WITH_ROUTING 1
+#define TRICE_SEGGER_RTT_ROUTED_8BIT_DIRECT_WRITE 1
 
 //! TriceStamp16 returns a 16-bit value to stamp `Id` TRICE macros. Usually it is a timestamp, but could also be a destination address or a counter for example.
 //! The user has to provide this function. Defining a macro here, instead if providing `int16_t TriceStamp16( void );` has significant speed impact.
@@ -27,15 +28,15 @@ extern "C" {
 //! - TRICE_RING_BUFFER: TRICE macros write direct into a ring buffer without any additional management action.
 //! This is not the fastest execution option for TRICE macros but needs less RAM. Used for deferred output and optional additional direct output.
 //! If unsure select TRICE_DOUBLE_BUFFER. The TRICE_RING_BUFFER option works, but is experimental.
-#define TRICE_BUFFER TRICE_RING_BUFFER
+#define TRICE_BUFFER TRICE_STACK_BUFFER
 
 //! TRICE_DIRECT_OUTPUT == 0: only deferred output, usually UART output only
 //! TRICE_DIRECT_OUTPUT == 1: with direct output, usually RTT
 //! Setting TRICE_BUFFER to TRICE_STACK_BUFFER or TRICE_STATIC_BUFFER demands TRICE_DIRECT_OUTPUT == 1, no deferred output at all.
 //! When TRICE_BUFFER == TRICE_RING_BUFFER or TRICE_BUFFER == TRICE_DOUBLE_BUFFER for deferred output, additional direct output can be switched on here.
 //! For example it is possible to have direct 32-bit wise RTT TRICE_FRAMING_NONE output and deferred UART TRICE_FRAMING_COBS output.
-//! TRICE_BUFFER == TRICE_STACK_BUFFER or TRICE_BUFFER == TRICE_STATIC_BUFFER needs TRICE_DIRECT_OUTPUT == 1.
-#define TRICE_DIRECT_OUTPUT 0
+//! TRICE_BUFFER == TRICE_STACK_BUFFER or TRICE_BUFFER TRICE_STATIC_BUFFER needs TRICE_DIRECT_OUTPUT == 1.
+#define TRICE_DIRECT_OUTPUT 1
 
 //! TRICE_DATA_OFFSET is the space in front of single trice data for in-buffer (T)COBS encoding.
 //! - When using real big buffers, 16 may be not enough.
@@ -60,29 +61,24 @@ extern "C" {
 //! TRICE_MCU_IS_BIG_ENDIAN needs to be defined for TRICE64 macros on big endian MCUs.
 //#define TRICE_MCU_IS_BIG_ENDIAN 
 
-//! TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN can be defined on little endian MCUs if the trice data are needed in network order,
-//! or on big endian MCUs if the trice data are needed in little endian order. You should avoid using this macro because
-//! it increases the trice storage time and the needed code amount. 
-//#define TRICE_TRANSFER_ORDER_IS_NOT_MCU_ENDIAN
-
 //! TRICE_DIRECT_OUT_FRAMING defines the framing method of the binary trice data stream for direct output. Options: 
 //! - TRICE_FRAMING_TCOBS: Recommended for internal transfer and trice tool visualization.
 //! - TRICE_FRAMING_COBS: The trice tool needs switch `-pf COBS`. Useful with XTEA or to decode the binary trice data with a user tool.
 //! - TRICE_FRAMING_NONE: The trice tool needs switch `-pf none`. TRICE_FRAMING_NONE is needed for fast RTT (32-bit access), recommended.
 //! - With TRICE_SEGGER_RTT_32BIT_DIRECT_WRITE == 1 or TRICE_SEGGER_RTT_8BIT_WRITE_DIRECT_WITHOUT_FRAMING == 1,
 //! the RTT data arrive unframed ignoring the TRICE_DIRECT_OUT_FRAMING setting here.
-#define TRICE_DIRECT_OUT_FRAMING TRICE_FRAMING_NONE
+#define TRICE_DIRECT_OUT_FRAMING TRICE_FRAMING_TCOBS
 
 //! TRICE_DEFERRED_OUT_FRAMING defines the framing method of the binary trice data stream for deferred output. Options: 
 //! - TRICE_FRAMING_TCOBS: Recommended for UART transfer and trice tool visualization.
 //! - TRICE_FRAMING_COBS: The trice tool needs switch `-pf COBS`. Useful with XTEA or to decode the binary trice date with Python or an other language.
 //! - TRICE_FRAMING_NONE: The trice tool needs switch `-pf none`. This mode may be helpful if you write your own trice viewer without a decoder.
-#define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_COBS
+#define TRICE_DEFERRED_OUT_FRAMING TRICE_FRAMING_TCOBS
 
 //! XTEA_ENCRYPT_KEY, when defined, enables XTEA TriceEncryption with the key. (experimental)
 //! To get your private XTEA_KEY, call just once "trice log -port ... -password YourSecret -showKey".
 //! The byte sequence you see then, copy and paste it here.
-#define XTEA_ENCRYPT_KEY XTEA_KEY( ea, bb, ec, 6f, 31, 80, 4e, b9, 68, e2, fa, ea, ae, f1, 50, 54 ); //!< -password MySecret
+//#define XTEA_ENCRYPT_KEY XTEA_KEY( ea, bb, ec, 6f, 31, 80, 4e, b9, 68, e2, fa, ea, ae, f1, 50, 54 ); //!< -password MySecret
 
 //! XTEA_DECRYPT, when defined, enables device local decryption. Usable for checks or if you use a trice capable node to read XTEA encrypted messages.
 //#define XTEA_DECRYPT
@@ -94,7 +90,7 @@ extern "C" {
 //! TRICE_SEGGER_RTT_32BIT_DIRECT_WRITE == 1 speeds up RTT transfer by using function SEGGER_Write_RTT0_NoCheck32 and needs ((TRICE_DIRECT_OUTPUT == 1).
 //! - This setting results in unframed RTT trice packages and requires the `-packageFraming none` switch for the appropriate trice tool instance.
 //! This squeezes the whole TRICE macro into about 100 processor clocks leaving the data already inside the SEGGER _acUpBuffer.
-//! - If you do not wish RTT, or wish RTT with framing, simply set this value to 0. 
+//! - If you do not wish RTT, or wish RTT with framing, simply set this value to 0.
 #define TRICE_SEGGER_RTT_32BIT_DIRECT_WRITE 0
 
 //! Enable and set UARTA for deferred serial output.
@@ -107,7 +103,7 @@ extern "C" {
 
 //! This is usable as the very first trice sequence after restart. Adapt it. Use a UTF-8 capable editor like VS-Code or use pure ASCII.
 #define TRICE_HEADLINE \
- trice( iD( 2194), "\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈 𝕹𝖀𝕮𝕷𝕰𝕺-𝔽𝟘𝟛𝟘ℝ𝟠 🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n");
+ trice( iD( 4444), "\n\n ✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨✨ \n 🎈🎈🎈🎈 𝕹𝖀𝕮𝕷𝕰𝕺-𝔽𝟘𝟛𝟘ℝ𝟠 🎈🎈🎈🎈\n 🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃🍃 \n\n\n");
 
 // Compiler Adaption:
 

test/MDK-ARM_STM32F030R8_instrumented/Core/Src/main.c

@@ -105,7 +105,7 @@ int main(void)
  /* USER CODE BEGIN SysInit */
  TRice( iD( 5582), "w: Hello! 👋🙂 \a\n" ); // with sound!
  TRice( iD( 4330), "w: Hello! 👋🙂 \a\n" ); // with sound!
- Trice( iD( 3394), "w: Hello! 👋🙂 \a\n" ); // with sound!
+ Trice( iD( 2262), "w: Hello! 👋🙂 \a\n" ); // with sound!
  Trice( iD( 2446), "w: Hello! 👋🙂 \a\n" ); // with sound!
  trice( iD( 7346), "w: Hello! 👋🙂 \a\n" ); // with sound!
  trice( iD( 6557), "w: Hello! 👋🙂 \a\n" ); // with sound!

test/MDK-ARM_STM32F030R8_instrumented/Core/Src/stm32f0xx_it.c

@@ -310,13 +310,13 @@ void USART2_IRQHandler(void)
  TRICE( Id( 6412), "wrn:TRICE_UARTA Send Break Flag is set\n" );
  }
  if( LL_USART_IsActiveFlag_RWU(TRICE_UARTA) ){
- TRICE( Id( 3254), "wrn:TRICE_UARTA Receive Wake Up from mute mode Flag is set\n" );
+ TRICE( Id( 5010), "wrn:TRICE_UARTA Receive Wake Up from mute mode Flag is set\n" );
  }
  if( LL_USART_IsActiveFlag_TEACK(TRICE_UARTA) ){
  //TRICE( Id( 4009), "wr:TRICE_UARTA Transmit Enable Acknowledge Flag is set\n" );
  }
  if( LL_USART_IsActiveFlag_REACK(TRICE_UARTA) ){
- //TRICE( Id( 1628), "rd:TRICE_UARTA Receive Enable Acknowledge Flag is set\n" );
+ //TRICE( Id( 3210), "rd:TRICE_UARTA Receive Enable Acknowledge Flag is set\n" );
  }
 */
  /* USER CODE END USART2_IRQn 0 */

test/MDK-ARM_STM32F030R8_instrumented/MDK-ARM/MDK-ARM_STM32F030R8.uvprojx

@@ -10,14 +10,14 @@
  <TargetName>MDK-ARM_STM32F030R8</TargetName>
  <ToolsetNumber>0x4</ToolsetNumber>
  <ToolsetName>ARM-ADS</ToolsetName>
- <pCCUsed>6200001::V6.20.1::..\..\Program Files (x86)\ArmCompilerforEmbedded6.20.1</pCCUsed>
+ <pCCUsed>5060960::V5.06 update 7 (build 960)::.\ARMCC</pCCUsed>
  <uAC6>0</uAC6>
  <TargetOption>
  <TargetCommonOption>
  <Device>STM32F030R8Tx</Device>
  <Vendor>STMicroelectronics</Vendor>
- <PackID>Keil.STM32F0xx_DFP.2.1.1</PackID>
- <PackURL>https:https://www.keil.com/pack/</PackURL>
+ <PackID>Keil.STM32F0xx_DFP.2.1.0</PackID>
+ <PackURL>http:https://www.keil.com/pack/</PackURL>
  <Cpu>IRAM(0x20000000-0x20001FFF) IROM(0x8000000-0x800FFFF) CLOCK(8000000) CPUTYPE("Cortex-M0") TZ</Cpu>
  <FlashUtilSpec></FlashUtilSpec>
  <StartupFile></StartupFile>
@@ -186,7 +186,6 @@
  <RvdsVP>0</RvdsVP>
  <RvdsMve>0</RvdsMve>
  <RvdsCdeCp>0</RvdsCdeCp>
- <nBranchProt>0</nBranchProt>
  <hadIRAM2>0</hadIRAM2>
  <hadIROM2>0</hadIROM2>
  <StupSel>8</StupSel>