Skip to content

Commit

Permalink
apply black and vsg
Browse files Browse the repository at this point in the history
  • Loading branch information
marph91 committed Jun 9, 2021
1 parent 9dba4ff commit d4cf856
Show file tree
Hide file tree
Showing 10 changed files with 20 additions and 35 deletions.
6 changes: 3 additions & 3 deletions playground/00_intro.py
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
import tensorflow as tf
import larq as lq

(train_images, train_labels), (
test_images,
test_labels,
(
(train_images, train_labels),
(test_images, test_labels,),
) = tf.keras.datasets.mnist.load_data()

train_images = train_images.reshape((60000, 28, 28, 1))
Expand Down
6 changes: 3 additions & 3 deletions playground/01_binarynet.py
Original file line number Diff line number Diff line change
Expand Up @@ -5,9 +5,9 @@

num_classes = 10

(train_images, train_labels), (
test_images,
test_labels,
(
(train_images, train_labels),
(test_images, test_labels,),
) = tf.keras.datasets.cifar10.load_data()

train_images = train_images.reshape((50000, 32, 32, 3)).astype("float32")
Expand Down
7 changes: 1 addition & 6 deletions sim/test_adder_tree.py
Original file line number Diff line number Diff line change
Expand Up @@ -61,12 +61,7 @@ def output_data(self) -> int:
tick = Tick(clock_period=clock_period)
cocotb.fork(Clock(dut.isl_clk, clock_period, units="ns").start())
output_mon = ImageMonitor(
"output",
dut.oslv_data,
dut.osl_valid,
dut.isl_clk,
1,
output_bitwidth,
"output", dut.oslv_data, dut.osl_valid, dut.isl_clk, 1, output_bitwidth,
)
dut.isl_valid <= 0
await tick.wait()
Expand Down
7 changes: 1 addition & 6 deletions sim/test_bnn.py
Original file line number Diff line number Diff line change
Expand Up @@ -42,12 +42,7 @@ async def run_test(dut):

output_bitwitdh = dut.C_OUTPUT_CHANNEL_BITWIDTH.value.integer
output_mon = ImageMonitor(
"output",
dut.oslv_data,
dut.osl_valid,
dut.isl_clk,
1,
output_bitwitdh,
"output", dut.oslv_data, dut.osl_valid, dut.isl_clk, 1, output_bitwitdh,
)

# initialize the test
Expand Down
6 changes: 1 addition & 5 deletions sim/test_window_convolution_activation.py
Original file line number Diff line number Diff line change
Expand Up @@ -49,11 +49,7 @@ async def run_test(dut):
batch_shape = (1,) + image_shape
input_ = tf.keras.Input(batch_shape=batch_shape, name="img")
x = lq.layers.QuantConv2D(
output_channel,
kernel_size,
strides=stride,
use_bias=False,
name="test_conv",
output_channel, kernel_size, strides=stride, use_bias=False, name="test_conv",
)(input_)
if output_channel_bitwidth == 1:
# Scale is not needed, since we clip afterwards anyway.
Expand Down
8 changes: 1 addition & 7 deletions sim/test_window_maximum_pooling.py
Original file line number Diff line number Diff line change
Expand Up @@ -106,13 +106,7 @@ def output_data(self) -> int:

# Don't run the full test matrix. Only the most common configs.
@pytest.mark.parametrize(
"kernel_size,stride,channel",
[
(2, 1, 8),
(2, 2, 12),
(3, 1, 16),
(3, 2, 9),
],
"kernel_size,stride,channel", [(2, 1, 8), (2, 2, 12), (3, 1, 16), (3, 2, 9),],
)
def test_window_maximum_pooling(kernel_size, stride, channel):
generics = {
Expand Down
6 changes: 4 additions & 2 deletions src/interface/bnn_uart.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -112,7 +112,8 @@ begin
case output_state is

when IDLE =>
assert sl_valid_out_bnn = '0' severity failure;
assert sl_valid_out_bnn = '0'
severity failure;

int_valid_buffer_values <= 0;
output_state <= FILL;
Expand All @@ -128,7 +129,8 @@ begin
end if;

when READY_TO_SEND =>
assert sl_valid_out_bnn = '0' severity failure;
assert sl_valid_out_bnn = '0'
severity failure;

if (sl_ready_uart_tx = '1') then
int_valid_buffer_values <= int_valid_buffer_values - 1;
Expand Down
3 changes: 2 additions & 1 deletion src/util/basic_counter.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -90,7 +90,8 @@ begin

else generate

assert C_MAX mod C_INCREMENT = 0 severity failure;
assert C_MAX mod C_INCREMENT = 0
severity failure;

gen_power_of_two : if is_power_of_two(C_MAX) generate

Expand Down
3 changes: 2 additions & 1 deletion src/util/serializer.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -35,7 +35,8 @@ begin
a_data <= a_data(1 to a_data'high) & a_data(0);

if (isl_valid = '1') then
assert int_output_valid_cycles = 0 severity failure;
assert int_output_valid_cycles = 0
severity failure;
int_output_valid_cycles <= C_DATA_COUNT;
for i in a_data'range loop
a_data(i) <= get_slice(islv_data, i, C_DATA_BITWIDTH);
Expand Down
3 changes: 2 additions & 1 deletion src/window_ctrl/window_ctrl.vhd
Original file line number Diff line number Diff line change
Expand Up @@ -80,7 +80,8 @@ begin
gen_window_buffer : if C_KERNEL_SIZE = 1 generate

-- For 1x1 kernels, there is no buffering needed and no padding supported.
assert C_PAD = 0 severity failure;
assert C_PAD = 0
severity failure;

sl_selector_valid_out_d2 <= isl_valid;
a_selector_data_out(0, 0) <= islv_data;
Expand Down

0 comments on commit d4cf856

Please sign in to comment.