extend parametrization of the tests

sim/test_maximum_pooling.py

@@ -62,10 +62,9 @@ def output_data(self) -> list:
  ), f"{dut.oslv_data.value.integer} /= {case.output_data[0]}"
 
 
-@pytest.mark.parametrize("kernel_size", range(2, 3)) # range(2, 6)
-def test_maximum_pooling(record_waveform, kernel_size):
+def test_maximum_pooling(record_waveform):
  generics = {
- "C_KERNEL_SIZE": kernel_size,
+ "C_KERNEL_SIZE": 2,
  "C_CHANNEL": 1,
  }
  run(

sim/test_utils/cocotb_helpers.py

@@ -9,13 +9,13 @@
 class ImageMonitor(Monitor):
  """Observes single input or output of DUT."""
 
- def __init__(self, name, signal, valid, clock, output_channels):
+ def __init__(self, name, signal, valid, clock, output_channels, bitwidth=1):
  self.name = name
  self.signal = signal
  self.valid = valid
  self.clock = clock
  self.output = []
- self.eol_count = 0
+ self.bitwidth = bitwidth
  self.output_channels = output_channels
 
  super().__init__()
@@ -36,7 +36,7 @@ async def _monitor_recv(self):
  if valid == 1:
  vec = self.signal.value.binstr
  output = [
- int(vec[ch * 8 : (ch + 1) * 8], 2)
+ int(vec[ch * self.bitwidth : (ch + 1) * self.bitwidth], 2)
  for ch in range(self.output_channels)
  ]
  self.output.extend(output)

sim/test_window_convolution_activation.py

@@ -168,7 +168,14 @@ def get_threshold(self):
  # prepare coroutines
  clock_period = 10 # ns
  cocotb.fork(Clock(dut.isl_clk, clock_period, units="ns").start())
- output_mon = ImageMonitor("output", dut.oslv_data, dut.osl_valid, dut.isl_clk, 1)
+ output_mon = ImageMonitor(
+ "output",
+ dut.oslv_data,
+ dut.osl_valid,
+ dut.isl_clk,
+ 1,
+ bitwidth * output_channel,
+ )
  dut.isl_valid <= 0
  dut.isl_start <= 0
  await Timer(clock_period, units="ns")
@@ -210,15 +217,33 @@ def get_threshold(self):
  output_mon.clear()
 
 
-@pytest.mark.parametrize("kernel_size", range(3, 4)) # range(2, 6)
-def test_window_convolution_activation(record_waveform, kernel_size):
+# Don't run the full test matrix. Only the most common configs.
+@pytest.mark.parametrize(
+ "kernel_size,stride,input_channel,output_channel",
+ [
+ (1, 1, 4, 8),
+ (2, 1, 4, 8),
+ (2, 2, 4, 8),
+ (3, 1, 4, 8),
+ (3, 1, 1, 4),
+ (3, 1, 3, 8),
+ (3, 1, 4, 8),
+ (3, 1, 8, 16),
+ (3, 2, 4, 8),
+ (5, 1, 4, 8),
+ (7, 1, 4, 8),
+ ],
+)
+def test_window_convolution_activation(
+ record_waveform, kernel_size, stride, input_channel, output_channel
+):
  generics = {
  "C_KERNEL_SIZE": kernel_size,
- "C_STRIDE": 1,
- "C_INPUT_CHANNEL": 8,
- "C_OUTPUT_CHANNEL": 8,
- "C_IMG_WIDTH": 4,
- "C_IMG_HEIGHT": 4,
+ "C_STRIDE": stride,
+ "C_INPUT_CHANNEL": input_channel,
+ "C_OUTPUT_CHANNEL": output_channel,
+ "C_IMG_WIDTH": 8,
+ "C_IMG_HEIGHT": 8,
  }
  run(
  vhdl_sources=get_files(

sim/test_window_maximum_pooling.py

@@ -70,7 +70,14 @@ def output_data(self) -> int:
  # prepare coroutines
  clock_period = 10 # ns
  cocotb.fork(Clock(dut.isl_clk, clock_period, units="ns").start())
- output_mon = ImageMonitor("output", dut.oslv_data, dut.osl_valid, dut.isl_clk, 1)
+ output_mon = ImageMonitor(
+ "output",
+ dut.oslv_data,
+ dut.osl_valid,
+ dut.isl_clk,
+ 1,
+ bitwidth * image_shape[2],
+ )
  dut.isl_valid <= 0
  dut.isl_start <= 0
  await Timer(clock_period, units="ns")
@@ -98,14 +105,23 @@ def output_data(self) -> int:
  output_mon.clear()
 
 
-@pytest.mark.parametrize("kernel_size", range(2, 3)) # range(2, 6)
-def test_window_maximum_pooling(record_waveform, kernel_size):
+# Don't run the full test matrix. Only the most common configs.
+@pytest.mark.parametrize(
+ "kernel_size,stride,channel",
+ [
+ (2, 1, 8),
+ (2, 2, 12),
+ (3, 1, 16),
+ (3, 2, 9),
+ ],
+)
+def test_window_maximum_pooling(record_waveform, kernel_size, stride, channel):
  generics = {
  "C_KERNEL_SIZE": kernel_size,
- "C_STRIDE": 2,
- "C_CHANNEL": 8,
- "C_IMG_WIDTH": 4,
- "C_IMG_HEIGHT": 4,
+ "C_STRIDE": stride,
+ "C_CHANNEL": channel,
+ "C_IMG_WIDTH": 8,
+ "C_IMG_HEIGHT": 8,
  }
  run(
  vhdl_sources=get_files(

src/bnn.vhd

@@ -0,0 +1,74 @@
+
+library ieee;
+ use ieee.std_logic_1164.all;
+ use ieee.numeric_std.all;
+
+entity bnn is
+ generic (
+ C_ARCHITECTURE_FILE : string := "../sim/architecture.json";
+ C_WEIGHTS_FILE : string := "../sim/weights.json";
+ C_LAYER_NAME : string := "pe1"
+ );
+ port (
+ isl_clk : in std_logic;
+ isl_valid : in std_logic;
+ islv_data : in std_logic_vector(7 downto 0);
+ oslv_data : out std_logic_vector(7 downto 0);
+ osl_valid : out std_logic
+ );
+end entity bnn;
+
+architecture behavioral of bnn is
+
+ signal sl_add : std_logic := '0';
+ signal slv_multiplication_result : std_logic_vector(islv_data'range);
+
+ signal sl_valid_out : std_logic := '0';
+ signal slv_data_out : std_logic_vector(oslv_data'range);
+
+ -- constant C_JSON_CONTENT : t_json := jsonLoad(C_ARCHITECTURE_FILE);
+ -- constant C_WEIGHTS : integer_vector := jsonGetIntegerArray(C_JSON_CONTENT, "weights"); -- TODO: C_LAYER_NAME
+ -- constant C_THRESHOLDS : integer_vector := jsonGetIntegerArray(C_JSON_CONTENT, "thresholds");
+
+ -- processing element (PE) configuration
+ -- TODO: verify json image size with vhdl calculation
+ constant C_PE_COUNT : integer;
+
+ type t_pe_parameter is record
+ C_LAYER_NAME : string;
+
+ C_PAD : integer;
+
+ C_WEIGHTS_FILE : string;
+ C_CONVOLUTION_KERNEL_SIZE : integer;
+ C_CONVOLUTION_STRIDE : integer;
+
+ C_MAXIMUM_POOLING_KERNEL_SIZE : integer;
+ C_MAXIMUM_POOLING_STRIDE : integer;
+
+ C_INPUT_CHANNEL : integer;
+ C_OUTPUT_CHANNEL : integer;
+ C_IMG_WIDTH : integer;
+ C_IMG_HEIGHT : integer;
+ end record t_pe_parameter;
+
+ type t_pe_parameter_vector is array(natural range <>) of t_pe_parameter;
+
+ constant C_PE_PARAMETER : t_pe_parameter_vector(0 to C_PE_COUNT - 1);
+
+begin
+
+ proc_cnn : process (isl_clk) is
+ begin
+
+ if (rising_edge(isl_clk)) then
+ -- loop processing elements
+ -- average pooling/fc
+ end if;
+
+ end process proc_cnn;
+
+ oslv_data <= slv_data_out;
+ osl_valid <= sl_valid_out;
+
+end architecture behavioral;

src/convolution.vhd

@@ -10,7 +10,7 @@ entity convolution is
  generic (
  -- TODO: input bitwidth, for now = 1
 
- C_KERNEL_SIZE : integer range 2 to 7 := 2;
+ C_KERNEL_SIZE : integer range 1 to 7 := 2;
  C_INPUT_CHANNEL : integer := 1
  );
  port (

src/maximum_pooling.vhd

@@ -4,7 +4,7 @@ library ieee;
 
 entity maximum_pooling is
  generic (
- C_KERNEL_SIZE : integer range 2 to 5 := 2;
+ C_KERNEL_SIZE : integer range 2 to 3 := 2;
  C_CHANNEL : integer := 1
  );
  port (

src/processing_element.vhd

@@ -14,7 +14,9 @@ library util;
 entity processing_element is
  generic (
  -- TODO: input bitwidth, for now = 1
+ C_LAYER_NAME : string := "pe1";
 
+ C_WEIGHTS_FILE : string := "../sim/weights.json";
  C_CONVOLUTION_KERNEL_SIZE : integer := 3;
  C_CONVOLUTION_STRIDE : integer := 1;
 
@@ -23,12 +25,8 @@ entity processing_element is
 
  C_INPUT_CHANNEL : integer := 8;
  C_OUTPUT_CHANNEL : integer := 8;
-
- C_IMG_WIDTH : integer := 4;
- C_IMG_HEIGHT : integer := 4;
-
- C_WEIGHTS_FILE : string := "../sim/weights.json";
- C_LAYER_NAME : string := "pe1"
+ C_IMG_WIDTH : integer := 4;
+ C_IMG_HEIGHT : integer := 4
  );
  port (
  isl_clk : in std_logic;