GPU: Mask away unused bits in framebuf/zbuf ptr, cleanup #16150
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
Lower 4 bits are ignored during rendering, and mirrors (even even the 8 bit at the top) are ignored.
In VRAM, always store without mirror. In RAM, always store without cache/kernel bits.
|
nice cleanup! |
This was referenced Oct 14, 2022
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Based on tests, setting bits outside this in the register does nothing, so ignore them.
In addition, make sure the fb_address/z_address are always masked, so we don't need to mask them when reading. Mask any incoming comparison parameters to match.
Technically, matching addresses depends on the swizzle, but for the base address or ranges it usually will be close and is basically what we're already doing. This just makes it more consistent.
-[Unknown]