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Feature: Integrate with unified SYCL backend for Intel GPUs #2690
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7a4343d
first update for migration
NeoZhangJianyu 2338769
update init_cublas
NeoZhangJianyu 0c00b4f
add debug functio, commit all help code
NeoZhangJianyu ff83711
step 1
NeoZhangJianyu 02dffb6
step 2
NeoZhangJianyu 43f2c35
step3 add fp16, slower 31->28
NeoZhangJianyu da752ed
add GGML_LIST_DEVICE function
NeoZhangJianyu 6dd3278
step 5 format device and print
NeoZhangJianyu 3a9d2c5
step6, enhance error check, remove CUDA macro, enhance device id to f…
NeoZhangJianyu 65f895d
support main device is non-zero
NeoZhangJianyu 3b1a743
step7 add debug for code path, rm log
NeoZhangJianyu c2ef7a9
step 8, rename all macro & func from cuda by sycl
NeoZhangJianyu 69d76c8
fix error of select non-zero device, format device list
NeoZhangJianyu c709c3c
ren ggml-sycl.hpp -> ggml-sycl.h
NeoZhangJianyu fa3a586
clear CMAKE to rm unused lib and options
NeoZhangJianyu 3645f25
correct queue: rm dtct:get_queue
NeoZhangJianyu bd38129
add print tensor function to debug
NeoZhangJianyu 5b53899
fix error: wrong result in 658746bb26702e50f2c59c0e4ada8e9da6010481
NeoZhangJianyu a47f5ec
summary dpct definition in one header file to replace folder:dpct
NeoZhangJianyu c67c2ab
refactor device log
NeoZhangJianyu c3c5b20
mv dpct definition from folder dpct to ggml-sycl.h
NeoZhangJianyu ca2cb69
update readme, refactor build script
NeoZhangJianyu 95daece
fix build with sycl
NeoZhangJianyu a8936f4
set nthread=1 when sycl, increase performance
NeoZhangJianyu 79d30d7
add run script, comment debug code
NeoZhangJianyu 0d6e721
add ls-sycl-device tool
NeoZhangJianyu 7350fd4
add ls-sycl-device, rm unused files
NeoZhangJianyu 09b5619
rm rear space
NeoZhangJianyu d80dd65
dos2unix
NeoZhangJianyu 593ce00
Update README_sycl.md
NeoZhangJianyu 57e9fba
fix return type
luoyu-intel d5f7d36
remove sycl version from include path
luoyu-intel 35a0daa
restore rm code to fix hang issue
NeoZhangJianyu ae941b1
add syc and link for sycl readme
NeoZhangJianyu e3481fa
rm original sycl code before refactor
NeoZhangJianyu 623d803
fix code err
luoyu-intel f396a3b
add know issue for pvc hang issue
NeoZhangJianyu f008cc7
enable SYCL_F16 support
luoyu-intel 67e6b3c
align pr4766
airMeng 533c647
check for sycl blas, better performance
NeoZhangJianyu dd7f139
cleanup 1
abhilash1910 b403784
remove extra endif
airMeng a0a1304
add build&run script, clean CMakefile, update guide by review comments
NeoZhangJianyu 27c08c0
Merge branch 'sycl' of https://github.com/abhilash1910/llama.cpp into…
NeoZhangJianyu 97cbe18
rename macro to intel hardware
NeoZhangJianyu 1ddaf44
editor config format
abhilash1910 bd716b2
format fixes
abhilash1910 be31379
format fixes
abhilash1910 d097e2a
editor format fix
abhilash1910 88f64b7
Remove unused headers
abhilash1910 756c4ac
skip build sycl tool for other code path
NeoZhangJianyu b42a32d
replace tab by space
NeoZhangJianyu 5f83a12
fix blas matmul function
abhilash1910 d6fc1a0
fix mac build
abhilash1910 c7e745e
restore hip dependency
abhilash1910 3bfb846
fix conflict
NeoZhangJianyu 498121b
ren as review comments
NeoZhangJianyu 91b1461
mv internal function to .cpp file
NeoZhangJianyu 816f480
export funciton print_sycl_devices(), mv class dpct definition to sou…
NeoZhangJianyu 7a44a95
update CI/action for sycl code, fix CI error of repeat/dup
NeoZhangJianyu 7babd76
fix action ID format issue
NeoZhangJianyu 04a46c4
rm unused strategy
NeoZhangJianyu 799af05
enable llama_f16 in ci
airMeng ec5c8bc
fix conflict
NeoZhangJianyu 22e1b45
fix build break on MacOS, due to CI of MacOS depend on external ggml,…
NeoZhangJianyu 238ec31
Merge branch 'master' into sycl
abhilash1910 67de350
fix ci cases for unsupported data type
NeoZhangJianyu fb15de3
revert unrelated changed in cuda cmake
airMeng 96186a7
revert hip cmake changes
airMeng d07a88d
fix indent
airMeng 8dd1b60
add prefix in func name
NeoZhangJianyu 3aabd8a
revert no mmq
airMeng 18742f7
rm cpu blas duplicate
abhilash1910 0e235fb
fix no_new_line
airMeng 5600118
fix src1->type==F16 bug.
luoyu-intel eef5faa
pass batch offset for F16 src1
luoyu-intel 5bb93d4
fix batch error
luoyu-intel 0635f84
fix wrong code
luoyu-intel f1bab50
revert sycl checking in test-sampling
airMeng 66e24c2
pass void as arguments of ggml_backend_sycl_print_sycl_devices
airMeng b06dca6
remove extra blank line in test-sampling
airMeng 05b7f9b
revert setting n_threads in sycl
airMeng d6a6505
implement std::isinf for icpx with fast math.
luoyu-intel 174c9a0
Update ci/run.sh
abhilash1910 c08fec2
Update examples/sycl/run-llama2.sh
abhilash1910 2cba564
Update examples/sycl/run-llama2.sh
abhilash1910 f707051
Update CMakeLists.txt
abhilash1910 45b0618
Update CMakeLists.txt
abhilash1910 5531754
Update CMakeLists.txt
abhilash1910 b9ffaab
Update CMakeLists.txt
abhilash1910 2ab9715
add copyright and MIT license declare
NeoZhangJianyu d394ca7
update the cmd example
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How deep is the C++17 dependency in the SYCL backend?
It's okay to optionally include it like this, but I'm wondering if it is realistic to implement this in C++11 at some point - it would be in better harmony with the rest of the codebase.
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Actually the icpx compiler expects C++17 standard and SYCL has dependency on that version. We thought about this process having same version C++11 but it causes compilation errors due to dependency on c++17 headers.
@NeoZhangJianyu , @AidanBeltonS and others can add on this.
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Just to add a bit more info, it is not just that the SYCL compiler, icpx, expects C++17. C++17 is a core aspect within the SYCL open standard. Any SYCL2020 code is expected to be C++17 conformant, so the relationship is deeper than just the specific implementation of the Khronos specification. I would say the dependency between SYCL and C++17 is hard, and it would likely not work well if SYCL specific features were compiled with C++11.
From the spec: https://registry.khronos.org/SYCL/specs/sycl-2020/pdf/sycl-2020.pdf
The SYCL specification is now based on the core language of C++17, as described in Section 3.9.1. Features of C++17 are now enabled within the specification, such as deduction guides for class template argument deduction