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Tiny, fast, non-dependent and fully loaded printf implementation for embedded systems. Extensive test suite passing.
Automatically exported from code.google.com/p/netmap
libc targeted for embedded systems usage. Reduced set of functionality (due to embedded nature). Chosen for portability and quick bringup.
MIPI CSI-2 Camera Sensor Receiver verilog HDL implementation For any generic FPGA. Tested with IMX219 on Lattice MachXO3LF. 2Gbps UVC Video Stream Over USB 3.0 with Cypress FX3. This is now Legacy …
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
CORE-V Wally is a configurable RISC-V Processor associated with RISC-V System-on-Chip Design textbook. Contains a 5-stage pipeline, support for A, B, C, D, F, M and Q extensions, and optional cache…
IOTG Time-Sensitive Networking Reference Software
eXtendable Heterogeneous Energy-Efficient Platform based on RISC-V
Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.
An energy-efficient RISC-V floating-point compute cluster.
LCAI-TIHU SW is a software stack of the AI inference processor based on RISC-V
The Common Evaluation Platform (CEP), based on UCB's Chipyard Framework, is an SoC design that contains only license-unencumbered, freely available components.
MAPLE's hardware-software co-design allows programs to perform long-latency memory accesses asynchronously from the core, avoiding pipeline stalls, and enabling greater memory parallelism (MLP).
A tool for converting PyTorch models into raw C codes that can be executed standalone in a baremetal runtime on RISC-V research chips.
EECS-NTNU / chipyard
Forked from ucb-bar/chipyardPre-release starter template for custom Chisel projects
Scripting for building ARC toolchain
pulp-platform / archimedes
Forked from pulp-platform/pulp_clusterArchitecture for Minimum Energy DNNs at Edge and domain-specific processing(ArchiMEDES)
planvtech / cva6-litmus
Forked from Michelangelo98/cva6-litmusA tool to run litmus tests on bare-metal cva6
A Darknet-YOLOv3 with support for RISC-V Vector accelerator offloading
A comparison and benchmark for testing CPU versus Vector acceleration of tensor and image conversion sublayers