A curated collection of awesome Regex libraries, tools, frameworks and software

Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description and software programming languages

[ACL'20] HAT: Hardware-Aware Transformers for Efficient Natural Language Processing

Research and Materials on Hardware implementation of Transformer Model

pix2tex: Using a ViT to convert images of equations into LaTeX code.

This repository contains the tutorials and homework assignments for CSCE 790: Neuromorphic computing course at UofSC.

Neuromorphic Chip Reservoir Computing

Neuromorphic Computing Workshop 2017 Website

Software framework for Designing and Mapping a CNN onto neuromorphic chip with crossbar array of synapses.

A Behavior-Level Modeling Tool for Memristor-based Neuromorphic Computing Systems

HBP Neuromorphic Computing Platform Guidebook

Learn about the Neumorphic engineering process of creating large-scale integration (VLSI) systems containing electronic analog circuits to mimic neuro-biological architectures.

Asynchronous digital neuromorphic network build from leaky integrate and fire neurons. In the works!

Designed as part of UCSB ECE Neuromorphic Computing Course. Includes lateral inhibition effects and unsupervised STDP learning. Classifies visual inputs '0' and '1'.

git repository for the project "Reconfigurable Approach to Neuromorphic Hardware"

Brilliantly Radical Artificially Intelligent Neural Machine

The open-source release of "SpikeHard: Efficiency-Driven Neuromorphic Hardware for Heterogeneous Systems-on-Chip"

Neuromorphic motor control module for FPGAs

UCSB ECE594BB Instructed by Prof. Peng Li in Winter 2023

Neuromorphic Artificical Intelligence

FPGA based design

This project aims to develop a novel neuromorphic NoC architecture based on RISC-V ISA to support spiking neural network applications, and test it on FPGA.

some of our simulation codes for : A Low-Cost High-Speed Neuromorphic Hardware Based on Spiking Neural Network

My name is Fang Biao. I'm currently pursuing my Master degree with the college of Computer Science and Engineering, Si Chuan University, Cheng Du, China. For more informantion about me and my resea…

The CyNAPSE Neuromorphic Accelerator: A Digital Spiking neural network accelerator written in fully synthesizable verilog HDL

This is the RTL implementation of Shenjing, a low power neuromorphic computing accelerator

The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researchers under the supervision of Prof: Manan Suri (NVM &Neuromorp…