The project includes SRAM In Memory Computing Accelerator with updates in design/circuits submitted previously in MPW7, by IITD researchers under the supervision of Prof: Manan Suri (NVM &Neuromorphic Hardware Research Group IIT-Delhi, https://web.iitd.ac.in/~manansuri/).

The Project consists of following blocks:

1. SRAM controller (Digital)
2. In memory computing SRAM Array(Analog)
3. Sensing circuits

The Analog circuit consists of following blocks"

1. Precharge circuit
2. IMC SRAM Array
3. Sense Amplifier
4. Write Driver
5. ADC

Team members& Designers:

1. Deepak verma
2. Digamber Kumar Pandey
3. Richa Mishra
4. Chithambara Moorthii
5. Vivek Parmar
6. Ayan Ray