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MulPlugin add keepMulInput/keepMulOutput
Scala CI #396: Commit e7b8d64 pushed by Dolu1990
August 7, 2024 07:19 59m 34s main
August 7, 2024 07:19 59m 34s
Fix #121
Scala CI #395: Commit c0b5ab9 pushed by Dolu1990
August 5, 2024 09:43 58m 40s main
August 5, 2024 09:43 58m 40s
Fix #121
Scala CI #394: Commit 0784875 pushed by Dolu1990
August 5, 2024 08:45 48m 53s main
August 5, 2024 08:45 48m 53s
Merge pull request #120 from Bill94l/compressedInstructions
Scala CI #393: Commit 5211920 pushed by Dolu1990
July 29, 2024 13:46 1h 13m 1s main
July 29, 2024 13:46 1h 13m 1s
Merge pull request #117 from Bill94l/memoryMapping
Scala CI #391: Commit d6115eb pushed by Dolu1990
July 17, 2024 12:51 1h 3m 9s main
July 17, 2024 12:51 1h 3m 9s
Updating the memory mapping for SocDemo
Scala CI #390: Pull request #117 opened by Bill94l
July 16, 2024 17:32 58m 34s Bill94l:memoryMapping
July 16, 2024 17:32 58m 34s
DependencyStorage status busy is now implemented in registers instead…
Scala CI #389: Commit ba63ee6 pushed by Dolu1990
July 12, 2024 14:15 56m 43s main
July 12, 2024 14:15 56m 43s
Litex soc now use explicit async read ram blackbox
Scala CI #388: Commit 43195dd pushed by Dolu1990
July 10, 2024 07:25 58m 1s main
July 10, 2024 07:25 58m 1s
sync SpinalHDL
Scala CI #387: Commit 3dca887 pushed by Dolu1990
July 10, 2024 07:17 57m 57s main
July 10, 2024 07:17 57m 57s
relative spinal
Scala CI #384: Commit 1cc2b23 pushed by Dolu1990
July 4, 2024 07:30 1h 2m 9s relative_sbt
July 4, 2024 07:30 1h 2m 9s
Fix #112 mstatus.tw
Scala CI #383: Commit bc18f66 pushed by Dolu1990
July 4, 2024 07:29 57m 49s relative_sbt
July 4, 2024 07:29 57m 49s
Fix #112 mstatus.tw
Scala CI #382: Commit bc18f66 pushed by Dolu1990
July 3, 2024 07:31 1h 5m 48s main
July 3, 2024 07:31 1h 5m 48s
Fix #112 mstatus.tw
Scala CI #381: Commit 6f73692 pushed by Dolu1990
July 3, 2024 07:05 1h 5m 44s main
July 3, 2024 07:05 1h 5m 44s
Fix #112 mstatus.tw
Scala CI #380: Commit 31e9db6 pushed by Dolu1990
July 3, 2024 07:00 1h 6m 3s main
July 3, 2024 07:00 1h 6m 3s
git action cache fix?
Scala CI #379: Commit 298e5ea pushed by Dolu1990
May 31, 2024 14:10 1h 7m 18s main
May 31, 2024 14:10 1h 7m 18s
Fix #101
Scala CI #378: Commit 3008ac6 pushed by Dolu1990
May 31, 2024 08:23 9m 19s main
May 31, 2024 08:23 9m 19s
Fix #104
Scala CI #377: Commit c5e4d74 pushed by Dolu1990
May 30, 2024 17:03 9m 7s main
May 30, 2024 17:03 9m 7s
Fix #105
Scala CI #376: Commit 9115f12 pushed by Dolu1990
May 30, 2024 16:28 1h 5m 58s main
May 30, 2024 16:28 1h 5m 58s
Fix #106 #103
Scala CI #375: Commit ed2df82 pushed by Dolu1990
May 30, 2024 14:58 1h 7m 5s main
May 30, 2024 14:58 1h 7m 5s
Fix https://github.com/SpinalHDL/NaxRiscv/issues/103
Scala CI #374: Commit e5f3abb pushed by Dolu1990
May 29, 2024 14:56 1h 5m 41s main
May 29, 2024 14:56 1h 5m 41s
Update to Scala 2.12 and fix litex mbus offset
Scala CI #373: Commit f335738 pushed by Dolu1990
April 25, 2024 14:05 11m 13s main
April 25, 2024 14:05 11m 13s
sync
Scala CI #372: Commit ab8e27d pushed by Dolu1990
April 23, 2024 15:26 1h 8m 55s main
April 23, 2024 15:26 1h 8m 55s