This project's vision is to help every college student read all the code of an operating system.

With only 2000 lines of code, egos-2000 implements every component of an operating system for education. It can run on RISC-V boards and the QEMU software emulator.

# The cloc utility is used to count the lines of code (LOC).
# The command below counts the LOC of everything excluding text documents.
> cloc egos-2000 --exclude-ext=md,txt
...
github.com/AlDanial/cloc v 1.94  T=0.05 s (949.3 files/s, 62349.4 lines/s)
-------------------------------------------------------------------------------
Language                     files          blank        comment           code
-------------------------------------------------------------------------------
C                               37            508            657           1577
C/C++ Header                    10             69            105            283
Assembly                         3             10             27             76
make                             1             14              3             64
-------------------------------------------------------------------------------
SUM:                            51            601            792           2000 (exactly 2000!)
-------------------------------------------------------------------------------

The egos part of egos-2000 is named after its three-layer architecture.

• The earth layer implements hardware-specific abstractions.
  • tty and disk device interfaces
  • timer, exception and memory management interfaces
• The grass layer implements hardware-independent abstractions.
  • process control block and system call interfaces
• The application layer implements file system, shell and user commands.

The definitions of struct earth and struct grass in this header file specify the layer interfaces.

Developed for CS4411 at Cornell, egos-2000 also has a special version running on the Verilog processor from ECE4750 at Cornell. The goal is to make OS education more connected with computer architecture.

In this edition of egos-2000, I have introduced several significant changes and improvements compared to the original edition. Some of the main changes include:

In the cpu_mmu.c file, significant developments were made to enhance the Memory Management Unit (MMU) for our operating system. This work included the implementation of critical functions such as setup_identity_region, pagetable_identity_mapping, page_table_map, and MMU initialization.

• Setup Identity Region Function: Implemented memory identity mapping using bitwise operations and managed virtual-to-physical address mappings, improving system stability and efficiency.

• Page Table Identity Mapping Function: Developed identity mappings for various memory regions, including system-specific components, resulting in more efficient memory utilization.

• Page Table Map Function: Created a function to link virtual pages to physical frames with precise page-to-frame mappings, reducing the risk of critical system errors.

• MMU Initialization Function Successfully initialized the Memory Management Unit (MMU), managing physical memory protection (PMP) and memory translation mechanisms, contributing to enhanced system security and performance.

These enhancements have led to a more robust MMU setup, improving system stability, security, and performance, ultimately reducing the likelihood of critical system errors.

In the kernel.c file, significant enhancements and optimizations were made to the operating system kernel, focusing on improving process scheduling, fault handling, and system calls to increase overall efficiency and reliability.

• Advanced Programming Techniques: Leveraged advanced low-level C programming skills, including pointer manipulation, bit operations, and memory-mapped I/O, to optimize hardware interaction.

• Exception and Interrupt Handling: Implemented robust exception and interrupt handling mechanisms, effectively managing various system exceptions and interrupts through functions like excp_entry and intr_entry.

• Process Scheduling and Context Switching: Developed and refined process scheduling logic and context switching methods in proc_yield and ctx_entry, resulting in enhanced system efficiency.

• Inter-Process Communication (IPC): Streamlined inter-process communication (IPC) mechanisms with the development of proc_send and proc_recv, facilitating efficient communication between processes.

• Hardware-Software Interface Management: Managed the hardware-software interface by handling system register management, incorporating comprehensive error checking, and implementing debugging procedures.

These enhancements and optimizations have led to improvements in system performance and reliability, contributing to a more robust and efficient operating system.

In the file.c file, extensive optimizations were applied to the file system, with a focus on zero-copy techniques to improve overall system performance and responsiveness.

• Direct Write to Disk: Implemented direct I/O strategies to write data directly from user-space memory buffers to the disk, reducing intermediate copies.

• Minimize Internal Copying: Avoided unnecessary data copying within functions, especially when dealing with indirect blocks.

• Efficient Buffer Management: Managed buffers efficiently for reading blocks, such as indirect blocks, to reduce memory operation overhead.

• Direct Disk Writes: Utilized direct I/O techniques for writing blocks to the disk, reducing unnecessary copying and improving efficiency.

• Optimized Indirect Block Handling: Minimized the number of read and write operations for indirect blocks, improving I/O efficiency.

• Inode Updates: Grouped inode updates to minimize write operations, enhancing file system performance.

• Error Handling and Recovery: Implemented robust error handling, ensuring file system consistency and recovery in case of failures.

• Performance Enhancement: These optimizations significantly enhanced file system performance, reducing latency for write operations, and improving overall system responsiveness.

These optimizations collectively resulted in enhanced file system performance, reduced latency for write operations, and improved overall system responsiveness.

In the dev_page.c file, the work was undertaken to enhance cache management and ensure thread safety in a multi-threaded environment, resulting in improved system performance, efficiency, and reliability.

• Enhanced Cache Eviction Policy: Optimized cache eviction policies to improve system efficiency, reducing unnecessary disk I/O.

• Efficient Cache Slot Finding: Developed an efficient cache slot finding algorithm (Writeback-Aware Cache) within the paging_write function, improving cache management.

• Streamlined Paging Operations: Streamlined the paging_read function, optimizing cache slot search and implementing lazy loading to minimize disk I/O.

• Memory Operation Efficiency: Utilized memcpy judiciously for memory operations, reducing system overhead and enhancing performance.

• Thread Safety Implementation: Implemented robust concurrency control mechanisms using pthread mutexes, safeguarding critical sections in cache operations.

• Thorough Testing: Conducted comprehensive testing to ensure smooth integration and prevent deadlocks, significantly enhancing system reliability and stability.

These actions collectively resulted in a improvement in cache management efficiency, reduced disk I/O, enhanced system performance, and ensured thread safety and data integrity in multi-threaded scenarios.

In the ult.c file, substantial work was undertaken to develop a Thread Management System, context switching mechanism, and advanced synchronization techniques for efficient multi-threading in a C-based project.

• Thread Control Block: Developed a Thread Control Block (TCB) to efficiently manage thread-related information.

• Critical Thread Functions: Created and implemented critical thread management functions, including thread creation, yielding, and termination.

• Context Switching Mechanism: Implemented a Context Switching Mechanism using setjmp and longjmp functions to ensure seamless context switching and effective thread state management for cooperative multitasking.

• Improved Performance: Enhanced thread management, resulting in improved system performance and responsiveness.

• Resilient System: Built a resilient system for thread life-cycle management, including creation, context switching, and termination.

• Semaphore-Based Solutions: Developed semaphore-based solutions for handling producer-consumer problems, ensuring safe multi-threaded operations and optimized resource use.

• Dynamic Memory Management: Constructed a comprehensive thread management framework with capabilities like thread_create, thread_yield, and thread_exit, integrating dynamic memory management for thread stacks.

• Semaphore Operations: Implemented a sema struct for semaphore operations, crafting functions such as sema_init, sema_inc, and sema_dec for regulated access to shared resources in a multi-threaded environment.

• Producer-Consumer Handling: Orchestrated producer-consumer processes using semaphores to efficiently handle shared buffers, ensuring synchronized operations between producers and consumers.

• Performance Enhancement: Achieved a significant enhancement in the multi-threading mechanism, resulting in more effective context switching and thread administration.

• Resource Distribution: Facilitated improved resource distribution among threads, leading to enhanced application performance and stability in multi-threaded contexts.

This work provided profound expertise and hands-on experience in low-level thread management and inter-thread communication within C programming, ultimately contributing to a more robust and efficient multi-threaded system.

In the context of a simulated operating system developed based on specifications provided by our team at Cornell, advancements were made to the Memory Management Unit (MMU) to ensure efficient and secure memory management while enhancing multi-threading capabilities.

• Implemented Core Functionalities: Established fundamental components of the MMU, including page table management, software TLB, and dynamic physical frame allocation.
• System Initialization: Successfully executed MMU initialization routines to manage physical memory protection (PMP) settings and memory translation mechanisms, thereby enhancing system security and performance.

• Mutex and Condition Variables: Implemented mutex locks and condition variables to synchronize frame allocation and release, ensuring robust thread safety for concurrent operations.
• Read-Write Locks: Utilized read-write locks in software TLB management, optimizing the system for high concurrency by allowing multiple readers concurrently with exclusive writers, thereby reducing contention and enhancing efficiency.

• Performance Tuning: Refined memory management strategies to minimize latency and maximize throughput, particularly for memory-intensive multi-threaded operations.
• Rigorous Debugging and Testing[TODO]: Conducted thorough testing and debugging of the MMU, employing unit and integration tests to ensure functionality, reliability, and robustness.

• C
• POSIX Threads (pthreads)
• GDB Debugger
• Linux

The enhancements made to the MMU not only improved system stability and security but also contributed significantly to the overall robustness and performance of the operating system simulation, reducing the likelihood of critical errors and enhancing memory management efficiency.

For compiling and running egos-2000, please read this document. The RISC-V instruction set manual and SiFive FE310 processor manual introduce the privileged ISA and memory map. This document introduces the teaching plans, software architecture and development history.

For any questions, please contact Yunhao Zhang.

Many thanks to Meta for a Meta fellowship. Many thanks to Robbert van Renesse, Lorenzo Alvisi, Shan Lu, Hakim Weatherspoon and Christopher Batten for their support. Many thanks to all the CS5411/4411 students at Cornell over the years for helping improve this course. Many thanks to Cheng Tan for providing valuable feedback and using egos-2000 in his CS6640 at Northeastern. Many thanks to Brandon Fusi for porting to the Allwinner's D1 chip using Sipeed's Lichee RV64 compute module.

• Writeback-Aware Caching
• Brief Announcement: Writeback-Aware Caching