Microelectronics And Semiconductor Engineering

Presented here is a patent in the Bulgarian register of inventions (Reg. № 27611/1974), written in Bulgarian. The patent relates to novel types of leads for various semiconductor devices: integrated circuits, photodiodes, modular packaged discrete devices, etc. The new leads configuration is proposed in order to avoid some of the disadvantages of the existing ones. Illustrated are several examples of assemblies demonstrating the advantages and the versatility of packaging methods applying this novel leads configuration.

The invention described features two claims. The description is supported by five drawings.

This article describes the development of piezoresistive sensor elements using exfoliating graphite deposited by direct technique on paper polymeric substrate. We have chosen the paper substrate as a basic material to explore the physical effects of graphite as sensor element. As our first research paper we use to build a force sensor device based on the theory of small deflections. This work shows the feasibility of producing low-cost piezoresistive sensing elements using an allotropic form of carbon alternatively to the traditional processes of manufacturing piezoresistors in silicon substrates. The micro fabrication processes using silicon is very time consuming and expensive involving sophisticated equipment and clean rooms. We are interested in developing a new technology for the production of MicroElectroMechanical Systems (MEMS) with minimal cost but using the typical criteria of the integrated circuit micro fabrication processes.

We investigated bulk and thin-film samples of the quaternary p-type semiconductor Cu2ZnSnS4 (CZTS) by µSR, in order to characterize the existing muonium signals. We find that the majority of the implanted muons form a diamagnetic state broadened by an interaction with the Cu nuclear moments, which we interpret as Mu + bound to sulphur. A paramagnetic fraction is also present at low temperatures and the ratio between the two muon charge states, Mu + and Mu 0 , varies between 20 and 40% prior to the onset of muon diffusion, which occurs at around 150 K. The fraction of Mu 0 is found to be sensitive to the defect content of the sample. The paramagnetic fraction has two different contributions and their origin is discussed and related with the muon role as a probe for charge carriers in the material.

The new microelectronic products require the silicon (Si) wafer to be thinned to less than 150 µm in thickness. Residual defect on the wafer surface that leads to wafer breakage with a rough surface still be produced by mechanical grinding. Thus, chemical etching method is essentially applied to produce a reliable thin wafer with smooth surface of desired thickness. In this work, we studied the wet chemical etching effect of different HNO 3 concentrations on total thickness and weight loss, etch rate, morphological and structural properties of Si wafer in the mixtures of HNO 3 and HF. The results showed that the total thickness and weight loss increases with the increasing of HNO 3 concentration and etching time. Higher HNO 3 concentration causes higher etch rate, and the etch rate decreases at prolonged etching time. A smoother and clearer homogeneous Si surface image was observed by optical microscope as the etching time and HNO 3 concentration increase. XRD analysis shows that the intensity of etched Si wafer is higher than the pure one, which might indicate the smoother surface formation after etching. The findings of present study can be valuably referred to produce a reliable and desired Si thin wafer which is crucial in integrated circuit fabrication.

Sessile drop experiments were performed on molten indium antimonide on clean quartz (fused silica) surfaces. A cell was constructed through which argon, helium, oxygen, hydrogen or a mixture of these was flowed at 600 1C. Some of the InSb was doped with 0.1% Ga. The surface tension s of oxide-free molten InSb was smaller in Ar than in He, may have increased with increasing O 2 in the gas, and was not influenced by Ga or H 2 . The contact angle y on silica was higher in the presence of Ar, was lowered by O 2 , and was not influenced by H 2 or Ga. The work of adhesion W and the surface energy s sv of the silica were higher in He than in Ar. The surface remained free of solid oxide only in flowing gas containing p0.8 ppm O 2 . This behavior is attributed to reaction of O 2 at the surface of the melt to form In 2 O gas. When solid oxide formed on Ga-doped material, it was strongly enriched in Ga, with the Ga/In ratio increasing with the concentration of O 2 in the gas.

In this paper, we are present design and analysis of PLL, which is simulated in CMOS 0.18μm technology. The digital phase locked loop achieves locking within about 100 reference clock cycles. The pure digital phase locked loop is attractive because it is less sensitive to noise and operating conditions than its analog counterpart.In this PLL circuit successfully achieved 1.55GHz frequency. Jitter is 1.09ns achieved is very less. Also achieve low phase noise-98.5827 at 1MHz Frequency.

Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Trapping in 1nm EOT high-k / MG Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Electrical and Chemical Properties of the HfO2/SiO2/Si Stack: Impact of HfO2 Thickness and Thermal Budget Abstract Full Text (PDF) Scanning Transmission Electron Microscopy Studies of Interface Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Growth and Characterization of Alternative Gate Dielectrics by Molecular-Beam Epitaxy Abstract Full Text (PDF) Abstract Full Text (PDF) Atomic Layer Deposited Lanthanum-(Zirconate/Aluminate) Based High-K Dielectric Stacks For Future CMOS-Technology Abstract Full Text (PDF) Abstract Full Text (PDF) Thermally Stable Hf-silicate with Modification of Si Doping and Thermal Budget in MIM Capacitors Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Physical Characterization of the Metal/High-k Layer Interaction upon Annealing Abstract Full Text (PDF) Abstract Full Text (PDF) Real Space Surface Reconstructions of Decapped As-rich In0.53Ga0.47As(001)-(2×4) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Abstract Full Text (PDF) Clear Get All Checked Abstracts

In order to form junctions shallower than 0.1 μm required for the source/drain extensions for 0.18 μm technology and beyond, boron ions have been implanted in pre-amorphised Si at 1 keV and doses of 1E14-1E15 cm-2 using an Applied Materials xR LEAP ion implanter. Implanted wafers were subsequently annealed in an RTP Centura to ~1 sec soak time and to temperatures between 1000-1100°C. Ramp up rates between 75°C/s and 150°C/s were examined. Junctions with depths between 40-80 nm (taken at 1E17 cm-3 SIMS B concentration) can be formed routinely with sheet resistance tuneable between 300-900 Ω/□ using Ge pre-amorphisation, and subsequent spike annealing at ramp up rates of 150°C/sec in nitrogen atmosphere. It was found that sheet resistance (Rs) is most dependent on the spike anneal temperature, while the ramp up rate appear to have a minimal effect on reducing Rs or controlling junction depth (χj ). The oxygen content in the RTA ambient is an important parameter in controlling both Rs and χj. The crystallinity of the spike annealed wafers has been evaluated using high resolution transmission electron microscopy (HRTEM)

Background noise has always been undesirable in end user communication devices while conversing over a mobile phone if the speaker is on a busy road or noisy environment. Noise cancellation mechanism can be implemented in these mobiles devices to suppress the background noise and pass only speech signal to the other end. Android is fast growing mobiles phone and expanding to all segments of the market; thus a noise cancellation mechanism can benefit a wide range of user. This paper describes the design and development of Noise Cancellation System (NCS) to cancel the background noise from the speech signal of speaker in android mobile phones. NCS system has been implemented using an adaptive filter, which changes its filter characteristic according to the change in behavior of the input signal to minimize the noise in signal. Least Mean Square (LMS) algorithm has been used for adapting the filter weights. The adaptive filter has two inputs one as desired signal corrupted by noise and...

An overview of a variety of examples that deploy intelligent manipulation of controllable magnetic fields is presented. Magnetic Field Assisted Assembly is described in detail as a future scalable manufacturing process for semiconductor device integration with significant improvement in yield and reduction in costs. Magnetic field augmented rotational system is presented as a future approach to energy needs in a number of situations. The proposed examples address applications in key areas of the economy including energy, healthcare, manufacturing and materials.

In the semiconductor industry to increase the power density, improve the electrical performances and optimize the robustness in the application, more and more key roles are covered by back-end processes and in partcular by bonding technology used to connect power silicon chip and metallic leadframe that for Power devices is one of more impacting process. The performed studies, evaluations and production results show that currently the ribbon process can be considered the best compromize between multi-wires approach and clip bonding technology, normally used as interconnection methods to minimize the resistance contribution, improving the electrical performances, minimizing the global stress on the silicon well improving quality. The ribbon bonding allows to have connections resistance better than multi-wires bonding and values close to clip process, also obtaining a more robust process for power device packaging.

The results of an ongoing collaborative project between the New Jersey Institute of Technology (NJIT) and SEMATECH on the temperature-dependent emissivity of silicon-related materials and structures are presented in this study. These results have been acquired using a spectral emissometer. This emissometer consists of a Fourier Transform Infra-Red (FTIR) spectrometer designed specifically to facilitate simultaneous measurements of surface spectral emittance and temperature by using optical techniques over the near- and mid-IR spectral range and temperatures ranging from 300 K to 2000 K. This noncontact, real-time technique has been used to measure radiative properties as a function of temperature and wavelength for a wide range of silicon-related materials and structures. The first results of the temperature and wavelength dependent emissivity and hence refractive index of silicon nitride, in the literature, is presented in this study

The aim of the laboratory work is to understand the principle of Zener diode operation and also apply the knowledge practically by completing laboratory tasks. 
In this part, limiting circuit is described in Figure 1 above. The trimmer resistance is varied, so that the voltage at cathode of the D9 diode changes. Initially, it is set up to +12 V, then 0 V, and finally to -12V.  Case RV4 = +12V: When the current flows from the AC input voltage (Vin = +10V) during the positive half, the D9 diode is reverse biased and the input voltage equals output voltage. During the negative half, diode is still closed. Hence, obtained pattern is provided in Figure 2.

Sintered Ag joint is a potential Pb-free die attach materials for power electronics because of its high operating temperature, high electrical and thermal conductivity as well as its thermo-mechanical reliability. While the long term reliability of the pressure assisted nano-Ag joint has been studied extensively , the performance of pressureless nano-Ag joint during long-term reliability remains a question. In this paper, we addressed the reliability gaps in this area by characterizing the evolution of porosity and microstructures of the pressureless sintered nano-Ag joints on Cu, direct bond copper (DBC) and Ag plated substrates during their high-temperature storage in air at 300 C. The die shear strength of the nano-Ag joint on DBC substrate maintained above 5 MPa for 1000 h of thermal aging while those formed on Cu substrate fell below 5 MPa after 50 h of thermal aging. The microstructure of the sintered nano-Ag joint showed Cu oxide accumulated at the sintered Ag and Cu interface, and upon reaching the critical thickness, they would weaken the sintered nano-Ag joints for the Cu substrate. This microstructure differed from those formed on the Ag plated substrate which showed void-less diffusion band to improve or maintain the die-shear strength. Nano-Ag joints on the DBC substrate also shared similar resilience because of their matching coefficient of thermal expansions with the Cu oxides. The initial increase of die shear strength could be attributed to the densification of the sintered silver joints in terms of the total volume of porosity, pore size and pore shape distribution. The relationship between the oxidation ki-netics of Cu, aging time and shear strength were also established to predict the reliability strength of sintered nano-Ag joints on DBC and Ag substrates. In the case of DBC, its rough surface provided additional anchoring to the sintered Ag joint, resulting in a higher die shear strength despite prolonged aging. These favourable results suggested that pressureless nano-Ag joint could perform as well as pressure assisted nano-Ag joint during the long-term reliability test.

Graphical Processing Units (GPUs) have become an integral part of today’s
mainstream computing systems. They are also being used as reprogrammable
General Purpose GPUs (GP-GPUs) to perform complex scientific
computations. Reconfigurability is an attractive approach to embedded
systems allowing hardware level modification. Hence, there is a high
demand for GPU designs based on reconfigurable hardware. The texture
filter unit is designed to process geometric data like vertices and convert
these into pixels on the screen. This process involves number of operations,
like circle and cube generation, rotator, and scaling. The texture filter unit is
designed with all necessary hardware to deal with all the different filtering
operations. The designed texture filtering units are modelled in Verilog on
Altera Quartus II and simulated using ModelSim tools. The functionality of
the modelled blocks is verified using test inputs in the simulator.Circle and
cube coordinates are generated for circle and cube generation. The work can
form the basis for designing a complete reconfigurable GPU.

RAM adalah kependekan dari Random Access Memory. RAM merupakan sebuah perangkat keras atau hardware yang digunakan untuk menyimpan data sementara atau memori. Selain menyimpan data, fungsi RAM adalah untuk menyimpan berbagai jenis instruksi program pada sebuah komputer. RAM merupakan memory utama yang merupakan jenis volatile memory, artinya data yang ada di RAM hanya akan bertahan saat ada arus listrik. Berbeda dengan cara kerja hardisk. Hardisk adalah non volatile memory. Disebut Random Access Memory karena dapat diakses secara acak. Artinya, RAM bisa diakses tanpa tergantung pada tata letak data. Selain itu, RAM juga merupakan sistem penyimpanan yang sifatnya sementara, tidak seperti hardisk yang merupakan penyimpanan permanen.

The human hearing range is from 20 Hz to 20 kHz. However, many animals can hear much higher sound frequencies. Dolphins, especially, have a hearing range up to 300 kHz. To our knowledge, there is no data of a reported wide-band sound frequency earphone to satisfy both humans and animals. Here, we show that graphene earphones, packaged into commercial earphone casings can play sounds ranging from 100 Hz to 50 kHz. By using a one-step laser scribing technology, wafer-scale flexible graphene earphones can be obtained in 25 min. Compared with a normal commercial earphone, the graphene earphone has a wider frequency response (100 Hz to 50 kHz) and a three times lower fluctuation (±10 dB). A nonlinear effect exists in the graphene-generated sound frequency spectrum. This effect could be explained by the DC bias added to the input sine waves which may induce higher harmonics. Our numerical calculations show that the sound frequency emitted by graphene could reach up to 1 MHz. In addition, we have demonstrated that a dog wearing a graphene earphone could also be trained and controlled by 35 kHz sound waves. Our results show that graphene could be widely used to produce earphones for both humans and animals.

1 Abstract 1 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 2 Abstract 2 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 3 Abstract 3 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 4 Abstract 4 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 5 Abstract 5 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 6 Abstract 6 High Mobility Substrates High Mobility Substrates: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 7 Abstract 7 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 8 Abstract 8 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 9 Abstract 9 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 10 Abstract 10 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 11 Abstract 11 High-k Materials for Non-Volatile Memory High-k Materials for Non-Volatile Memory: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 12 Abstract 12 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 13 Abstract 13 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 14 Abstract 14 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 15 Abstract 15 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 16 Abstract 16 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 17 Abstract 17 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 18 Abstract 18 High-k Materials and Processing I High-k Materials and Processing I: : Abstract Abstract Full Text (PDF) Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 20 Abstract 20 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 21 Abstract 21 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 22 Abstract 22 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 23 Abstract 23 High-k Materials and Processing II High-k Materials and Processing II: : Daniel J. Lichtenwalner, Jesse Jur, Naoya Inoue, and Angus Kingon High-Temperature Processing Effects on Lanthanum Silicate High-Temperature Processing Effects on Lanthanum Silicate Gate Dielectric MIS Devices Gate Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 24 Abstract 24 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 25 Abstract 25 High-k Materials and Processing II High-k Materials and Processing II: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 26 Abstract 26 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 27 Abstract 27 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 28 Abstract 28 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 29 Abstract 29 Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 30 Abstract 30 Gate Electrode Materials I Gate Electrode Materials I: : Abstract Abstract Full Text (PDF) Full Text (PDF) Abstract 31 Abstract 31 Physical/Chemical Characterization Physical/Chemical Characterization: : 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Тема: « Проектирование операционного усилителя в САПР Cadence » Разработал _______________________РКм-111__Борисов В.И.________ (группа, подпись, дата, инициалы, фамилия) Руководитель ________________________Журавлев Д.В._____________ (подпись, дата, инициалы, фамилия) Нормоконтролер ________________________________________________ (подпись, дата, инициалы, фамилия) Проект защищен____________________ Оценка ________________ Воронеж 2012 Введение Операционный усилитель -универсальный функциональный элемент, широко используемый в современных схемах формирования и преобразования информационных сигналов различного назначения как в аналоговой, так и в цифровой технике. Наименование «операционный усилитель» обусловлено тем, что, прежде всего такие усилители получили применение для выполнения операций суммирования сигналов, их дифференцирования, интегрирования, инвертирования и т. д. Операционные усилители были разработаны как усовершенствованные балансные схемы усиления. Усложнение схем операционных усилителей (современные операционные усилители включают десятки, а иногда и сотни элементарных ячеек: регистров, диодов, транзисторов, конденсаторов), использование генераторов стабильных токов и ряд других усовершенствований существенно расширили сферу возможных применений операционных усилителей. Данный курсовой проект будет выполнение в современном САПРе Cadence Virtuoso. Данное ПО используется во многих ведущих компаний: Samsung, Apple, TSMС и т.д.

A micro electronic pill is basically a multi channel sensor used for remote bio medical measurements using microtechnology this has been developed for the internal study and detection of diseases and abnormalities in the gastro intestinal GI tract where restricted access prevents the use of traditional endoscopy the measurement parameters for detection include real time remote recording of temperature, pH, conductivity and dissolved oxygen in the GI tract This paper with the design of the micro electronic pill which mainly consists of an outer biocompatible capsule encasing 4 channel micro sensors a control chip, a discrete component radio transmitter and 2 silver oxide cells.

Introduction
This lab session has a purpose of practical implementation of theoretical knowledge about transistors. There are four parts in the work:
• NPN and PNP Transistors
• Transistors Biasing
• Q point stabilization
Apparatus
The following equipment was used during the lab:
• MCM3/EV board
• Power supply PSLC or PS1-PSU/EV
• Accessories
As in the previous lab, the whole lab work is done with the MCM/EV board. The oscilloscope was used for the visualization of the waveforms. Screwdriver was used for the variable resistor configuration.

Les microsystèmes font désormais partie intégrante de notre vie quotidienne. Le développement de leurs procédés de fabrication amène de nouvelles problématiques auxquelles il est nécessaire de savoir répondre. Entre autres, le bon déroulement de ces procédés doit être
contrôlé; d'où la nécessité de la métrologie, science des mesures.

La WDXRF (fluorescence X par dispersion de longueur d'onde) permet de déterminer de manière non destructive les données d'épaisseur et de concentration des plaques de Silicium unies (dites "full-sheet"). Pour ce faire, deux méthodes de calibration existent: une méthode empirique,
dite méthode des Alphas, et une méthode théorique, dite des Paramètres fondamentaux ou des FP.

Il a été démontré que la méthode des FP gardait généralement de très gros avantages face à la méthode des Alphas: elle est plus juste, requiert moins d'étalons et donne indépendamment l'épaisseur et la concentration.

Cependant la méthode des Alphas reste parfois préférable, entre autres lorsque l'on veut mesurer une très petite gamme de valeurs, ou lorsque l'un des éléments à mesurer est pratiquement invariant. On peut alors choisir d'utiliser la méthode en épaisseur x concentration (pour les faibles épaisseurs) ou en concentration uniquement (pour les épaisseurs très importantes).

The aim of this laboratory work is to get practical experience with BJT and FETs. From theory, we know that Field Effect Transistors are voltage controlled unlike from BJTs, which are current controlled devices. There are Source, Gate and Drain electrode sides. The Gate electrode voltage is used to control Drain-Source characteristics. In this lab, we are to obtain the results in order to prove above said.   
Equipment used:
- Power Supply PS1-PSU/EV
- Module MCM4/EV
- Multimeter 
- Jumpers

Operational Amplifier (Op Amp) is a three terminal electronic device which has two inputs of high impedance. The first input is called inverting (represented by ‘-‘), and the other terminal is called non-inverting input. The third terminal serves as output port, where signal is usually amplified by some gain (A), depending on the nature of op amp and input characteristics. 
In this lab session we build op amp circuits and carry out various calculations of op amp characteristics. At the end of this lab, we are to strengthen theoretical knowledge by gaining hands on experience. This lab covers:
- Inverting Amplifiers 
- Non-inverting Amplifiers 
- Summing Amplifiers

Les promesses des technosciences contemporaines s’appuient sur les success stories de celles qui façonnent actuellement l’économie et la société. La Loi de Moore, fonction exponentielle qui décrit et prédit la cadence de miniaturisation et de réduction des coûts des composants électroniques depuis un demi-siècle, constitue un de ces récits. Ce chapitre interroge la Loi de Moore comme matrice historique du régime actuel de l’économie des promesses technoscientifiques. Devenue métaphore du progrès technique en général, la Loi de Moore délimite le périmètre de ce qui, des technosciences, peut être interrogé et discuté. Parce qu’elle trace un cadre temporel pour l’innovation, sa construction même est hors-cadre, et relève du non négociable.En donnant à voir la fabrique de ce récit, ce chapitre entend construire et instruire une position critique générale sur l’économie des promesses technoscientifiques actuelles. Cette critique porte moins sur la faisabilité de ces promesses (sur leur caractère spéculatif, non crédible, non tenable) que sur leur désirabilité. La Loi de Moore montre en effet que ces promesses peuvent devenir crédibles, réalisables, tenables – mais à quel prix ?

Slot die coating is growing in popularity because it is a low operational cost and easily scaled processing technique for depositing thin and uniform films rapidly, while minimizing material waste. The complex inner geometry of conventional slot dies require expensive machining that limits accessibility and experimentation. In order to overcome these issues this study follows an open hardware approach, which uses an open source 3-D printer to both fabricate the slot die and then to functionalize a 3-D slot die printing system. Polymer materials are tested and selected for compatibility with common solvents and used to fabricate a custom slot die head. This slot die is then integrated into a 3-D printer augmented with a syringe pump to form an additive manufacturing platform for thin film semiconductor devices. The full design of the slot die system is disclosed here using an open source license including software and operational protocols. This study demonstrates that functional lab-grade slot dies may be 3-D printed using low-cost open source hardware methods. A case study using NiO2 found an RMS value 0.486 nm, thickness of 17 to 49nm, and a maximum optical transmission of 99.1%, which shows this additive manufacturing approach to slot die depositions as well of fabrication is capable of producing viable layers of advanced electronic materials. Using this method, a cost savings of over 17,000% was obtained when compared to commercial slot die systems for laboratories.

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This project considered two adhesives; a ductile and brittle adhesive, to compare their effect on joint strength. The optimal thickness of both the adhesives was determined by varying the bondline thickness between aluminum adherends. The ductile adhesive was more sensitive to bondline thickness than the brittle adhesive. The failure mode was cohesive for bondline thicknesses of less than 0.2 mm and transitioned to adhesive failure for bondline thicknesses over 0.6 mm. The joint profile was tailored to study the effect of bondline thickness variation. A convex and concave profile were compared to consider the effect of free edge thickness. A tapered profile was used to consider manufacturing misalignment. The ductile adhesive was stronger with the concave profile and the brittle adhesive was stronger with the convex profile, while misalignment lowered the strength of both adhesives. The failure mode for the tailored profiles was a mix of cohesive and adhesive failure, even though their maximum thickness was less than 0.6 mm. Finite element analysis (FEA), using a maximum plastic shear strain criterion, was used to describe the experimental results. The model correctly described the effect of adhesive thickness and bondline profile for the ductile adhesive, but was less successful in predicting the trends of the brittle adhesive. The results suggest that failure criteria for bonded joints may be adhesive dependent.

With the advances in the semiconductor and communication industries, it has become
increasingly important for electrical engineers to develop a good understanding of microelectronics.
This book addresses the need for a text that teaches microelectronics from a
modern and intuitive perspective. Guided by my industrial, research, and academic experience,
I have chosen the topics, the order, and the depth and breadth so as to efficiently
impart analysis and design principles that the students will find useful as they enter the
industry or graduate school.
One salient feature of this book is its synthesis- or design-oriented approach. Rather
than pulling a circuit out of a bag and trying to analyze it, I set the stage by stating a
problem that we face in real life (e.g., how to design a cellphone charger). I then attempt
to arrive at a solution using basic principles, thus presenting both failures and successes in
the process.When we do arrive at the final solution, the student has seen the exact role of
each device as well as the logical thought sequence behind synthesizing the circuit.
Another essential component of this book is “analysis by inspection.” This “mentality”
is created in two steps. First, the behavior of elementary building blocks is formulated using
a “verbal” description of each analytical result (e.g., “looking into the emitter, we see
1/gm.”). Second, larger circuits are decomposed and “mapped” to the elementary blocks
to avoid the need for writing KVLs and KCLs. This approach both imparts a great deal of
intuition and simplifies the analysis of large circuits.
The two articles following this preface provide helpful suggestions for students and
instructors. I hope these suggestions make the task of learning or teaching microelectronics
more enjoyable.
A set of Powerpoint slides, a solutions manual, and many other teaching aids are
available for instructors.

The possibility exists for creating solar panels from ice very cheaply, i.e. for the cost of the tray, wires and tensioners to hold the wires down. These would only be workable in locales wherein the ambient air temperature is cold, but the low cost makes them attractive and suggests future wide adoption. How to get there? Should governments rely on planned large-scale initiatives, on local initiatives, or on the marketplace? Various themes for context are explored.
Reports of energy development in the Commonwealth of Independent States (CIS, comprising former Soviet republics) suggest that energy development leads to economic growth in the short term, and that there is a feedback mechanism that operates in the long term. See Apergis & Payne's 2009 article “Energy Consumption and Economic Growth” in Energy Economics. Thus energy development could be undertaken as a large-scale government initiative with economy as justification. In New York State in the US, standard solar power generation in centralized plants delivers savings to users (i.e. rate payers and tax payers) on the order of 15¢ to 40¢ per kWh. See Perez, Zweibel & Hoff's 2011 article “Solar Power Generation in the US” in Energy Policy and Branker & Pearce's 2010 “Financial return for government support of large-scale thin-film solar photovoltaic manufacturing in Canada” in the same journal for more examples.
Yet the situation for solar panels from ice is unique. Extra photovoltaic panels (PV) from ice when coupled with a feed-in tariff (FIT) could result in regional electricity grids flush with cheap electricity during winter.  Ice PV could also be added to homes, businesses or plants that already have PV very easily since the energy storage component is already in place. Energy storage can take the form of batteries, ultracapacitors, fuel cells or a (hybrid) combination of these, and energy storage is a current area of scientific and economic exploration. Tesla Motors recently announced a partnership to provide battery-based home energy storage cheaply (probably around $2500 per unit).
Perhaps it will be a national government need to promote a nascent energy storage technology sector. Demand could be placed very high with the introduction of PV from ice. Once many units are in place, there will be a great deal of flexibility, and innovation related to solar panel technology could be promoted locally. Energy storage units are the key here. If industrial development within renewables is desired, ice may be a useful lead in.
Notably, some flexibility is required. For example, it's not known what the effect of different substances dissolved in the ice would be. Perhaps nickel particles added to water as it freezes would create extra layers that would make ice PV more productive than silicon. Local initiatives or a FIT would promote experimentation to a greater extent than a national energy plant program. Citizen science could have the day.
Ultimately, ice PV policy depends on governmental and societal goals. If there is no interest in developing PV technology generally, then letting the market work unfettered would bypass any development incentive and yet allow for adoption if personal desire dictates. If the PV sector is already well-developed, then a broad policy set might be negotiated with the participation of major businesses and academia, maybe including a renewable portfolio standard (RPS). If novel technological development is desired, then local initiatives and FIT make sense. Indeed, Solangi et al.'s 2010 “Review on Global Solar Energy Policy” in Renewable and Sustainable Energy Reviews highlights the efficacy of FIT and RPS in a variety of settings.