Machens et al., 2011 - Google Patents

Avoiding publication and privatization problems on software transactional memory

Machens et al., 2011

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Document ID
5887475527235480602
Author
Machens H
Turau V
Publication year
Publication venue
17th GI/ITG Conference on Communication in Distributed Systems (KiVS 2011)

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This paper presents a new approach to exclude problems arising from dynamically switching between protected concurrent and unprotected single-threaded use of shared data when using software transactional memory in OO languages such as Java. The …
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Classifications

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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/30003Arrangements for executing specific machine instructions
    • G06F9/30076Arrangements for executing specific machine instructions to perform miscellaneous control operations, e.g. NOP
    • G06F9/30087Synchronisation or serialisation instructions
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    • G06F9/3004Arrangements for executing specific machine instructions to perform operations on memory
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    • G06F9/52Programme synchronisation; Mutual exclusion, e.g. by means of semaphores; Contention for resources among tasks
    • G06F9/524Deadlock detection or avoidance
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    • G06F9/30Arrangements for executing machine-instructions, e.g. instruction decode
    • G06F9/38Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3861Recovery, e.g. branch miss-prediction, exception handling
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
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    • G06COMPUTING; CALCULATING; COUNTING
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    • G06F9/44Arrangements for executing specific programmes
    • G06F9/4421Execution paradigms
    • G06F9/4428Object-oriented
    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRICAL DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformations of program code
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    • G06F8/44Encoding
    • G06F8/445Exploiting fine grain parallelism, i.e. parallelism at instruction level
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    • G06F8/4442Reducing the number of cache misses; Data prefetching
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