Singh et al., 2018 - Google Patents
Bottom-up methodology for predictive simulations of self-heating in aggressively scaled process technologiesSingh et al., 2018
- Document ID
- 17721084342307650725
- Author
- Singh D
- Restrepo O
- Manik P
- Mavilla N
- Zhang H
- Paliwoda P
- Pinkett S
- Deng Y
- Silva E
- Johnson J
- Bajaj M
- Furkay S
- Chbili Z
- Kerber A
- Christiansen C
- Narasimha S
- Maciejewski E
- Samavedam S
- Lin C
- Publication year
- Publication venue
- 2018 IEEE International Reliability Physics Symposium (IRPS)
External Links
Snippet
We present a hierarchical methodology using a combination of ab-initio phonon scattering, electron transmission, and multi-scale finite element simulations to accurately model process specific material physics and component level self-heating in FinFET technologies …
- 238000010438 heat treatment 0 title abstract description 42
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- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation; Temperature sensing arrangements
- H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
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- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation; Temperature sensing arrangements
- H01L23/345—Arrangements for heating
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- H01—BASIC ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L23/467—Arrangements for cooling, heating, ventilating or temperature compensation; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing gases, e.g. air
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- H01L29/66—Types of semiconductor device; Multistep manufacturing processes therefor
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- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
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